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224 commits

Author SHA1 Message Date
Joe Hershberger
6eed3786c6 net: Move the CMD_NET config to defconfigs
This also selects CONFIG_NET for any CONFIG_CMD_NET board.

Remove the imx default for CONFIG_NET.

This moves the config that was defined by 60296a8 (commands: add more
command entries in Kconfig).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2015-06-01 09:40:15 -05:00
York Sun
a88cc3bd90 arm/ls1021a: Remove ccsr_ddr from immap_ls102xa.h
ccsr_ddr structure is already defined in fsl_immap.h. Remove
this duplicated define. Move fixed timing into ls1021atwr.h.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
2015-05-20 10:34:09 -07:00
Alison Wang
1c69a51cc3 arm: ls102xa: Adjust the load address of U-Boot for NOR boot
The original load address of U-Boot is 0x67f80000. The address
space of NOR flash is 0x60000000 to 0x67ffffff. It will cause
the size of u-boot couldn't be larger than 512K. As more features
are supported in u-boot, the size of u-boot is larger than 512K.

To fix this issue, the load address of U-Boot for NOR boot is
adjusted to 0x60100000.

In RCW, the PBI command needs to change as follows:
 .pbi
-write 0xee0200, 0x67f80000
+write 0xee0200, 0x60100000
 .end

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-05-20 10:33:52 -07:00
York Sun
f8cb101e1e driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
2015-04-23 08:55:53 -07:00
Minghuan Lian
180b8688dc arm/ls1021a: add PCIe settings
The patch enables and adds PCIe settings for boards LS1021AQDS
and LS1021ATWR.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-02-24 13:10:44 -08:00
Alison Wang
55d53ab45e arm: ls102xa: Add LPUART support for LS1021ATWR board
This patch adds LPUART support for LS1021ATWR board.
For ls1021atwr_nor_lpuart_defconfig, LPUART is used as the console.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-01-23 22:29:15 -06:00
Xiubo Li
660673af4f ARM: ls102xa: Setting device's stream id for SMMUs.
LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:42:22 -08:00
Xiubo Li
e87f3b308c ARM: ls102xa: allow all the peripheral access permission as R/W.
The Central Security Unit (CSU) allows secure world software to
change the default access control policies of peripherals/bus
slaves, determining which bus masters may access them. This
allows peripherals to be separated into distinct security domains.
Combined with SMMU configuration of the system masters privileges,
these features provide protection against indirect unauthorized
access to data.

For now we configure all the peripheral access permissions as R/W.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:42:12 -08:00
Xiubo Li
1a2826f6e0 ls102xa: changing a few targets' configurations.
Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:42:03 -08:00
Alison Wang
d612f0ab34 arm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board
This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:40:14 -08:00
Alison Wang
4c59ab9cfb arm: ls102xa: Fix SD/NAND/QSPI boot defination error for QE support
The SD/NAND/QSPI boot definations are wrong for QE support, this
patch is to fix this error.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:40:01 -08:00
Alison Wang
8251ed2323 arm: ls1021a: Add CONFIG_DOS_PARTITION and CONFIG_CMD_FAT support
This patch will fix the bug that the partitions on the SD card could
not be accessed and add the support for the FAT fs.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:39:42 -08:00
Alison Wang
8415bb68c8 arm: ls102xa: Add SD boot support for LS1021ATWR board
This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:39:32 -08:00
Minghuan Lian
da419027af arm: ls102xa: Update PCIe dts node status
The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:35:56 -08:00
Tom Rini
85bafb6da4 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2014-11-26 11:23:26 -05:00
Alison Wang
5175a2885f arm: ls102xa: Add SystemID EEPROM support for LS1021ATWR board
SystemID information could be read through I2C1 from EEPROM
on LS1021ATWR board.

As LS1 is a little-endian processor, getting the version ID by
be32_to_cpu() is wrong. Fix it by using e.version directly.
This change will be compatible for both ARM and PowerPC.

As there is an errata that I2C1 could not work in SD boot,
reading EEPROM through I2C1 is disabled too in SD boot.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-24 09:27:23 -08:00
Yuan Yao
272c5265ed ls102xa: ifc: nor: fix the write issue when bytes unaligned
Add define CONFIG_SYS_WRITE_SWAPPED_DATA.
For LS1021AQDS and LS1021QTWR nor flash write should swap the
bytes when handle unaligned tail bytes.

Because of the ending, if the date bus width is 16-bits and the
number of bytes is odd, we should swap the byte when write the
last one.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-24 09:27:23 -08:00
Masahiro Yamada
c66109cd3b config: remove redundant CONFIG_SYS_PROMPT defines
Since commit 0defddc851 (config: Add a default CONFIG_SYS_PROMPT),
each board header does not need to define CONFIG_SYS_PROMPT
as long as it uses the default prompt "=> ".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-23 06:49:02 -05:00
Zhao Qiang
eaa859e7d2 qe: add qe support for ls1021a-twr board
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:56:09 -08:00
Masahiro Yamada
8c688bc4de kconfig: move CONFIG_SYS_HZ to lib/Kconfig
CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).

This commit moves the definition and the document in README to
Kconfig.  Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2014-10-23 13:18:59 -04:00
Ruchika Gupta
ba4740205d ls102x: Add support for secure boot and enable blob command
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:21:26 -07:00
Ruchika Gupta
4ba4a095da ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:17:32 -07:00
Wang Huan
b4ecc8c6f8 ls102xa: dcu: Add platform support for DCU on LS1021ATWR board
This patch adds the TWR_LCD_RGB card/HDMI options and the common
configuration for DCU on LS1021ATWR board.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
2014-09-08 10:30:36 -07:00
Wang Huan
c8a7d9dab0 arm: ls102xa: Add basic support for LS1021ATWR board
LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021ATWR board.
 One DDR controller
 DUART1 is used as the console

For the detail board information, please refer to README.

Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
2014-09-08 10:30:35 -07:00