Commit graph

76494 commits

Author SHA1 Message Date
Chris Morgan
b774be9de5 rockchip: px30: add support for HW RNG for Odroid Go Advance
The Odroid Go Advance has a hardware random number generator present.
The device does not have an upstream Linux driver, but does have a
U-Boot driver. Add the appropriate node so that the hardware RNG can be
used in U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 10:58:59 +08:00
Chris Morgan
fe3dde3e7b cmd: kaslrseed: add command to generate value from hwrng
Allow the kaslr-seed value in the chosen node to be set from a hardware
rng source.

Tested on a Rockchip PX30 (Odroid Go Advance), you must have loaded
the devicetree first and prepared it for editing. On my device the
workflow goes as follows:

setenv dtb_loadaddr "0x01f00000"
load mmc 0:1 ${dtb_loadaddr} rk3326-odroid-go2.dtb
fdt addr ${dtb_loadaddr}
fdt resize
kaslrseed

and the output can be seen here:
fdt print /chosen
chosen {
        kaslr-seed = <0x6f61df74 0x6f7b996c>;
        stdout-path = "serial2:115200n8";
};

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-24 10:54:56 +08:00
Tom Rini
734ad93376 Prepare v2022.01-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-20 11:15:15 -05:00
Tom Rini
621158d106 Revert "image: Remove #ifdefs from select_ramdisk()"
This reverts commit f33a2c1bd0.

This causes a crash on some platforms as seen here:
https://lore.kernel.org/r/f153017b-c41a-0d32-67b9-f288e695f900@baylibre.com/

Reported-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-20 09:36:32 -05:00
Joakim Tjernlund
08cf1a5e69 fw_setenv: Unbreak fw_setenv caused by buggy MEMISLOCKED use
Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.

Fixes: 8a726b852502 ("fw_setenv: lock the flash only if it was locked before")
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
2021-12-20 09:21:48 -05:00
Tom Rini
1cd75ceae5 Merge tag '20211220-fixes-for-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for 20211220-fixes-for-2022.01

- mvtwsi: Swab the register address if its size is > 1
2021-12-20 08:51:53 -05:00
Stefan Roese
ccea46c05b i2c: mvtwsi: Swab the register address if its size is > 1
Testing on Armada XP with an EEPROM using register address with size
of 2 has shown, that the register address bytes are sent to the I2C
EEPROM in the incorrect order. This patch swabs the address bytes so
that the correct address is transferred to the I2C device.

BTW: This worked without any issues before migrating Armada XP to
DM I2C.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Holland <samuel@sholland.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Pali Rohár <pali@kernel.org>
Cc: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
2021-12-20 07:57:48 +01:00
Tom Rini
d3213c26b5 Pull request for efi-2022-01-rc4-3
Documentation:
 
 * add Calxeda Highbank/Midway board documentation
 
 Bug fixes:
 
 * call part_init() in blk_get_device_by_str() only for MMC
 * fix an 'undefined' error in some driver model macros
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmG+M5IACgkQxIHbvCwF
 GsQhbw/+LyvTg6c1mmo7icwRI/h6rpfX9mrVMXfdyGiP8A9OyzZ2lCFV1duCKP7B
 e5+0VZ/Heu2vCkWw/7PT67uKbjyq+DzVWytujAAebxsSPj4aRS+KtUiqtQChkSTw
 i2nYJb0HW8UwP+oprdpvE8Sia4o2wM2E7jJI3103Vr9lIbkY+nML7BL9VH7J+pNx
 ZEbtkXTaJqwdF+z8+XXiYBYpQrb/2DneV346tttyj43up7BD2fZC/P93n8pTd4/i
 3mTcSlvRNfXwxba9PPslzLiaxEwqpxAusmIwL7Kbaruo1gNXEolSYO5VCSX3/xlJ
 DDYxAJAeM9qnXcbhun+MFZsnkhT1M/qPxiJNox7BThK/XDGEdvV6HKmiAY53DnQ0
 /f4OLoHfxLXJmGVzmpoDo3R5nfhdT1SRKyrKx3r+9IeyipF6122nW3eEfLomMaka
 5VsM2i0/aCNJFWWWTTLnY9LEi66zdHqOpQLfUKR3yr8Rp5NY2XG9rRpPQ1hHyImp
 YCVeeN0RiHr0/5QaNgoWAOViBrN9PrxN6lHHWekV7swNohQIMrT0+bgGUR9JJBNQ
 ylRvzhdK/yhMsvR+Gbo/sBa+U1GTV/HDlFeNinB41Gi1FAX9ubNpD40BuvRWYdSx
 oSq5iQk56dWk12mYCg3IY09gx1tnzrGELrSs6CNPE1GaOMAUbs8=
 =Hs83
 -----END PGP SIGNATURE-----

Merge tag 'efi-2022-01-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4-3

Documentation:

* add Calxeda Highbank/Midway board documentation

Bug fixes:

* call part_init() in blk_get_device_by_str() only for MMC
* fix an 'undefined' error in some driver model macros
2021-12-18 14:39:21 -05:00
AKASHI Takahiro
3cfc042d43 dm: fix an 'undefined' error in some macros
Due to a non-existing parameter name in macro's, use of those macro's will
cause a compiler error of "undefined reference".
Unfortunately, dm test doesn't fail because a wrong name ("&dev", hence it
is accidentally a valid name in the context of a caller site) is passed on.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f262d4ca4b ("dm: core: Add a way to read platdata for all
	child devices")
Fixes: 903e83ee84 ("dm: core: Add a way to iterate through children,
	probing each")
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-18 12:05:19 +01:00
AKASHI Takahiro
19b241c61f blk: add a helper function, blk_probe_or_unbind()
This function will be commonly used in block device drivers
in the succeeding patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-18 12:05:19 +01:00
AKASHI Takahiro
5d21dfec4a part: call part_init() in blk_get_device_by_str() only for MMC
In blk_get_device_by_str(), the comment says: "Updates the partition table
for the specified hw partition."
Since hw partition is supported only on MMC, it makes no sense to do so
for other devices.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-18 12:05:19 +01:00
Andre Przywara
35f3ef93d6 doc: board: Add Calxeda Highbank/Midway documentation
The Calxeda servers are using U-Boot as the primary bootloader, which
was shipped as part of a firmware upgrade package.
Even though the machines are considered legacy at this point, the port
still works, so deserves some documentation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-18 12:05:19 +01:00
Tom Rini
c03942ddc9 Merge commit '4720b83d2c711062cfb55f03591b8f12c897d7cb' of https://github.com/tienfong/uboot_mainline 2021-12-17 07:24:56 -05:00
Tien Fong Chee
4720b83d2c arm: socfpga: arria10: Enable double peripheral RBF configuration
Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17 12:58:01 +08:00
Tien Fong Chee
3b4ee40f20 arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF
This patch triggers warm reset to recover the MPFE NoC from corruption
due to high frequency transient clock output from HPS EMIF IOPLL at
VCO startup after peripheral RBF is programmed.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17 12:58:01 +08:00
Tien Fong Chee
2f27754eb7 arm: socfpga: arria10: Setting image magic value to romcode initswstate reg
The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID
value if the current FSBL image is found valid, otherwise BootROM will
look for next subsequent valid FSBL image when warm reset is triggered.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17 12:58:01 +08:00
Tom Rini
5b20efeafe Clock patches for v2022.01-rc3
This adds better logging support for many CCF drivers, and clarifies some
 documentation regarding clk_get_rate.
 -----BEGIN PGP SIGNATURE-----
 
 iQGTBAABCgB9FiEEkGEdW86NSNID6GAoPuiP7LShEG4FAmG6Q2ZfFIAAAAAALgAo
 aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldDkw
 NjExRDVCQ0U4RDQ4RDIwM0U4NjAyODNFRTg4RkVDQjRBMTEwNkUACgkQPuiP7LSh
 EG4+Jgf/aExT2jxy58MTKmffdfL37+v8TL0IMuL7cD369TFXhZBpBq42nq9Ef+Zd
 PNnBgKe/vAt9u2nCBeEEIX7+HhPLXQt+OeH+d4kydjUJkGxrE6DBvJ4/+1yXo9p/
 GcsqIyusTv2iDiHxxFoiCZaHHkjC2okhj0SSPvolPdoDFm0Ki1kNpPdv+QcOcm2j
 Q+yJsRHdmaKMvxSWGqImYGLWRDsdKbs8yczFc9ejphM5ARbbiJ70qgZO9UPuK+8g
 8tGUT23GTC7on0ABabOEu0xdCH0x27rZkjANtfjuIqX9eTUyAUEbRfSvOwkHGnEr
 y6I2UZIVCoR6RfWqByGebG20Ri//ZQ==
 =1L3q
 -----END PGP SIGNATURE-----

Merge tag 'clk-2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock patches for v2022.01-rc3

This adds better logging support for many CCF drivers, and clarifies some
documentation regarding clk_get_rate.
2021-12-15 14:51:44 -05:00
Patrick Delaunay
560e1e0050 clk: define LOG_CATEGORY for generic and ccf clocks
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.

This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:16 -05:00
Patrick Delaunay
572c446e98 clk: cosmetic: reorder include files
Reorder include files in the U-Boot expected order:

the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.

It is a preliminary step for next patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:16 -05:00
Giulio Benetti
9e578f6340 clk: fix clk_get_rate() documentation
Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:15 -05:00
Tom Rini
e09ca91cfa - enable RPi Zero 2 W
- fix MMC numbering issue
 - Update link to documentation
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmG6FZ8SHG1icnVnZ2Vy
 QHN1c2UuY29tAAoJEC9tfk32wqh+NigQAK+M5odbqCXRyMhdJzkP7bccQ80dFA/3
 aGcAfPMd6qIqm75Z5iqAhBLjiR4WQ79Amswu5B/HthLaelurHe21/hDEXBxmCvI3
 dUw1u702kyxHFoU0bKHhtR/+RNsJq7TYuFdAwE1xsjRvO/UAaEyll85euC9ZxrR4
 1llrqt0qKtMEQzS4XRAiODl3Nv2o/9ckFKsJYuk8XVpaYnjiG+hk/v+LlyVVEWqY
 dCCiSIDVKYFtaamee54qvi6cuCp4JjWW+XS9a6Yz8V6kfsHVrW42Xcm4oIiyAffQ
 CUDZr2350WcldO7NNS1pB78jAYmCam/eVFnDkji+0BqwgPzYu7eBCz2biCjF4W4T
 ZujSfPlHapnE84/RHKqc3w6W1uukJEFV3t2P72VZoFCJ8SxcBmyOTteDeYt/TFfn
 iiWOw5TiGOQnthc7YtbTWtQ1R1EzpxESgyYfzbRAEmyWu7VkwXuM2Lz9gJjDKOvz
 PkOrjxeOT/VH1x3GbmcGJNfY9MMzNcbLBr0LTJ+n/PLCzW3zqJOm+SjMHp7P2Lb5
 awEgrYtkkyYidkq8SdHAHfUf2nd2eR5XEtbDcyr9t9CDTaK0KJpWOdYr15E4Y0bk
 fiLP9z0Q2pN7OqcPAoMdrhdql80UBZJYo5rFGbj/m++L0GMZRAoWELschVMCjpu4
 7pOro6+it1v0
 =xnZF
 -----END PGP SIGNATURE-----

Merge tag 'rpi-next-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi

- enable RPi Zero 2 W
- fix MMC numbering issue
- Update link to documentation
2021-12-15 11:49:30 -05:00
Tom Rini
5a59f634e9 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR
  setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)
2021-12-15 07:14:20 -05:00
Pali Rohár
fed5beca18 arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.

In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.

Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Pali Rohár
a48e4287d6 pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.

In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.

Fixes: a7b61ab58d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Marek Behún
e967c84a6d pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Tom Rini
cfbd2bc695 - enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
   - increase USB power-good delay
   - add update_sf script to install U-Boot into SF
   - increase PHY auto-negotiation timeout to 20 seconds
   - fix SoM and board coding strap GPIO handling
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmG3TqYcHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/puhJEACl9lNg7+0GDd6eoi73
 NR4+r1JYPDkYKbbBWjHVueIwKYbpk1uSzYLB70lchUVbdvu3fczJc7uOXTDRnrCN
 13BuMa45HAWxvb/9UuHz3AnrLEsSvEgGCRCXK0FrE0mu1yBZK+6iO1ysuQEJA78j
 7tyBs6i+IzuAusejx8NiqjYughIFZKBzfztLe3OSxDhEam+vCCEAIUoTx7FSq1jp
 TumZULkfx0SCSL86vPnzczjtucrtKiaWhjNLDbg0Ilf28qYYTCdlDcpi7ySpr43u
 VJTAKAXYVQq4Ye3qsth6GSsTZ1pONBoSaaOo2z/hoQu+/Y4+yUrzkLB+0dSrqgsW
 FPosN9/OPSRcBIfhFEV9RojhHK9OxYXr0WjBctb6fZKzHK52neVv819Ixy5WBJvq
 gXo6jK78ILxzOUx1PzRj2safKhArAuPrxD2Lv0wNKqNCWJJZbT037L6p5CFG30UI
 7yltaYm1ukAT6q6MeergHAAcdgYV+nyFOUs7udQY5HltzLpBJkdIGHKJpioAhvYJ
 KNHMwANd499/edL/FdXXN7X8sfb7ylaUaqDfkHPJgfDDFmF4lQ591k+jWeD8H1lo
 LYUhd4/7EvNAS02fvwmrdTWYCCFyxL1HFxwOlFqrkthFJnJj70shBJsB786pvihq
 wd9npDIUFJGSTCTA4uXCu3YHlA==
 =Qgdj
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm

- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling

# gpg verification failed.
2021-12-13 10:20:25 -05:00
Marek Vasut
5c592b636a ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:22 +01:00
Marek Vasut
98fe251a24 ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:11 +01:00
Marek Vasut
7c870f8d70 ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:04 +01:00
Marek Vasut
e1d7b0b9c5 ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:59 +01:00
Marek Vasut
44beea2845 ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:53 +01:00
Marek Vasut
e8e66801bd ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-12-13 14:33:47 +01:00
Tom Rini
026c010c4a Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- A few clean ups for the RZG2
2021-12-13 07:11:09 -05:00
Adam Ford
d5f1beb058 configs: beacon-rzg2m: Config to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
dcbf1145e2 ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
61b3a0101a arm: dts: Create common rz-g2-beacon-u-boot file
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other.  Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
1eaf61c84d arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3
The device trees for the Beacon RZ/G2[MNH] boards have undergone
some changes over time, so resync them now.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
182754f43a net: ravb: Support multiple clocks
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Tom Rini
a1c01b17c5 Pull request efi-2022-01-rc4-2
UEFI:
 
 * correctly handle missing TPM device
 * prepare for block devices for U-Boot as EFI app
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmGzHfAACgkQxIHbvCwF
 GsQYeA/+LFCXTVOLWtShHc71kMUdjX5tCnm3LrYEnJgc9fmo2zWD+kSbAWV7RIZG
 WJ1OVkLKw8+O5kvRwW/dxpZVU1fULn/vzVJxoKVM7I48XJ0JbnO9Up3GCl91i+2t
 h55gQ/bmt5LpOvQIAhVqQKfMhJz1fTZV77ZtKKdDKw6oeDGlL5F3WZ0RRGGhSXLY
 pLVKRDTm+B7HvSTth052MVjrfpfkivujDfCO+rYgw3pA4M3MdC51J4gpIWJt2SRz
 q/p3Fc5fU1d47KEJIfDnm6Hv76yZO3aNU6zivQoSfCqDlNYRvbNcWr4VIkvrIn4D
 eugMO5f0lWRqDAItq0bcslHEqLPygNJopHB190n4rPUuUfIs/Iq/x6WGBi632aYr
 utMWqpRrEBGMTLWburl/aZi4+Jsd/zTZsqPzDUC5Ok/KmBvrewq//lWRauRd8GXY
 Ka2hbMX65C9wDabOGLOTE7jDeTQqCNi4/L1Ie3yiZ/Pg83QSYpP+Jt58FyugMMuw
 hEEdqbH1uzVrhksaBxG1vzgkdR64i01kEt2CyOtcJnfzkkCxc2DAAFVcDq5oLbdT
 RCKKdP+To9/D+hvvKMQv7cqjumBUYoeFb8yoJK7UvJehrgXaazO/OSiILjTsA3Lq
 l9CtdorVl0FvLzgqZmoBA1H9ovkJFYswt7vZbY3VXGJuj04mvVI=
 =jVT6
 -----END PGP SIGNATURE-----

Merge tag 'efi-2022-01-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2022-01-rc4-2

UEFI:

* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app

# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2021-12-10 07:58:43 -05:00
Simon Glass
d8063dc373 efi: Add a media/block driver for EFI block devices
Add a block driver which handles read/write for EFI block devices. This
driver actually already exists ('efi_block') but is not really suitable
for use as a real U-Boot driver:

- The operations do not provide a udevice
- The code is designed for running as part of EFI loader, so uses
    EFI_PRINT() and EFI_CALL().
- The bind method probes the device, which is not permitted
- It uses 'EFI' as its parent device

The new driver is more 'normal', just requiring its platform data be set
up in advance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Simon Glass
42b7f4212a efi: Add uclass for devices provided by UEFI firmware
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.

This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.

If the two uclasses can be unified, is left to future redesign.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Simon Glass
2abd8d1c99 efi: Rename UCLASS_EFI and IF_TYPE_EFI
These names are better used for access to devices provided by an EFI
layer. Use EFI_LOADER instead here, since these are only available in
U-Boot's EFI_LOADER layer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
f9b51dcf29 efi_loader: correctly handle no tpm device error
When the TCG2 protocol is installed in efi_tcg2_register(),
TPM2 device must be present.
tcg2_measure_pe_image() expects that TCP2 protocol is installed
and TPM device is available. If TCG2 Protocol is installed but
TPM device is not found, tcg2_measure_pe_image() returns
EFI_SECURITY_VIOLATION and efi_load_image() ends with failure.

The same error handling is applied to
efi_tcg2_measure_efi_app_invocation().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
9e32bf9362 efi_loader: check tcg2 protocol installation outside the TCG protocol
There are functions that calls tcg2_agile_log_append() outside
of the TCG protocol invocation (e.g tcg2_measure_pe_image).
These functions must to check that TCG2 protocol is installed.
If not, measurement shall be skipped.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
54bec17f6b efi_loader: efi_tcg2_register returns appropriate error
This commit modify efi_tcg2_register() to return the
appropriate error.
With this fix, sandbox will not boot because efi_tcg2_register()
fails due to some missing feature in GetCapabilities.
So disable sandbox if EFI_TCG2_PROTOCOL is enabled.

UEFI secure boot variable measurement is not directly related
to TCG2 protocol installation, tcg2_measure_secure_boot_variable()
is moved to the separate function.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Alexander Dahl
446266b024 doc: usage: Fix command in fdt overlay apply sequence
Literally adhering to the docs gave this wrong output:

    U-Boot> setenv fdtaddr 0x87f00000
    U-Boot> fdtaddr $fdtaddr
    Unknown command 'fdtaddr' - try 'help'

Fixes: d80162cfc5 ("doc: Document how to apply fdt overlays")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-09 11:43:25 -08:00
Tom Rini
1530ad5bec Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This fixes two regressions: eMMC operation on boards with WiFi (so using
three MMC devices), and a repeated wrong error message in USB gadget
mode (fastboot, ums).
2021-12-09 08:43:30 -05:00
Andre Przywara
fbd9207e7f sunxi: Remove misleading USB-OTG charger message
The sunxi MUSB glue driver has some code to check for external VBUS
presence when it's going to use the MUSB host mode, and it warns if
there is VBUS provided through the cable (in sunxi_musb_enable()).

This code was apparently copied to the USB gadget detection code
(g_dnl_board_usb_cable_connected()), but here we actually *expect*
external VBUS power, so a warning is wrong and confusing.
So far this message rarely triggered, but a recent patch (6fa41cdd19)
changed this:
===========================
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe90000
A charger is plugged into the OTG
/A charger is plugged into the OTG
\A charger is plugged into the OTG
|A charger is plugged into the OTG
-A charger is plugged into the OTG
....
===========================

Remove the message for the gadget cable detection call, and just return
the status of the VBUS detection, as this is what the callers are after.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-08 23:07:15 +00:00
Andre Przywara
e32dad292a sunxi: dts: Fix typoed eMMC check
Commit 03510bf621 ("sunxi: only include alias for eMMC when mmc2
used") protected the eMMC alias in U-Boot's DT stub the with the
associated Kconfig symbol, but was actually using the wrong name.

Fix the name of the symbol to match what's defined in Kconfig and what
the defconfig files actually use.

Fixes: 03510bf621 ("sunxi: only include alias for eMMC when mmc2 used")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: 5kft@5kft.org
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-08 23:06:56 +00:00
Tom Rini
558002a0f2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-12-03 09:02:49 -05:00