Commit graph

13449 commits

Author SHA1 Message Date
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Tom Rini
ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00
Pali Rohár
135973967b arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.

Code for emmc is extracted from commit f1a43c84a9 ("arm64: dts: a3720:
add support for espressobin with populated emmc").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
2020-12-07 07:11:37 +01:00
Pali Rohár
c5c4b69857 Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit f1a43c84a9.
2020-12-07 07:11:37 +01:00
Pali Rohár
338c5ee26a Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit 03bb6a9b1e.
2020-12-07 07:11:37 +01:00
Joshua Scott
28f0cbcdd2 arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.

As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Patrick Delaunay
4f5128ff89 configs: cei-tk1-som: remove CONFIG_ARMV7_PSCI in include file
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.

Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.

Hi,

This patch depend on the previous serie [1].

I don't test this patch on real hardware but
after this patch the size of the binary don't change.

In .config we have:
  CONFIG_ARCH_SUPPORT_PSCI=y
  CONFIG_ARMV7_PSCI=y
  # CONFIG_ARMV7_PSCI_1_0 is not set
  # CONFIG_ARMV7_PSCI_0_2 is not set
  CONFIG_ARMV7_PSCI_0_1=y
  CONFIG_ARMV7_PSCI_NR_CPUS=4

In u-boot.cfg, this patch only add the 2 lines
  #define CONFIG_ARCH_SUPPORT_PSCI 1
  #define CONFIG_ARMV7_PSCI_0_1 1

[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029

Regards
Patrick

END

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:39:15 -07:00
Patrick Delaunay
5a536dfe33 remoteproc: stm32: use reset for hold boot
Use the reset function to handle the hold boot bit in RCC
with device tree handle with MCU_HOLD_BOOT identifier.

This generic reset allows to remove the two specific properties:
- st,syscfg-holdboot
- st,syscfg-tz

This patch prepares alignment with kernel device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 11:32:31 +01:00
Richard Genoud
40426d6f9a SPL: stm32mp1: fix spl_mmc_boot_partition not defined
spl_mmc_boot_partition is only defined when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined.

Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:56:09 +01:00
Marek Vasut
34d573fdab ARM: dts: stm32: Drop QSPI CS2 on DHCOM
The QSPI CS2 is not used on DHCOM, remove the pinmux and flash@1.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:52:09 +01:00
Marek Vasut
64af7c3110 ARM: dts: stm32: Fix uSD card-detect GPIO on DHCOM
The uSD slot card-detect GPIO is connected to PG1, fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:50:44 +01:00
Marek Vasut
7d5164425b ARM: dts: stm32: Add DHCOM based PicoITX board
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:43:46 +01:00
Patrick Delaunay
77c077e171 arm: stm32mp: correct the ALIGN macro usage
Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour
call: the address must use ALIGN_DOWN and size can use ALIGN macro.

With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for
STM32MP15x the computed address was 30000000 instead of 2ff00000.

Fixes: 43fe9d2fda ("stm32mp1: mmu_set_region_dcache_behaviour")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:33:16 +01:00
Patrice Chotard
d5b0511391 ARM: dts: stm32: Fix typo in stm32h7-u-boot.dtsi
Fix typo "firsct"

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:29:23 +01:00
Patrice Chotard
183362947c ARM: dts: stm32: Fix timer initialization for stm32 MCU's board
Commit 4b2be78ab6 ("time: Fix get_ticks being non-monotonic")
puts in evidence that get_ticks is called before timer initialization.
Fix it by initializing timer before relocation.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:29:23 +01:00
Patrice Chotard
61c88ace4b ARM: dts: stm32: DT sync with kernel v5.10-rc1 for MCU's boards
Device tree alignment with kernel v5.10-rc1.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:29:23 +01:00
Patrice Chotard
63185b0a32 ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.

This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:

	memory@90000000 {
 		device_type = "memory";
 		reg = <0x90000000 0x800000>;
 	};

Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:

	memory {
		device_type = "memory";
		reg = <0x00 0x00>;
	};

	memory@90000000 {
		device_type = "memory";
		reg = <0x90000000 0x800000>;
	};

Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:29:23 +01:00
Biju Das
975154bc2c pinctrl: renesas: r8a77951: Add R8A774E1 PFC support
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
c5f3762588 pinctrl: renesas: r8a77965: Add R8A774B1 PFC support
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Michal Simek
6004db972d arm64: zynqmp: Get rid of unused macros
There is no reason to have these macros. But record offsets of missing
register in the structure for future use.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Icenowy Zheng
6d5d6bb50d sunxi: dts: sync Allwinner V3s-related DTs from Linux 5.10-rc1
This commit imports device tree files that are related to Allwinner V3
series from Linux commit 3650b228f83a ("Linux 5.10-rc1").

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Icenowy Zheng
8c51c65273 sunxi: allow to use AXP20[39] attached to I2C0 on V3 series
The reference design of Allwinner V3 series uses an
AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the
first community-available V3s board, Lichee Pi Zero, omitted it.

Allow to introduce support for the PMIC on boards with it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Icenowy Zheng
ef9025b5a9 sunxi: add V3/S3 support
Allwinner V3/Sochip S3 uses the same die with Allwinner V3s/S3L, but V3 comes
with no co-packaged DDR (DDR3 is usually used externally), and S3L comes
with co-packaged DDR3.

Add support for Allwinner V3/S3 chips by add SoC names to original V3s
choice, and allow to select DDR3.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Samuel Holland
e210ec0181 sunxi: DT: A64: update device tree files
Import updated device trees from Linux tag v5.9. This picks up new
hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI
files for the Pinebook and the Teres-I, since the ANX6345 bridge is
now supported upstream.

A couple of headers needed updates for recently-added hardware support.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:20 +00:00
Samuel Holland
8a8b73b6d7 sunxi: board: Add PinePhone DT selection logic
There are two different publicly-released revisions of the PinePhone
hardware, versions 1.1 and 1.2; and they need different device trees.
Since some GPIO pins were rerouted, we can use that to distinguish
between them.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:20 +00:00
Tom Rini
9324c9a823 Merge tag 'ti-v2021.01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix Nokia RX-51 boot issues
- Fix CONFIG_LOGLEVEL on K3 devices
- Add phyBOARD REGOR support
2020-11-16 13:42:29 -05:00
Tom Rini
530dcdd07c - Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
 - fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
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Merge tag 'u-boot-amlogic-20201116' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
- fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
2020-11-16 10:50:32 -05:00
Parthiban Nallathambi
a1337e3581 ARM: am335x: Add phyBOARD REGOR support
phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060).

CPU  : AM335X-GP rev 2.1
Model: Phytec AM335x phyBOARD-REGOR
DRAM:  512 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0
eth0: ethernet@4a100000

Working:
 - Eth0
 - i2C
 - MMC/SD
 - NAND
 - UART
 - USB (host)

Device trees were taken from Linux mainline:
commit c4d6fe731176 ("Linux 5.9.0")

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-15 15:14:04 +05:30
Kever Yang
7a9c574cf1 rockchip: Enable BINMAN for boards enable SPL_OPTEE
Rockchip has many 32bit SoCs and some of them are support SPL_OPTEE now,
only boards with SPL_OPTEE support can fit BINMAN well, other boards
will fail at initr_binman() in U-Boot proper after below patch,
eg. rv1108 board.
    83187546ae binman: Support multiple images in the library

Fixes: 79030a4861 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-11-13 18:17:09 +08:00
Hugh Cole-Baker
c180e2939d rockchip: rockpro64: fix boot from SPI flash on spi1
Commit c4cea2bbf9 ("rockchip: Enable building a SPI ROM image on bob")
added an alias spi1 referring to spi@ff1d0000, however there was already
an alias spi0 referring to the same node in rockpro64's u-boot.dtsi, and
having both aliases present broke booting from SPI flash for this board.

Remove the spi0 alias, set the default bus for SPI flash to 1, and
enable support for numbered aliases in SPL so that it uses the same bus
numbering as U-Boot proper. This fixes booting from U-Boot in SPI flash
on the rockpro64 board.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bbf9 ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13 18:16:39 +08:00
Alper Nebi Yasak
a355ece8e6 video: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0
These files have a lot of code in common with their counterparts in
coreboot, especially in their earlier revisions:

                  U-Boot                  |                  coreboot
    --------------------------------------|--------------------------------------------
    drivers/video/rockchip/:              | src/soc/rockchip/:
    - rk_edp.c          (GPL-2.0+)        | - common/edp.c          (GPL-2.0-only)
       "                                  | - rk3288/display.c      (GPL-2.0-only)
       "                                  | - rk3399/display.c      (GPL-2.0-only)
    - rk_hdmi.h         (GPL-2.0+)        | (none)
    - rk_hdmi.c         (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3288_hdmi.c     (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3399_hdmi.c     (GPL-2.0+)        | (none)
    - rk_mipi.h         (GPL-2.0+)        | (none)
    - rk_mipi.c         (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3288_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3399_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk_lvds.c         (GPL-2.0+)        | (none)
    - rk_vop.h          (GPL-2.0+)        | (none)
    - rk_vop.c          (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3288_vop.c      (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3399_vop.c      (GPL-2.0+)        | (none)
                                          |
    arch/arm/include/asm/arch-rockchip/:  | src/soc/rockchip/*/include/soc/*:
    - edp_rk3288.h      (GPL-2.0+)        | - common/.../edp.h      (GPL-2.0-only)
       "                                  | - rk3288/.../display.h  (GPL-2.0-only)
       "                                  | - rk3399/.../display.h  (GPL-2.0-only)
    - vop_rk3288.h      (GPL-2.0+)        | - common/.../vop.h      (GPL-2.0-only)

Restrict the licenses to match coreboot's so that changes from coreboot
can be imported to U-Boot as necessary. HDMI files are already 2.0+
there and rk_lvds.c has no counterpart, so keep them as is.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Eric Gao <eric.gao@rock-chips.com>
Cc: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13 18:16:11 +08:00
Neil Armstrong
c87eab8161 ARM: dts: meson-sm1: add u-boot specific MMC controller compatible
In order to enable the Amlogic SM1 MMC controller fix, we need to add a u-boot specific
MMC controller compatible.

This adds a new meson-sm1-u-boot.dtsi and reworks the other -u-boot.dtsi
to use this for SM1 based boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-12 14:31:29 +01:00
Neil Armstrong
77863d43eb mmc: meson-gx: move arch header to local header
Move the asm/arch-meson/sd_emmc.h to a local meson_gx_mmc.h,
remove the useless if/then and fix the meson_gx_mmc.c include.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-12 14:31:29 +01:00
Neil Armstrong
b6a71e26c9 ARM: mach-meson: update SoC IDs
Update From Linux commits
- 240051cb833b ("soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs")
- 1d7c541b8a5b ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")
- fdfc6997bd08 ("soc: amlogic: meson-gx-socinfo: Fix S905D3 ID for VIM3L")
- d16d0481e6ba ("soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-12 14:28:37 +01:00
Tom Rini
d062c1344c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
  default sysinfo driver
2020-11-06 09:46:43 -05:00
Simon Glass
fa9e1bcfc4 arm64: mvebu: Use devicetree for SMBIOS settings on uDPU
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
a1d63bc135 odroid-c2: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
c0697c1f4b imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
70190f82cb rockchip: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Tom Rini
7716c328c8 u-boot-imx for 2021.1
---------------------
 
 - new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
 - converted doc to reST
 - fixes for verdin-imx8mm (Toradex)
 - fixes for i.MX thermal driver
 - mx7ulp: Align the PLL_USB frequency
 - mx53: primary/secondary bmode
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
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Merge tag 'u-boot-imx-20201105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx for 2021.1
---------------------

- new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
- converted doc to reST
- fixes for verdin-imx8mm (Toradex)
- fixes for i.MX thermal driver
- mx7ulp: Align the PLL_USB frequency
- mx53: primary/secondary bmode

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
2020-11-05 11:57:50 -05:00
Tom Rini
7a8ac9df5d First set of u-boot-atmel fixes for 2021.01 cycle
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Merge tag 'u-boot-atmel-fixes-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2021.01 cycle:

This specific feature set includes the patches for DT required to fix
the warnings for newer DTC version (1.6.0+), i2c and spi bus unit
address.
2020-11-02 09:01:28 -05:00
Eugen Hristev
ef8f34aea5 ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
2733e6fe5d ARM: dts: at91: sam9260ek: fix SPI bus unit address
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
9f37458b30 ARM: dts: at91: sama5d3xmb: fix I2C bus unit address
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
e0df9e846c ARM: dts: at91: gurnard: fix SPI bus unit address
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
397a28604c ARM: dts: at91: at91sam9g25ek: fix I2C bus unit address
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
6f668d2756 ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit address
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Eugen Hristev
f56a0ca685 ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit address
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Eugen Hristev
a013df93e1 ARM: dts: at91: at91sam9261ek: fix SPI unit address warning
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Eugen Hristev
7d0cad03d5 ARM: dts: at91: vinco: fix I2C warning bus unit address
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00