Commit graph

74 commits

Author SHA1 Message Date
Matthias Schiffer
499b847521 MIPS: fix mips_cache fallback without __builtin_mips_cache
The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.

Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations")
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-03-09 11:00:40 +01:00
Paul Burton
05e342554e MIPS: Support dynamic I/O port base address
The existing mips_io_port_base variable isn't suitable for use early
during boot since it will be stored in the .data section which may not
be writable pre-relocation. Fix this by moving the I/O port base address
into struct arch_global_data. In order to avoid adding this field for
all targets, make this dependant upon a new Kconfig entry
CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a
non-zero I/O port base, so select this option only for Malta.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-02-01 22:13:25 +01:00
Paul Burton
8ac493cd65 MIPS: Remove SLOW_DOWN_IO
CONF_SLOWDOWN_IO is never set for any target, so remove the dead code in
the SLOW_DOWN_IO macro. This is done in preparation for changes to
mips_io_port_base which can be avoided in this path by removing it
entirely.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-02-01 22:13:25 +01:00
Tom Rini
d6ea6d8876 mips: asm/io.h: Add in <linux/bug.h>
As part of the bug.h / BUILD_BUG_* clean up, this file was missed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-25 18:52:23 -05:00
Daniel Schwierzeck
0e0efb40b8 MIPS: implement bit manipulating I/O accessors
Add support for functions clrbits_X(), setbits_X() and clrsetbits_X()
on MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Daniel Schwierzeck
898582bdee MIPS: fix SPDX license identifier in remaining arch header files
Add a SPDX license identifier to MIPS header files where it is
still missing.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Daniel Schwierzeck
a3ab2ae7f6 MIPS: sync processor and register definitions with linux-4.4
Update definitions for processor, registers as well as assemby
macros.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Daniel Schwierzeck
23ff8633fd MIPS: sync I/O related header files with linux-4.4
Mainly sync asm/io.h to get a working ioremap() implementation
as well as the full set of I/O accessors. Pull in additional
header files to make this work.

Furthermore port over the directory 'arch/mips/include/asm/mach-generic/'
with contains default definitions for I/O and memory spaces and default
implementations for mapping those spaces. All files in that directory
can be overwritten by a SoC/machine.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Daniel Schwierzeck
f53830e74e MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFT
Add Kconfig symbol for L1 cache shift like the kernel does.
The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source
for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS.
If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the
cache sizes are automatically detected and ARCH_DMA_MINALIGN
would be set to 128 Bytes.

The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which
corresponds to 32 Bytes. All current MIPS boards already used
that value. While on it, fix the Malta board to use a value of 6
like the kernel port does.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Daniel Schwierzeck
76ada5f8b7 MIPS: au1x00: move SoC header files to arch/mips/mach-au1x00/include/mach/
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Daniel Schwierzeck
5b6f357fe7 MIPS: create .text sub-sections for assembler functions
Put all functions coded in assembly in sub-sections of
section .text. This allows the linker to garbage collect
unused assembly functions too.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:45 +01:00
Daniel Schwierzeck
113492988b MIPS: fix annotation of _start and relocate_code
Correctly annotate _start and relocate_code as functions to
produce more readable disassembly code generated by objdump.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:45 +01:00
Purna Chandra Mandal
1a96780016 MIPS: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO.
With CONFIG_CMD_GPIO compilation reports error.
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
 #include <asm/gpio.h>
                      ^
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-16 21:06:45 +01:00
Fabio Estevam
b810aa1dd1 mips: Use the generic bitops headers
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-11-05 10:52:26 -05:00
Chris Packham
73a4152b25 mips: Use unsigned int when reading c0 registers
In commit a18a477 (MIPS: use common code from lib/time.c) MIPS platforms
started using common the common timer functions which are based around
the fact that many platforms have a 32-bit free running counter register
that can be used see commit 8dfafdd (Introduce common timer functions).

Even MIPS64 has such a 32-bit register (some have an additional 64-bit free
running counter, but that's something for another time).

The problem is that in __read_32bit_c0_register() we read the value from
this register into an _signed_ int and as it's returned up the call
chain to timer_read_counter() it gets assigned to an unsigned long. On a
32-bit system there is no problem. On a 64-bit system odd things happen,
sign extension seems to kick in and all of a sudden if the counter
register happens to have the MSb (i.e. the sign bit) set the negative
int gets sign extended into a very large unsigned long value. This in
turn throws out things from get_ticks() up.

Update __read_32bit_c0_register() and __read_32bit_c0_ctrl_register() to
use "unsigned int res;" instead of "int res;". There seems to be little
reason to treat these register values as signed. They are either
counters (which by definition are unsigned) or are made up of various
bit fields to be interpreted as per the CPU datasheet.

Reported-by: Sachin Surendran <sachin.surendran@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2015-08-21 15:22:41 +02:00
Daniel Schwierzeck
b11c5d1dc2 MIPS: change 'extern inline' to 'static inline'
The kernel changed it a long time ago. Also this is now broken
on gcc-5.x.

Reported-by: Andy Kennedy <andy.kennedy@adtran.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-07-02 11:29:33 +02:00
Tony Wu
49bbdae318 MIPS: fix missing semicolon in cacheops.h
Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
2015-07-02 11:29:33 +02:00
Paul Burton
ba21a453a5 malta: IDE support
This patch adds IDE support to the MIPS Malta board. The IDE controller
is enabled after probing the PCI bus and otherwise just makes use of
U-boot generic IDE support.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 13:11:02 +01:00
Paul Burton
2b8bcc5a2f MIPS: avoid .set ISA for cache operations
As a step towards unifying the cache maintenance code for mips32 &
mips64 CPUs, stop using ".set <ISA>" directives in the more developed
mips32 version of the code. Instead, when present make use of the GCC
builtin for emitting a cache instruction. When not present, simply don't
bother with the .set directives since U-boot always builds with
-march=mips32 or higher anyway.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:00 +01:00
Daniel Schwierzeck
e520023882 MIPS: add support for pre-relocation malloc
Implement MIPS specific setup of the gd_t structure to support
pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified,
a memory area will be reserved after the initial stack area and
the gd->malloc_base pointer will be initialized.

After this patch the new driver model can be used on MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:07:23 +01:00
Masahiro Yamada
afc366f01b Replace <compiler.h> with <linux/compiler.h>
Including <linux/compiler.h> is enough for general use.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 09:35:46 -05:00
York Sun
2a1680e30e common/board_f: Initialized global data for generic board
Some platforms (tested on mpc85xx, mpc86xx) use global data before calling
function baord_inti_f(). The data should not be cleared later. Any arch
which uses global data in generic board board_init_f() should define
CONFIG_SYS_GENERIC_GLOBAL_DATA.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Simon Glass <sjg@chromium.org>
CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Simon Glass <sjg@chromium.org>
2014-05-12 15:20:05 -04:00
Masahiro Yamada
8e2615752e bd_info: remove bi_barudrate member from struct bd_info
gd->bd->bi_baudrate is a copy of gd->baudrate.

Since baudrate is a common feature for all architectures,
keep gd->baudrate only.

It is true that bi_baudrate was passed to the kernel in that structure
but it was a long time ago.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
2014-05-12 15:19:45 -04:00
Daniel Schwierzeck
538cf92c8c MIPS: drop incaip board
This is dead hardware and no one is interested in making the
necessary changes for upcoming features like generic board or
driver model.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
2014-04-20 13:16:43 +02:00
Paul Burton
9f0868fffb MIPS: allow use of generic board
This patch allows MIPS boards to make use of generic board, replacing
arch/mips/lib/board.c with common/board_{f,r}.c and struct bd_info with
the asm-generic version.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-20 13:16:43 +02:00
Daniel Schwierzeck
37f93f7b79 MIPS: fix types u64 and __u64 to unsigned long long
Linux MIPS uses asm-generic/int-ll64.h in asm/types.h.
Thus u64 and __u64 are defined as unsigned long long. Port this
over to U-Boot.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-03-04 23:18:00 +01:00
Paul Burton
bea12b7823 malta: enable PIIX4 SERIRQ
Whilst U-boot does not require this itself, Linux currently relies upon
it having been muxed and enabled by the bootloader. Thus in order to
preserve compatibility with current kernels before a fix is merged in
Linux we will enable the SERIRQ interrupt and mux it to its pin.

Without doing this current kernels will never receive serial port
interrupts and the end result is typically that userland appears to
hang.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-26 21:49:34 +01:00
Gabor Juhos
10473d0490 malta: use unmapped flash base address
The physical base address of the NOR flash is 0x1e000000
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc00000-0x1fffffff range.

Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.

Since commit a427338b222b43197c2776cbc996936df0302f51
(mips_malta: correct reading MIPS revision at 0x1fc00010)
writing to the mapped address space causes a CPU exception.
Due to the exception, U-Boot hangs during boot when it tries
to detect the CFI flash chip.

Use the correct physical address for the MALTA_FLASH_BASE
constant to fix the problem. In order to avoid relocation
problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
constants.

The change makes it possible to start U-Boot on a Malta
board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
1.5.3).

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
2013-11-15 11:16:59 +01:00
Paul Burton
a3e80904fb malta: arch/mips/include/asm/malta.h SPDX license tag
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-11 12:32:58 +01:00
Paul Burton
81f98bbd62 malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.

This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:02 +01:00
Paul Burton
e0ada6319b malta: display "U-boot" on the LCD screen
Displaying a message on the LCD screen is a simple yet effective way to
show the user that the board has booted successfully.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Paul Burton
baf37f06c5 malta: support for coreFPGA6 boards
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 & msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Paul Burton
fa476f75bf mips32: detect L1 cache sizes if they're not defined
For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &
D-cache line sizes must be the same, as this is not necessarily true.

If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Masahiro Yamada
643aae1406 include: delete include/linux/config.h
Linux Kernel abolished include/linux/config.h long time ago.
(around version v2.6.18..v2.6.19)

We don't need to provide Linux copatibility any more.

This commit deletes include/linux/config.h
and fixes source files not to include this.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-08 15:25:13 -05:00
Masahiro Yamada
0f0f75774e cosmetic: remove empty lines at the top of file
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-08 09:41:37 -05:00
Daniel Schwierzeck
6c154552b0 MIPS: bootm: add support for generic relocation of init ramdisks
All linux kernels after v2.6 require a page-aligned location of
an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to
support this with the generic U-Boot relocation code.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13 11:58:48 +02:00
Daniel Schwierzeck
f66cc1e348 MIPS: bootm: add support for LMB
This is required for init ramdisk relocation and device tree
support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13 11:58:48 +02:00
Gabor Juhos
ac12984de8 MIPS: qemu-malta: setup GT64120 registers as done by YAMON
Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.

This is needed for running Linux kernel.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos
52caee0f36 MIPS: qemu-malta: enable flash support
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos
015643152a MIPS: qemu-malta: add reset support
The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.

Use this feature to implement reset support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Gabor Juhos
5a4dcfac1e MIPS: qemu-malta: add support for emulated MIPS Malta board
Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.

This is enough to boot U-Boot to the command prompt
both in little and big endian mode.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Daniel Schwierzeck
e1208c2fe5 MIPS: asm/errno.h: switch to asm-generic/errno.h
This fixes several warnings like

In file included from ./u-boot/include/linux/mtd/mtd.h:13:0,
                 from env_onenand.c:37:
./u-boot/build/vct_platinumavc_onenand_small/include2/asm/errno.h:52:0: warning: "ENOMSG" redefined [enabled by default]

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-06-08 23:10:10 +02:00
Gabor Juhos
f0550f87f4 MIPS: fix __raw_* IO accessors
The purpose of the __raw* IO accessors is to provide
IO access in native-endian order. However in the current
MIPS implementation, the 16 and 32 bit variants of the
__raw accessors are swapping the values on big-endian
systems if the CONFIG_SWAP_IO_SPACE option is enabled.

The patch changes the IO accessor macros to fix this
broken behaviour.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-06-08 23:10:10 +02:00
Simon Glass
716cc8cc7f Change stub example to use asm-generic/sections.h
We can use the declarations of __bss_start and _end from this header
instead of declaring them locally.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-15 16:13:58 -04:00
Simon Glass
1865286466 Introduce generic link section.h symbol files
We create a separate header file for link symbols defined by the link
scripts. It is helpful to have these all in one place and try to
make them common across architectures. Since Linux already has a similar
file, we bring this in even though many of the symbols there are not
relevant to us.

Each architecture has its own asm/sections.h where symbols specifc to
that architecture can be added. For now everything except AVR32 just
includes the generic header.

One change is needed in arch/avr32/lib/board.c to make this conversion
work.

Reviewed-by: Tom Rini <trini@ti.com> (version 5)
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-15 16:13:58 -04:00
Gabor Juhos
04380c651a MIPS: add dynamic relocation support
The code handles relocation entries with the
following relocation types only:
  mips32: R_MIPS_REL32
  mips64: R_MIPS_REL+R_MIPS_64
  xburst: R_MIPS_REL32

Other relocation entries are skipped without
processing. The code must be extended if other
relocation types must be supported.

Add -pie to LDFLAGS_FINAL to generate the .rel.dyn
fixup table, which will be applied to the relocated
image before transferring control to it.

The CONFIG_NEEDS_MANUAL_RELOC is not needed
after the patch, so remove that as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:13 +01:00
Daniel Schwierzeck
28875e2c47 MIPS: start.S: use symbol __image_copy_end for U-Boot image relocation
Use the newly introduced symbol __image_copy_end as end address for
relocation of U-Boot image. This is needed for dynamic relocation added
in later patches. This patch obsoletes the symbols uboot_end and
uboot_end_data which are removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:13 +01:00
Daniel Schwierzeck
3420bf1ca0 MIPS: u-boot.lds: introduce symbol __image_copy_end
This symbol is used in later patches as end address
for relocation of the U-Boot image into RAM.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:12 +01:00
Daniel Schwierzeck
a52852c5a6 MIPS: u-boot.lds: merge all BSS sections and introduce symbols __bss_[start|end]
These symbols are used in later patches for as addresses for
clearing the BSS area in the relocated U-Boot image.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:12 +01:00