For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.
e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.
Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.
This patch is tested with SST39LF040.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Stefan Roese <sr@denx.de>
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Pandora is using both SDRC CSes. The MUX setting is needed
for the second CS clock signal to allow the 2 RAM parts to
be put in self-refresh correctly.
Based on similar patch for beagle and overo by
Jean Pihet and Steve Sakoman.
Set pullups or pulldowns for GPIOs which need them.
Disable them for others, which have external pulls.
Also make disabled pull setting consistent (some pins had
type set to "up" even if pull type selection was disabled).
Setup pin mux for GPIO pins connected on rev3 or later
boards. Also change NUB2 IRQ pin. This should not affect
older boards because they don't have any nubs (analog
controllers) attached to them.
ehci-hcd.c: In function 'ehci_submit_root':
ehci-hcd.c:719: warning: value computed is not used
ehci-hcd.c:748: warning: value computed is not used
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
ESPT-Giga is SH7763-based reference board.
Board support is relatively sparse, presently supporting serial,
gigabit ethernet, USB host, and MTD.
More information (in Japanese) available at:
http://www.cente.jp/product/cente_hard/ESPT-Giga.html
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Remove symlinking of files located outside api_examples/
* Auto generate dependencies for files located outside api_examples/
* Update names of variables to be similar to those in tools/Makefile
* Fix out of tree build error
Dependencies are calculated for all files in the SRCS variable.
Previously, the SRCS variable contained files which were symlinked
into the api_examples/ directory. These symlinked files did not exist
when dependencies were calculated when building out of tree. This
resulted in errors such as:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/api_examples/.depend', needed by `_depend'. Stop.
make[1]: Leaving directory `/home/wd/git/u-boot/work/api_examples'
make: *** [depend] Error 2
Since symlinked source files are no longer used, this bug no longer
exists.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
This cleans up the Makefile a bit and simplifies future changes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Add support for the Phytec phyCORE-MPC5200B-tiny.
Code originally from Pengutronix.de.
Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on
Timer 0/1
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
The current kallsyms code is using \\0 to escape the backslash in the awk
code, but the shell too needs escaping. This way we make sure gcc is
passed the \0. Then gcc itself will consume this as an octal, so we have
to use 000 so gcc will create the final NUL.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The cm-bf561 module can easily hook up to the EXT-BF5xx-USB-ETH2 extender
board, so add a simple example of how to do that in the board config.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The latest blackstamp boards can only run the SPI flash at 15MHz before
they start to crap out, so lower the max speeds accordingly. The new SPI
flash also has different sector requirements, so update the environment
sizes as well.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A few debug-type commands used to dump the raw icache/dcache data. Useful
when trying to track down cache-related bugs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Current code only sets the PCI vendor id to 0x1014 and
leaved device id to 0x0000.
Ths patch ....
a) uses the correct PCI_VENDOR_ID_IBM macro for this
b) sets the default device ID as stated in the UM to 0x0156
by using PCI_DEVICE_ID_IBM_405GP for this.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some basic PCI initialisation from the 4xx cpu_init_f()
to cpu/ppc4xx/4xx_pci.c.
The original cpu_init_f() function enabled the 405EP's internal arbiter
in all situations. Also the HCE bit in cpc0_pci is always set.
The first is not really wanted for PCI adapter designs and the latter
is a general bug for PCI adapter U-Boots. Because it enables
PCI configuration by the system CPU even when the PCI configuration has
not been setup by the 405EP. The one and only correct place is
in pci_405gp_init() (see "Set HCE bit" comment).
So for compatibility reasons the arbiter is still enabled in any case,
but from weak pci_pre_init() so that it can be replaced by board specific
code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
It fixes the access to the 'ehci' struct elements for mpc83xx which
should have been taken care of in 4ef01010aa
Sorry about that.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes the access to the 'ehci' struct elements which should
have been taken care off in 4ef01010aa
Sorry about that.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
These functions are no longer defined, so remove their prototypes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch use blackfin errno.h implementation which
correspond Linux kernel one.
MIPS implemetation is different that's why I keep it.
I removed ppc_error_no.h from Marvell boards which
was the same too.
I have got ack from ppc40x, blackfin, arm, coldfire and avr custodians.
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Check that an argument is passed to ubifsmount and that addresses and
sizes are actually numbers for ubifsload. Also improve the instructions
a bit.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
The VID header offset is sometimes needed to initialize the UBI
partition. This patch adds it (optionally) to the command line
for the ubi part command.
(Lines have been properly wrapped since last version)
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a NAND driver for the Marvell Kirkwood SoC's
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch makes pll_write on PPC405EP boards
global and callable from C code.
pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.
board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch implements the is_pci_host() function in a similiar way
as it is used on 440 targets.
The former path with CONFIG_PCI_HOST == PCI_HOST_AUTO does not
build on 405EP targets because checking the PCI arbiter is different.
So putting the fixed code into a separate function makes the code
more readable.
Also using is_pci_host() on 405 brings 405 and 440 PCI code
a little bit closer.
In preparation for an upcoming 405EP based PMC module I made this
function weak so that it can be overwritten from board specific code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a debug compilation error for PPC4xx platforms, all
other architectures are not affected by this change. The 'handler'
pointer was undefined. The fix is exercised and has effect only if
DEBUG is defined.
Signed-off-by: Alessio Centazzo acpatin@yahoo.com
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes printf format string compilation warnings in several
debug statements. It also fixes the dump of DDR controller MQ registers
found on some 44x and 46x platforms. The current register dump code
uses incorrect DCRs to access these registers.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
First, NAND EBC mapping was missing, making Linux NAND driver
unusable on this board. Second, NOR remapping code assumed that
NOR is always on CS0, however when booting from NAND NOR is on CS3.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
