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67848 commits

Author SHA1 Message Date
Michal Simek
076617847a env: Kconfig: Add missing dependency for ENV_IS_IN_EXT4
ENV_IS_IN_EXT4 also need to enable FS_EXT4 which is not covered in Kconfig.
Kconfig reports this as:
WARNING: unmet direct dependencies detected for EXT4_WRITE
  Depends on [n]: FS_EXT4 [=n]
  Selected by [y]:
  - ENV_IS_IN_EXT4 [=y] && !CHAIN_OF_TRUST [=n]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:58 -04:00
Michal Simek
7b56432c7b arc: Kconfig: Add missing DM dependency
ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.

Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
  Depends on [n]: DM [=n]
  Selected by [y]:
  - ARC [=y] && <choice>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27 11:26:58 -04:00
Michal Simek
6e741cfa93 cmd: Kconfig: Change dependency for CMD_ADC
CMD_ADC selected DM_REGULATOR unconditionally without enabling DM.
That's why change select to depends on to cover it.

Kconfig is showing this issue as:
WARNING: unmet direct dependencies detected for REGMAP
  Depends on [n]: DM [=n]
  Selected by [y]:
  - DM_REGULATOR_PBIAS [=y] && DM_REGULATOR [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Update CMD_ADC=y configs to enable DM_REGULATOR now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:26:39 -04:00
Michal Simek
a261fdce38 pci: kconfig: Setup proper dependency for PCIE_ROCKCHIP
There is missing dependency for PCIE_ROCKCHIP which selects
PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP.

WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE
  Depends on [n]: ARCH_ROCKCHIP [=n]
  Selected by [y]:
  - PCIE_ROCKCHIP [=y] && PCI [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:20:33 -04:00
Ruben Di Battista
67e62c7468 drivers: usb: Fix config indentation
The indentation was messing up with the scripts/build-whitelist.sh that
was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the
other indented options) erroneously as ad-hoc configure option with the
following error:

```
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
```
2020-08-27 11:20:33 -04:00
Tom Rini
f87c80ade3 Prepare v2020.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26 17:30:22 -04:00
Tom Rini
d86bf9124f configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26 17:26:24 -04:00
Stefan Roese
bac9da46c5 asm-generic/u-boot.h: Remove bi_memstart & bi_memsize from bd_info
bi_memstart & bi_memsize are now not referenced any more. This patch
removes their definitions from the bd_info struct.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-26 09:20:05 +02:00
Stefan Roese
60ebf5fb4e cmd: bdinfo: Remove print of superseeded bi_memstart / bi_memsize values
Remove printing of the superseeded (by bi_dram[]) memory values from the
bdinfo command.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-26 09:20:00 +02:00
Stefan Roese
e516404ee5 powerpc: Remove bi_memstart & bi_memsize assignments in spl.c
Most likely these deprecated (removed) variables are not needed. Lets
remove the assignments completely from all spl.c files.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Oleksandr Zhadan and Michael Durrant
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-26 09:19:54 +02:00
Stefan Roese
063d547cac video: cfb_console.c: Use bi_dram[] values on all platforms
All platforms support bi_dram[] since quite some time. Lets remove the
and bi_memsize values completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-26 09:19:50 +02:00
Stefan Roese
0f8d400b1b xtensa: Remove local no-op dram_init_banksize()
When this no-op dram_init_banksize() is removed, the weak default will
be used instead, which correctly sets the bi_dram[] banksize values.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-26 09:19:45 +02:00
Stefan Roese
b59cc516a1 xtensa: Remove arch_setup_bdinfo()
arch_setup_bdinfo() only configures the deprecated bi_memstart &
bi_memsize values, which should not be needed any more. Lets remove
this file completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-26 09:19:40 +02:00
Stefan Roese
e207f2256f global: Move from bi_memstart/memsize -> gd->ram_base/ram_size
With the planned removal of bi_memstart & bi_memsize, this patch now
moves the references to the better suiting gd->ram_base/ram_size
variables.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-26 09:19:34 +02:00
Stefan Roese
f120aa7522 board_f: Add default values for bi_dram[] in dram_init_banksize()
Remove the bi_memstart / bi_memsize assignment in setup_bdinfo() and
make sure, that bd_dram[] is always configured in the weak default
implementation of dram_init_banksize(), when CONFIG_SYS_SDRAM_BASE is
not set.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-26 09:19:28 +02:00
Stefan Roese
4963f63fe6 image: Use gd->ram_base/_size in env_get_bootm_size()
Use only gd->ram_base/_size in env_get_bootm_size() instead of bi_dram[]
in some cases and bi_memstart in others.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-26 09:19:23 +02:00
Stefan Roese
dfaf6a5797 CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always defined
Since commit 86cf1c8285 ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-26 09:19:16 +02:00
Tom Rini
7a1a01c602 For 2020.10
-----------
 
 - mx6: SOCs user selectable
        Fix for imx6q_logic
        Some DM conversion
 - mx7: introduce secondary boot device
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCX0UiVw8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76bhlACgj8NxL/lQcxfcaI4Dwfic5Mz5EiwAnihxUGff
 KQdAHwZpCj4NOby3VRGz
 =BI7Q
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200825' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2020.10
-----------

- mx6: SOCs user selectable
       Fix for imx6q_logic
       Some DM conversion
- mx7: introduce secondary boot device

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-25 23:12:43 -04:00
Tom Rini
9f9ecd3e4d Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25 13:38:29 -04:00
Tom Rini
ec54217ddc Merge tag 'i2c-bugfixes-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for v2020.10
- fix some issues with octeon_i2c driver on ARM Octeon TX2
- fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
2020-08-25 08:19:41 -04:00
Tom Rini
e49a9d4ddb Merge tag 'u-boot-rockchip-20200820' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3399 evb sdcard support
- Fix for SPL_LED support
2020-08-25 08:19:14 -04:00
Tom Rini
078656186f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
2020-08-25 08:18:50 -04:00
Tom Rini
8ee3a24fdc Merge branch '2020-08-24-misc-improvements'
- Squashfs compression support
- Coverity fixes
- XEN guest updates
- Finish previous MediaTek updates
- Arm Total Compute platform support
2020-08-25 08:12:05 -04:00
Stefan Roese
6944937f9c x86: qemu-x86_defconfig: Increase CONFIG_SYS_MALLOC_F_LEN
With the upcoming increase of the malloc area in U-Boot
("pci: pci-uclass: Dynamically allocate the PCI regions"), the CI QEMU
x86 test fails:

U-Boot 2020.10-rc2-g0a668f6d38 (Aug 25 2020 - 06:12:51 +0000)

alloc space exhausted
Error binding driver 'cpu_qemu': -12
Some drivers failed to bind
alloc space exhausted
initcall sequence fff6a760 failed at call fff13b3d (err=-19)

This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is
already used on qemu-x86_64_defconfig.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 11:37:57 +02:00
Grygorii Tertychnyi
acbc1d86f1 imx8m: config: convert to bootm_size
Restrict the memory range available for image processing in the
"bootm" to 256 MiB so the kernel can access it and FDT or initrd are
not overwritten on ARM64.

Signed-off-by: Grygorii Tertychnyi <grygorii.tertychnyi@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-25 10:26:38 +02:00
Adam Ford
74d8f9d562 ARM: imx6q_logic: Fix broken booting by moving fdt_addr_r address
The loading address is too close to the kernel address, so newer kernels
may overlap memory space, so loading the device tree may corrupt zImage.

This patch moves the fdt_addr_r to 0x14000000 which is also consistent
with guidance that the kernel be allocated 32MB.  This places it
in the same place as the ramdisk, so this patch moves the ramdisk address
512KB after the fdt.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-25 10:26:31 +02:00
Fabio Estevam
821a987fec pico-imx6: Remove unneeded CONFIG_DM_MDIO
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:

"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."

i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-08-25 10:26:24 +02:00
Tom Rini
f27ffe4177 arm: mx6: Make all i.MX6 SoCs user-selectable
We have a number of platforms that are a combination of a carrier board
and System-on-Module (SoM) that in turn allows for the board to have
different SoCs on it.  In some cases, this is handled via board-specific
Kconfig options.  In other cases we make use of
CONFIG_SYS_EXTRA_OPTIONS.  This latter case however can lead to invalid
configurations as we will not in turn get options that in Kconfig are
selected by or depend on that setting.

To resolve this, make the SoC option a choice in Kconfig and make boards
depend on what they can support.  This change opens us up for further
clean-ups in the cases where a single CONFIG_TARGET_xxx can support
different SoCs and today they do not, or do not cleanly do so.

Reported-by: Matt Porter <mporter@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Soeren Moch <smoch@web.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ian Ray <ian.ray@ge.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Cc: Simone CIANNI <simone.cianni@bticino.it>
Cc: Adam Ford <aford173@gmail.com>
Cc: Marcin Niestroj <m.niestroj@grinn-global.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Parthiban Nallathambi <parthiban@linumiz.com>
Cc: Marek Vasut <marex@denx.de>
Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Niel Fourie <lusus@denx.de>
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Silvio Fricke <open-source@softing.de>
Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-08-25 10:26:14 +02:00
Suneel Garapati
0a668f6d38 arm: octeontx2: Add support for OcteonTX2 SoC platforms
This patch adds support for all OcteonTX2 96xx/95xx
boards from Marvell.
For 96xx boards, use octeontx_96xx_defconfig and
for 95xx boards, use octeontx_95xx_defconfig.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
03c2288070 arm: octeontx: Add support for OcteonTX SoC platforms
This patch adds support for all OcteonTX 81xx/83xx
boards from Marvell.
For 81xx boards, use octeontx_81xx_defconfig and
for 83xx boards, use octeontx_83xx_defconfig.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
af6ba90048 watchdog: Add reset support for OcteonTX / TX2
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2
platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
708598997d mmc: Add MMC controller driver for OcteonTX / TX2
Adds support for MMC controllers found on OcteonTX or
OcteonTX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
638d705a54 pci: Add PCI controller driver for OcteonTX / TX2
Adds support for PCI ECAM/PEM controllers found on OcteonTX
or OcteonTX2 SoC platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
3f6f0cd8fd ata: ahci: Add BAR index quirk for Cavium PCI SATA device
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
04cd0a0fa0 arm: octeontx2: Add headers for OcteonTX2
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
387d321add arm: octeontx: Add headers for OcteonTX
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
c2f45b6588 arm: include/asm/io.h: Add 64bit clrbits and setbits helpers
Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
f0c369284d pci: pci-uclass: Check validity of ofnode
Add check if the referenced ofnode is valid.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
a3fac3f395 pci: pci-uclass: Add support for Alternate-RoutingID capability
If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
51eeae91c5 pci: pci-uclass: Add VF BAR map support for Enhanced Allocation
Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
b8852dcfcb pci: pci-uclass: Add support for Single-Root I/O Virtualization
SR-IOV - Single Root I/O Virtualization
PF - Physical Function VF - Virtual Function

If SR-IOV capability is present, use it to initialize Virtual Function
PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from Physical
function device driver which expects VF device support, creating
minimal impact on existing framework.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
636cc1773a pci: pci-uclass: Add support for Enhanced Allocation in Bridges
If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
4cf56ec07f pci: pci-uclass: Add multi entry support for memory regions
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Trommel, Kees (Contractor)
660606091f Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
Fix for the case of a U-Boot configuration with CONFIG_SPL,
CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no
CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because
dm_write_i2c does not exist because CONFIG_SPL_DM is not defined.

Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com>
Cc:  Heiko Schocher <hs@denx.de>
2020-08-25 06:25:42 +02:00
Stefan Roese
af03bde0fa i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 support
This patch fixes a few issues noticed, when testing this new driver on
ARM Octeon TX2 again. Here the details:

- Remove "common.h" header inclusion
- Use correct THP define on Octeon TX2
- Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish
  both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi"
  compatible and add a check to the Octeon TX2 specific
  "cavium,thunderx-i2c" so that the correct driver data is selected.
- Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE()
  as its not needed for the PCI based probing on Octeon TX2

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25 06:21:23 +02:00
Suneel Garapati
bc30140d20 pci: pci-uclass: Make DT subnode parse optional
Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Suneel Garapati
b3699a13a6 pci: pci-uclass: Fix incorrect argument in map_physmem
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar().
Additinally minor spelling correction.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
e002474158 pci: pci-uclass: Dynamically allocate the PCI regions
Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.

Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
65f8c7edd8 ARM: renesas: Drop unnecessary function ft_board_setup()
Marek explained on IRC, that ft_board_setup() is not used / necessary
at all. So its best to just drop it completely, as it interferes with
the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed).

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Stefan Roese
3b7cd265b8 pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00