Commit graph

35362 commits

Author SHA1 Message Date
Michal Simek
af813acd48 ARM64: zynqmp: Add support for SD1 boot mode
SD1 boot mode is using different bootmode values.
Add support for this mode used on DC1.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Siva Durga Prasad Paladugu
0a5bcc8c0d ARM64: zynqmp: Modify the SD and QSPI bootmode values
Modify the SD bootmode value to 0x3 as per latest
spec. Also add new boot mode QSPI 32 bit boot mode

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Soren Brinkmann
0d90e9d851 ARM64: zynqmp: DT: Fix UART compatible string
ZynqMP has r1p12 not r1p8. r1p12 contains break detection support.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Punnaiah Choudary Kalluri
d3fd433f07 ARM64: zynqmp: Correct the watchdog timer interrupt number
Corrected the watchdog timer interrupt number.
Origin value was for CSUPMU watchdog.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Michal Simek
cb9dcc6eaa ARM64: zynqmp: Fix coding style in phy node
Trivial fix.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Michal Simek
be6f6af1d6 ARM64: zynqmp: Add initial support for the first silicon
Add basic configuration for the first silicon.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Michal Simek
0785dfd8a7 ARM64: zynqmp: Use the same U-Boot version with/without ATF
Remove SECURE_IOU option which is not needed. U-Boot itself can detect
which EL level it is on and based on that use do platform setup.
It also simplify usage because one Kconfig entry is gone.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Michal Simek
d041e3e157 ARM64: zynqmp: Remove incorrect link to common config file
Link to zynqmp common file is incorrect. Fix it by removing the whole
link because it is visible from the file where to look at it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Siva Durga Prasad Paladugu
c061d5b3dd ARM64: zynqmp: ep: Define minimum sdhci frequency for ep
Define minimum sdhci frequency for ep, as not defining
it causes the divisor to be 2048 as per sd version but
keeping clock very low on ep causes command failures.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
7ebf67a34c ARM: zynq: Move spi node to aligned location
Keep nodes aligned.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
1c5e069b6f ARM: zynq: Fix defconfig for zybo
Change possition of SPI_FLASH to by align with savedefconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
4691941b45 ARM: zynq: Fix all remaining zynq platform to use stdout-path
Fix console setup for all remaining zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
e5c343dddc ARM: zynq: Clean DTSI coding style
Fix minor indentation problems.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
dce7e11fe1 ARM: zynq: Move FLASH_BAR to Kconfig
Clean up config and use Kconfig more.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
448bce733c ARM: zynq: Enable SPI_FLASH for zc770 xm013 platform
Enable SPI flash.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Siva Durga Prasad Paladugu
c5ca2db63b ARM: zynq: Define sys prompt for all Zynq boards
Define CONFIG_SYS_PROMPT for all Zynq boards

It was removed by:
"kconfig: add config option for shell prompt"
(sha1: 181bd9dc61)

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
eb04ab3492 ARM: zynq: Do not select options if SPL is not enabled
Zynq setups some default options for SPL but not all targets are
enabling SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Michal Simek
67b2904819 ARM: zynq: Remove memory division by 2 for ECC case
For ECC case u-boot divided memory by 2 because one u-boot could be used
for both cases when ECC is off or on.
Remove this division and make sure that dts file contain the correct
memory size when ECC is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:55 +01:00
Siva Durga Prasad Paladugu
b215614638 mmc: zynq_sdhci: Added qurik to disable high speed
Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
4297900260 mmc: sdhci: Clear high speed if not supported
Clear high speed bit if it was not supported by
the driver.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
a57a4a5d83 sdhci: zynq: Remove hardcoded value zero as min frequency
Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
f17ea71d3a net: zynq: Change MDC setup for arm64
MDC setting depends on pclk input clocks which varies across SoC. This
driver is used by xilinx zynq and zynqmp SOC.
Input clock frequence on silicon is 125MHz where divider 64 put
frequency below 2.5MHz requires by spec (125/64=1.95).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
0179063273 net: phy: ti: Enable automatic crossover mode
Enable automatic crossover cable detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:54 +01:00
Michal Simek
842efb3a93 serial: zynq: Fix address reading from DM
Use dev_get_addr() instead of reading reg base directly in the driver.
Core function is also more robust.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
a2533183c0 serial: zynq: Extend compatible string list
ZynqMP is using updated core with cdns,uart-r1p12 compatible string.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
455ad585ee fpga: Fix compilation warnings
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
ddbcf8f2c2 fpga: Add bitstream type BIT_NONE
Add bitstream type BIT_NONE to the bitstream type
enum. This might be useful while loading bitstreams
in respective drivers.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
f72132673a fpga: xilinx: Check for substring in device ID validation
Check for substrings in deviceID validation check
so that it can support xa bitstreams also.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
38c4761c23 microblaze: Fix board_init calling sequence
board_init() is in final elf file but it is not called at all.
Use board_init_late() instead and call gpio_init() from it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
077fe0f5e7 microblaze: Enable HUSH via Kconfig
Cleanup board file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
44a3a91cb0 microblaze: Read information about RAM from DT
Do not setup ram start/size in board file. Read it from DT instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
85916e29df microblaze: Remove empty file - cpu.c
No need to have empty unused file in architecture code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
b11ec1ab9a microblaze: Move CONFIG_NETCONSOLE to Kconfig
Cleanup board file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
27f24a3d62 microblaze: Remove CONFIG_FIT from board file
And enable it via defconfig by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
ed982b4d41 microblaze: Remove systemace from board file
Systemace is ancient IP which is not tested. Remove it from default
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
502547e8ba microblaze: Move eth configuration to Kconfig
Cleanup board specific file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
83b76d9ef7 microblaze: Enable axi emac via Kconfig
Enable driver by default for all platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
3229c869aa net: emaclite: Move emaclite to Kconfig
Add PHYLIB and MII dependencies and enable it by default for Microblaze.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
f412b6ab5b net: emaclite: Let core to handle received packet
Pass pointer to core to handle packet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:52 +01:00
Michal Simek
f03ec01015 net: emaclite: Rename start and stop functions
Rename start and stop functions to align with DM functions names.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:52 +01:00
Michal Simek
d538ee1b54 net: emaclite: Move driver to DM
Move driver to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
4d2749be62 net: emaclite: Use indirect access in emaclite_recv
When IP is configured with pong buffers, IP is receiving packets to ping
and then to pong buffer and than ping again.
The original logic in the driver remains there that when ping buffer is
free, pong buffer is checked too and return if both are free.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:52 +01:00
Michal Simek
0070251836 net: emaclite: Use indirect reg access in send
The original logic in the driver was exchanging buffers which are used for
sending packet and tx_ping and tx_pong buffers were exchanged all the
time to ensure that IP has enough time to send the packet out.
Based on this "feature" send function was using nextbuffertouse variable
to save which buffer should be used.
Before this algorithm was called driver checked that there is free
buffer available.
This checking remains in the driver but driver tries to use tx_ping
first if available. If not, tx_pong buffer is used instead.
To reach this code the original condition is met that at least one of the
buffer should be available.
Testing doesn't show any performance drop when this patch is applied.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
15c239c8ce net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flag
This flag is not documented anywhere in the latest documentation that's
why this patch removes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
26c7945a24 net: emaclite: Fix logic around available TX buffers
Simplify logic how to find out if there is free TX buffer.
Both buffers are checked all the time that's why logic around order
can be removed.
Also add check when only one buffer is available.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
5a4baa33e4 net: emaclite: Use indirect register access for TX reset
Move to use indirect register access when timeout expires for resetting
TX buffers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
3af709092c net: emaclite: Use indirect register access for rx_ping/pong
Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:51 +01:00
Michal Simek
a0b2bfb0bf net: emaclite: Use indirect register access for tx_ping/pong
Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
9a23c49662 net: emaclite: Convert MDIO to use register offset
Use u-boot coding style how to setup and access MDIO bus.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
d722e8641b net: emaclite: Add MDIO support to driver
Add MDIO support before move to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00