Commit graph

223 commits

Author SHA1 Message Date
York Sun
cd4b0c5fea armv8: mmu: Add support of non-identical mapping
Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-15 09:01:43 -07:00
Masahiro Yamada
e64a6b1141 ARM: uniphier: add external IRQ setup code
I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:30 +09:00
Masahiro Yamada
4cb9399e9b ARM: uniphier: fix typo "talbe"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30 23:49:26 +09:00
Marek Vasut
2b1cdafa9f common: Pass the boot device into spl_boot_mode()
The SPL code already knows which boot device it calls the spl_boot_mode()
on, so pass that information into the function. This allows the code of
spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
board_boot_order() correctly alter the behavior of the boot process.

The later one is important, since in certain cases, it is desired that
spl_boot_device() return value be overriden using board_boot_order().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[add newly introduced zynq variant]
Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Masahiro Yamada
51ea5a060d ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20
The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically.  This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment.  Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training.  The memory regions must be reserved in DT before jumping
to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux.  Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-20 07:15:33 +09:00
Masahiro Yamada
18c1198667 ARM: uniphier: move CONFIG_ARMV8_MULTIENTRY to Kconfig
I just did not notice this option had an entry in Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-20 07:15:28 +09:00
Masahiro Yamada
48efc8a25b ARM: uniphier: introduce CONFIG_ARM_UNIPHIER_{32, 64}BIT
This will make it easier to select config options specific to
particular ARM processor generation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-20 07:15:22 +09:00
Masahiro Yamada
9c2f9b2da6 ARM: uniphier: insert dsb barrier to ensure visibility of store
I noticed secondary CPUs sometimes fail to wake up, and the root
cause is that the sev instruction wakes up slave CPUs before the
preceding the register write is observed by them.

The read-back of the accessed register does not guarantee the order.
In order to ensure the order between the register write and the sev
instruction, a dsb instruction should be executed prior to the sev.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-09 08:19:13 +09:00
Masahiro Yamada
4565a74d56 ARM: uniphier: do not overwrite fdt_file environment
This code auto-detects the best-match FDT file name, but it should
respect the user's choice if "fdt_file" environment is found in a
saved set of environments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-09 08:18:34 +09:00
Masahiro Yamada
80630dad9d ARM: uniphier: check return code of setenv()
Because setenv() may fail, it is better to check its return code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-09 08:18:25 +09:00
Masahiro Yamada
7760b49fa7 ARM: uniphier: fix boot mode for PH1-LD11
This function is shared between PH1-LD11 and PH1-LD20.  The difference
is the boot-mode latch for the USB boot mode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-09 08:17:59 +09:00
Masahiro Yamada
adb3928f15 ARM: uniphier: support eMMC boot for PH1-LD11 and PH1-LD20
The Boot ROM on PH1-LD11/LD20 exports built-in APIs to load images
from an eMMC device.  They are useful to reduce the memory footprint
of SPL, rather than compiling the whole MMC framework.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-09 08:17:49 +09:00
Masahiro Yamada
667dbcd01d ARM: uniphier: add PH1-LD11 SoC support
This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:37:13 +09:00
Masahiro Yamada
7381db86a9 ARM: uniphier: rename UMC register macros of PH1-LD20
Correct some register names.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:36:58 +09:00
Masahiro Yamada
0586e22783 ARM: uniphier: rename umc-ld20-regs.h to umc64-regs.h
This header will be shared between PH1-LD11 and PH1-LD20
(and hopefully new ARMv8 SoCs developed in the future),
so umc64-regs.h would be a better fit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00
Masahiro Yamada
6a555b214b ARM: uniphier: clean up boot mode tables
Tidy up alignment of open parentheses.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00
Masahiro Yamada
0bd20207ab ARM: uniphier: disable cache in SPL of PH1-LD20
The Boot ROM has enabled D-cache and MMU setting DDR memory area
as Normal Memory in its page table.  Disable D-cache and MMU
before jumping to U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00
Robert P. J. Day
1cc0a9f496 Fix various typos, scattered over the code.
Spelling corrections for (among other things):

* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
* emulation
* controller
2016-05-05 21:39:26 -04:00
Masahiro Yamada
bef4b024e9 ARM: uniphier: move pin-mux code into pin_init function
The code in uniphier_sld3_sbc_init() is pin-muxing, so it would
be a better fit in uniphier_sld3_early_pin_init().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-01 01:13:45 +09:00
Masahiro Yamada
5eb4150e84 ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20
The System Bus is not available by default on the ROM boot mode of
PH1-LD20.  To use devices connected to the System Bus, such as the
Micro Support Card, it is necessary to set up pin-muxing and some
System Bus Controller register.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-01 01:09:18 +09:00
Masahiro Yamada
1dce5eb9de ARM: uniphier: enable Peripherl clock to use UART in SPL
This is needed to use UART on SPL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-01 01:09:17 +09:00
Masahiro Yamada
68340966e6 ARM: uniphier: fix boot mode table of PH1-LD20
PH1-LD20 does not have the dedicated boot swap select latch.
Instead, it is controlled from the boot mode select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-01 01:09:11 +09:00
Masahiro Yamada
9d0c2ceb35 ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:54:08 +09:00
Masahiro Yamada
881aa5a79a ARM: uniphier: rework uniphier_set_fdt_file()
The current table look-up for the DTB file name turned out bothersome
in terms of maintainability; I ended up adding a new entry every time
a new board is supported.

There is a common pattern between the DT compatible string and the
corresponding file name; drop the vendor prefix "socionext," and
prefix it with "uniphier-" and suffix it with ".dtb".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:54:03 +09:00
Masahiro Yamada
d90b9745ea ARM: uniphier: carry on booting for Unknown boot mode
No need to stop booting U-Boot even if boot mode is unknown.
Setting the "bootmode" environment is only useful for booting
Linux Kernel.  Anyway, U-Boot has already booted by this point.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:53:57 +09:00
Masahiro Yamada
612ccd9001 ARM: uniphier: add sg_set_iectrl_range()
For PH1-LD20 or later, per-pin input-enable control is supported,
that is, we need to set-up IECTRL registers for a group of pins.
This helper function will be useful for a bunch of register settings.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:53:57 +09:00
Masahiro Yamada
7b3a032dd3 ARM: uniphier: avoid unaligned access to DT on 64bit SoC
Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:53:55 +09:00
Hans de Goede
c09d29057a arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code
v7_maint_dcache_all() does not work reliable when build with gcc6,
see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788

While debugging this I learned that v7_maint_dcache_all() is unreliable
when build with gcc5 too when it is marked as noinline.

This commit fixes the reliability issues by replacing the C-code with
the ready to use asm implementation from the kernel.

Given that this code when written as C-code clearly is quite fragile
(also see the existing comments about the C-code being the way it is
 to get optimal assembly) and that we have a proven asm alternative,
I believe that this is the best solution.

Note that we actually already had a copy of the kernel's
v7_flush_dcache_all() before this commit in
arch/arm/mach-uniphier/arm32/lowlevel_init.S.

This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames
it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper
which saves / restores the clobbered registers for use from C-code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-11 20:48:26 -04:00
Masahiro Yamada
6797630685 cosmetic: Fix typos "privide"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
5b66006646 ARM: uniphier: rename function names ph1_* to uniphier_*
Eliminate the "ph1"_ prefixes from function names because "uniphier_"
describes the SoC familiy better.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
a75ecfc2a6 ARM: uniphier: add pin-mux settings for NAND, eMMC, SD of PH1-sLD3
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
ac2a1030e3 ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64
Currently, these functions assume #address-cells and #size-cells are
both one.  Fix them to support 64bit DTB.

Also, I am fixing a buffer overrun bug while I am here.  The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS.  The number of
iteration in the loop should be limited by that CONFIG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
cbbc2d80fc ARM: uniphier: add NOR boot support
This allows to boot from NOR flash (or SRAM) with help of an external
loader (NOR-loader).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:41 +09:00
Masahiro Yamada
d5cf32977f ARM: uniphier: support Debug UART
For ARM32 architecture, CONFIG_DEBUG_LL is available for early
low-level debugging (and actually UniPhier 32bit SoCs use it), but
ARM64 architecture does not support it.  Instead, CONFIG_DEBUG_UART
is available as an architecture-independent debug facility.

This commit supports it on all the UniPhier SoCs (including the new
ARMv8 SoCs), which is very useful for new SoC bringups.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:41 +09:00
Masahiro Yamada
650aedbfc0 ARM: uniphier: add System Control register macros for ARMv8 SoCs
The System Control block moved to a completely different register
map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones.
Define register macros in a new header file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:22 +09:00
Masahiro Yamada
c8cc7213a5 ARM: uniphier: add sg_set_iectrl() function
This helper function would be useful for new SoCs with per-pin
input enable controlling, such as PH1-LD20, PH1-LD11, etc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:21 +09:00
Masahiro Yamada
f6c65bc2fa ARM: uniphier: enable DDR PHY parameter dump commands by default
These commands are not necessarily needed for usual operations
(they are useful in case of DDR memory trouble), but enabling them
by default would be nice in terms of the compilation test coverage.
They are small enough, so limited impact on the memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:20 +09:00
Masahiro Yamada
36223f5de8 ARM: uniphier: add work-around to support Micro Support Card v3.6.10
Due to some hardware guy's awful work, this version is not compatible
with v3.6: the logic of BIT(0) of the reset logic is inverted! (and
v3.6.10 is horribly wrong in multiple ways), but this is what we have
to solve now.

The v3.6 expects 0x0000 set to the register for reset de-assertion,
while v3.6 does 0x0001.

This commit (ab)uses another bug of v3.6.10 to work around the issue.
The UniPhier System Bus is a 16-bit bus, which this support card is
connected to.  A 32-bit write to the bus (writel() function call) is
divided into two 16-bit write transactions, with LSB the first.  What
is amazing for v3.6.10 is that access to address 4N + 2 goes to 4N
(Jesus Christ!).

For clarification, things are like this:

    writel(0x00010000, MICRO_SUPPORT_CARD_RESET);

is done with two bus transactions as follows

    [1] write 0x0000 to address MICRO_SUPPORT_CARD
    [2] write 0x0001 to address MICRO_SUPPORT_CARD + 2

For v3.6, [1] is written to the register and [2] is correctly ignored
because there is nothing at the address MICRO_SUPPORT_CARD + 2.  This
is what we expect.

For v3.6.10, [1] is written to the reset register and then [2] is
over-written to the same register due to the bus access bug.

For the latter, it produces a glitch signal to the BIT[0], so the
device state is lost due to the reset pulse.  This solution only
works for the start-up code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:19 +09:00
Masahiro Yamada
1b1f2319ca ARM: uniphier: drop ifdef in ddrphy-regs.h
The ifdef conditionals in header files prevent us from multi-SoC
support in a single U-Boot image.  Detect SoC specific parameters
run-time rather than define them statically with an ifdef in
ddrphy-regs.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:19 +09:00
Masahiro Yamada
5d0607c58c ARM: uniphier: refactor SBC init code
There is a bunch of duplication in the System Bus Controller init
code.  Roughly, there are two types in the SBC mode:  Adress/Data
Multiplex Mode and Save Pins Mode.  Consolidate per-SoC functions
into the two, plus per-SoC optional init code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:18 +09:00
Masahiro Yamada
ea65c98050 ARM: uniphier: drop PH1- prefix from CONFIG options and file names
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:42:13 +09:00
Masahiro Yamada
5d07648662 ARM: uniphier: allow debug_ll_init() to do nothing for unknown SoCs
This function should just return for unknown SoCs rather than writing
unexpected values to registers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-09 01:11:15 +09:00
Masahiro Yamada
51244a6080 ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=y
The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit
46abfcc99e ("ARM: uniphier: rework struct uniphier_board_data").

Fixes: 46abfcc99e ("ARM: uniphier: rework struct uniphier_board_data")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-09 01:10:47 +09:00
Masahiro Yamada
11d3ede42c ARM: uniphier: fix warnings reported by aarch64 compiler
The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler.  Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-01 00:33:29 +09:00
Masahiro Yamada
fe5ea57bdb ARM: uniphier: prepare directory structure for ARMv8 SoC support
Before adding ARMv8 support, this commit refactors the directory
structure.  Move ARMv7 specific files to arch/arm/mach-uniphier/arm32
to avoid a mess by mixture of ARMv7 and ARMv8 code.  Also move the
"select CPU_V7" to the lower-level menu because we will have to
select ARM64 instead of CPU_V7 for ARMv8 SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-01 00:33:24 +09:00
Masahiro Yamada
2247c332db ARM: uniphier: rename PH1-LD10/PH1-sLD11 to PH1-LD20/PH1-LD11
Due to the company's awful projecting, PH1-LD10 and PH1-sLD11 have
been renamed to PH1-LD20 and PH1-LD11, respectively.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
5fb87a1632 ARM: uniphier: rework UniPhier SoC select in Kconfig
The chains of "depends on <SoC_name>" in the current Kconfig is
clumsy.  The idea here is to allow users to choose a SoC group first
(SoC group consists of some SoCs that can coexist in one binary).
Then, allow to enable/disable each SoC support in the selected SoC
group.  This makes the Kconfig menu clearer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
4e651003e5 ARM: uniphier: rename variable for DRAM controller base address
Rename the variable that contains the base address for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
a191e0dee0 ARM: uniphier: deprecate umc_dram_init_{start, poll}
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
7c9cac9c22 ARM: uniphier: remove unused macros for UMC base addresses
These macros are no longer used.  These base addresses are
SoC-dependent, so they should not be placed in the header.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
fd14397e93 ARM: uniphier: rework DRAM size handling in UMC init code
Currently, DRAM size is converted twice:
  size in byte -> size in Gbit -> enum

Optimize the code by converting the "size in byte" into enum directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
9a71844a38 ARM: uniphier: optimize PH1-Pro4 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
b870848795 ARM: uniphier: optimize PH1-LD4 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
c5985b4bbb ARM: uniphier: optimize PH1-sLD8 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
71d7ef35df ARM: uniphier: refactor UMC init code for PH1-LD4
Move frequency-dependent register settings to arrays for clean-up.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
380a8cafc0 ARM: uniphier: support more DRAM use cases for PH1-sLD8
Support DDR3-1600 / 512MB DDR size.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
82e5950802 ARM: uniphier: refactor UMC init code for PH1-sLD8
Move frequency-dependent register settings to arrays for clean-up.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
6257a0b0e9 ARM: uniphier: refactor DDR-PHY init code
The if-else statements for the frequency-dependent register settings
seem clumsy.  Moving them to arrays would make it cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
7887670498 ARM: uniphier: remove unused argument of ph1_ld4_ddrphy_init()
The DDR PHY settings no longer depend on the DRAM size.  Drop the
argument from the init function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
4f19f61184 ARM: uniphier: merge DDR PHY init code for 3 SoCs
Now these three are almost the same.  The only difference is the DTPR1
register dependency on the DRAM size, but it can be ignored.  (It has
already been ignored in PH1-sLD8 and PH1-Pro4.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
4021b4381d ARM: uniphier: add a field to specify DDR3+
Add a field to distinguish DDR3+ from (standard) DDR3.  It also
allows to delete CONFIG_DDR_STANDARD (this is not a software
configuration, but a board attribute).

Default DDR3 spec for each SoC:

  PH1-LD4, PH1-sLD8: DDR3+
  Others: DDR3

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
3c963d4899 ARM: uniphier: disable debug circuit clocks for PH1-Pro4
These settings control the clocks around the memory controller.
The debug ability is unneeded once it works properly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
00dd3f6ab0 ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settings
These settings were used only for the PH1-sLD3 and older SoCs.  The
PH1-LD4 and newer one just ignore them because their DDR-PHY take
care of such timing parameters instead.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
94b756f331 ARM: uniphier: refactor UMC init code for ProXstream2
Currently, a dummy value is defined for the UMC_SPCCTLA register
when the DRAM size is zero.  This seems weird because the controller
does not need setting in the first place if the size is zero.

Also, redefine enum dram_size to represent the DRAM size per 16-bit
unit.  This makes things simpler because the channel 0 and 1 are
connected with 32-bit width DRAM, while the channel 2 is connected
with 16-bit width one.

I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_*
for consistency) while I am here because SIZE_* might be easily
mixed-up with the macros in include/linux/sizes.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
a54c879a42 ARM: uniphier: use pr_err() where possible
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
59fe23c2e0 ARM: uniphier: optimize ProXstream2 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
46abfcc99e ARM: uniphier: rework struct uniphier_board_data
This commit reworks "struct uniphier_board_data" with an array of
DRAM channel data in it.  It will allow further cleanups by means of
"for" statements that iterate over the DDR channels.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
8353266825 ARM: uniphier: remove unused umc_polling()
This function is unused.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
aa8a93480e ARM: uniphier: default to environment in eMMC
Of the several boot devices supported, it looks like the eMMC is the
most commonly used.  Enable CONFIG_ENV_IS_IN_MMC by default.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
569e4be172 ARM: uniphier: add a command to find the first MMC (non-SD) device
UniPhier SoC family supports both (e)MMC boot and SD card boot;
however, both of them are handled in the same uclass.

When booting from the eMMC, we want to know the device number
of the (e)MMC, not SD.  This command is useful to find the first
MMC (non-SD) device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
a55d9feeec ARM: uniphier: add eMMC boot support
Export device nodes needed for eMMC boot (eMMC node, pinctrl, and
clock) to the SPL DTB.  CONFIG_SUPPORT_EMMC_BOOT is also necessary
to use "mmc partconf" command.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
3f23111722 ARM: uniphier: add support for PH1-Pro4 Ace and Sanji boards
Initial commit for PH1-Pro4 Ace and Sanji boards.

Note:
There are two variants for the Ace board in terms of the amount of
DDR memory; 1GB or 2GB.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
f775c09d00 ARM: uniphier: adjust DDR clock delay line for ProXstream2
It turned out that DDR channel 2 was not working on ProXstream2
Vodka board.  Add the missing ACBLDR0 register setting to adjust
the delay between the clock lines and the address/command lines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
c9552895a8 ARM: uniphier: move cmd_ddrmphy.c to fix build error
If CONFIG_CMD_DDRMPHY_DUMP is enabled, the build fails.

Fixes: 93d92d46cd ("ARM: uniphier: add dump command for DDR Multi PHY registers")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
126f9bad77 ARM: uniphier: fix makefiles to build cmd_ddr(m)phy.c
The U-Boot proper building needs to descend arch/arm/mach-uniphier/dram
to build these commands.

Fixes: 93d92d46cd ("ARM: uniphier: add dump command for DDR Multi PHY registers")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
2851971b8f ARM: uniphier: remove unused header mio-regs.h
This header is no longer used.

This is the last file in arch/arm/mach-uniphier/include/mach/.
At last, I've succeeded in eliminating the mach directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
8034b5171f ARM: uniphier: drop unneeded EHCI pin mux settings
These pin mux settings are cared by the pinctrl drivers.
Remove the ad-hoc code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
cd0847fe63 ARM: uniphier: switch over to generic EHCI driver
The UniPhier EHCI driver (drivers/usb/host/ehci-uniphier.c) does
nothing special but set the base address and handle reset/clock.

Since commit 4feefdcfe9 ("usb: add clock support for generic EHCI"),
the generic one (drivers/usb/host/ehci-generic.c) can do those, too.

We no longer need to stick to the dedicated driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:51:07 +09:00
Masahiro Yamada
fec4816387 ARM: uniphier: support USB boot mode for ProXstream2 / PH1-LD6b SoC
The USB boot code is too fat and complicated to be included in SPL
(at least for now).  So, it was implemented as a separate project
(what we call USB-loader).

The expected boot sequence is as follows:

  Boot ROM -> USB-loader -> SPL -> U-Boot proper

The USB-loader loads the SPL and U-Boot proper from a USB memory
onto the locked L2 cache.  Then, SPL needs to copy the U-Boot proper
to DRAM, so this mode looks like a NOR boot from the view of SPL.
However, we want to distinguish between (genuine) NOR boot and USB
boot in some places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:36:13 +09:00
Masahiro Yamada
a89be270e7 ARM: uniphier: add missing static qualifier
This function is for local use in the file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:36:13 +09:00
Masahiro Yamada
4b50369fb5 ARM: uniphier: create early page table at run-time
UniPhier SoCs are not equipped with dedicated on-chip SRAM.  Instead,
locked outer cache is used as RAM area during the early boot stage
where DRAM is not ready yet.  This effectively means MMU must be
always enabled while we are in SPL.

Currently, the SPL image for UniPhier SoCs contains the page table
statically defined at compile time.  It has been a burden because the
16KB page table occupies a quarter memory footprint of the 64KB SPL
image.

Finally, there is no more room to implement new features in SPL.
Setting aside the NOR boot mode, this issue can be solved by creating
the page table onto RAM at run time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:36:13 +09:00
Masahiro Yamada
755c7d9a61 ARM: uniphier: change stack pointer address for SPL
No special reason for the current stack address 0x0ff08000.
Change it to 0x00100000 to simplify the init_page_table.

There are two types of SoCs in terms of the load address of SPL.

 [1] PH1-sLD3, PH1-LD4, PH1-sLD8
   SPL is loaded at 0x00040000-0x0004ffff
 [2] PH1-Pro4, PH1-Pro5, ProXstream2, PH1-LD6b
   SPL is loaded at 0x00100000-0x0010ffff

The new stack area (0x000f8000-0x00100000) should be safe for all the
cases.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:36:13 +09:00
Masahiro Yamada
84a7562e49 ARM: uniphier: support some more DRAM use cases on PH1-Pro4 boards
Some of PH1-Pro4 boards are equipped with larger amount of DRAM than
the reference board.  Add UMC settings to support them.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:36:13 +09:00
Masahiro Yamada
048c61d674 ARM: uniphier: remove unneeded if conditionals
The if block does the same as the else block does.  The conditional
is not necessary at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:40:33 +09:00
Masahiro Yamada
faefef9994 ARM: uniphier: move UMC register macros to umc-regs.h
The umc-proxstream2.c defiens the same macros as in umc-regs.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:40:22 +09:00
Masahiro Yamada
d649fb8aef ARM: uniphier: set active ways to really enable outer cache
Each way must be unlocked to make it effective.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:40:11 +09:00
Masahiro Yamada
6d95778283 ARM: uniphier: fix range invalidate for outer cache
If invalidate operation is invoked against a cache-unaliged region,
the both ends of the region should be flushed, not invalidated.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:40:02 +09:00
Masahiro Yamada
5407735935 ARM: uniphier: factor out outer cache sync as a helper function
Avoid repeating the same code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:39:52 +09:00
Masahiro Yamada
cefca48ca7 ARM: uniphier: refactor outer cache operation slightly
Improve readability without changing the behavior.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:39:42 +09:00
Masahiro Yamada
93d92d46cd ARM: uniphier: add dump command for DDR Multi PHY registers
The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY
which is not register-compatible with the former SoCs.
Add a new command to support the register dump of this IP.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:57 +09:00
Masahiro Yamada
15607d0d94 ARM: uniphier: add DRAM init code for ProXstream2/PH1-LD6b
As mentioned in the log of commit 019df879a9 (ARM: uniphier: add
ProXstream2 and PH1-LD6b support), the DRAM init code was missing
for a long time.  Finally, here it is.  SPL works now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:55 +09:00
Masahiro Yamada
107b3fb484 ARM: uniphier: move headers out of include/mach directory
These headers are only included locally in arch/arm/mach-uniphier/.
There is no reason to export them by putting in the mach/ directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:53 +09:00
Masahiro Yamada
042b28f436 ARM: uniphier: move cmd_pinmon.c to boot-mode subdirectory
This command shows the boot mode pins, so it would be more at home
in the boot-mode subdirectory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:51 +09:00
Masahiro Yamada
9ca6616426 ARM: uniphier: move cmd_ddrphy.c to dram subdirectory
This command shows the register dump of the DDR PHY, so it would be
more at home in the dram subdirectory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:45 +09:00
Masahiro Yamada
9475f8de88 ARM: uniphier: kill bogus header includes
These includes are not necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:38 +09:00
Masahiro Yamada
8ea4f49a47 ARM: uniphier: set DTB file name to fdt_file environment
When we want to boot Linux with a DTB file downloaded from a TFTP
server or somewhere, we need to know the file name to be downloaded.

Assume the U-Boot configuration is shared among some similar boards.
If they are similar enough, the difference only appears in device
trees.  The build procedure would be like this:

 - Board A:  make foo_common_defconfig && make DEVICE_TREE=foo_board_a
 - Board B:  make foo_common_defconfig && make DEVICE_TREE=foo_board_b
 - Board C:  make foo_common_defconfig && make DEVICE_TREE=foo_board_c

In this case, the U-Boot image contains nothing about the DTB file name
it is running with.  (CONFIG_DEFAULT_DEVICE_TREE is not helpful for this
purpose because it is painful to change it from "make menuconfig" for
each board.)

This commit allows to lookup the DTB file name based on the compatible
string and set it to "fdt_file" environment.  Then "tftpboot $fdt_file"
will download the file we want.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:56 +09:00
Masahiro Yamada
33886693b6 ARM: uniphier: merge umc/ and ddrphy/ into a single directory
The UMC (Universal Memory Controller) and the DDR PHY block are
highly related to each other.  It is better to have both code in the
same directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:55 +09:00
Masahiro Yamada
6e1550fa7c ARM: uniphier: display model number all the time on boot up
Both "Model 1" and "Model 2" are supported for ProXstream2 and
PH1-LD6b boards.  It is useful to show the model number in the
boot banner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:54 +09:00
Masahiro Yamada
6f45a9755e ARM: uniphier: add macros and revision IDs for sLD11 and LD10
These are new SoCs from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:48 +09:00
Masahiro Yamada
6994700712 ARM: uniphier: compile uniphier_get_board_param() for U-Boot proper
Compile this file for U-Boot proper as well as SPL, so that the
U-Boot proper can call uniphier_get_board_param().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:42 +09:00