Commit graph

44 commits

Author SHA1 Message Date
Masahiro Yamada
f9d7e17e84 ARM: uniphier: update DRAM init code for LD20 SoC
Import the latest version from the Diag software.

  - Support LD21 SoC (including DDR chips in the package)
  - Per-board granule adjustment for both reference and TV boards
  - Misc cleanups

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:12:26 +09:00
Masahiro Yamada
c21fc7e223 treewide: fix "followings" to "following"
Most of them are my mistakes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-26 17:04:58 -04:00
Masahiro Yamada
a74c28a0f2 ARM: uniphier: introduce flags to uniphier_board_data structure
I need to add more board attributes, so the "flags" member will be
handier than separate boolean ones.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24 00:24:55 +09:00
Masahiro Yamada
4e3d84066e ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()
This does not have much impact on behavior, but makes code look more
more like Linux.  The use of devm_ioremap() often helps to delete
.remove callbacks entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24 00:13:10 +09:00
Masahiro Yamada
667dbcd01d ARM: uniphier: add PH1-LD11 SoC support
This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:37:13 +09:00
Masahiro Yamada
7381db86a9 ARM: uniphier: rename UMC register macros of PH1-LD20
Correct some register names.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:36:58 +09:00
Masahiro Yamada
0586e22783 ARM: uniphier: rename umc-ld20-regs.h to umc64-regs.h
This header will be shared between PH1-LD11 and PH1-LD20
(and hopefully new ARMv8 SoCs developed in the future),
so umc64-regs.h would be a better fit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00
Masahiro Yamada
9d0c2ceb35 ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:54:08 +09:00
Masahiro Yamada
5b66006646 ARM: uniphier: rename function names ph1_* to uniphier_*
Eliminate the "ph1"_ prefixes from function names because "uniphier_"
describes the SoC familiy better.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
1b1f2319ca ARM: uniphier: drop ifdef in ddrphy-regs.h
The ifdef conditionals in header files prevent us from multi-SoC
support in a single U-Boot image.  Detect SoC specific parameters
run-time rather than define them statically with an ifdef in
ddrphy-regs.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:45:19 +09:00
Masahiro Yamada
ea65c98050 ARM: uniphier: drop PH1- prefix from CONFIG options and file names
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24 01:42:13 +09:00
Masahiro Yamada
51244a6080 ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=y
The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit
46abfcc99e ("ARM: uniphier: rework struct uniphier_board_data").

Fixes: 46abfcc99e ("ARM: uniphier: rework struct uniphier_board_data")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-09 01:10:47 +09:00
Masahiro Yamada
4e651003e5 ARM: uniphier: rename variable for DRAM controller base address
Rename the variable that contains the base address for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
a191e0dee0 ARM: uniphier: deprecate umc_dram_init_{start, poll}
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
7c9cac9c22 ARM: uniphier: remove unused macros for UMC base addresses
These macros are no longer used.  These base addresses are
SoC-dependent, so they should not be placed in the header.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
fd14397e93 ARM: uniphier: rework DRAM size handling in UMC init code
Currently, DRAM size is converted twice:
  size in byte -> size in Gbit -> enum

Optimize the code by converting the "size in byte" into enum directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
9a71844a38 ARM: uniphier: optimize PH1-Pro4 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
b870848795 ARM: uniphier: optimize PH1-LD4 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
c5985b4bbb ARM: uniphier: optimize PH1-sLD8 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
71d7ef35df ARM: uniphier: refactor UMC init code for PH1-LD4
Move frequency-dependent register settings to arrays for clean-up.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
380a8cafc0 ARM: uniphier: support more DRAM use cases for PH1-sLD8
Support DDR3-1600 / 512MB DDR size.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
82e5950802 ARM: uniphier: refactor UMC init code for PH1-sLD8
Move frequency-dependent register settings to arrays for clean-up.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
6257a0b0e9 ARM: uniphier: refactor DDR-PHY init code
The if-else statements for the frequency-dependent register settings
seem clumsy.  Moving them to arrays would make it cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
7887670498 ARM: uniphier: remove unused argument of ph1_ld4_ddrphy_init()
The DDR PHY settings no longer depend on the DRAM size.  Drop the
argument from the init function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
4f19f61184 ARM: uniphier: merge DDR PHY init code for 3 SoCs
Now these three are almost the same.  The only difference is the DTPR1
register dependency on the DRAM size, but it can be ignored.  (It has
already been ignored in PH1-sLD8 and PH1-Pro4.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
4021b4381d ARM: uniphier: add a field to specify DDR3+
Add a field to distinguish DDR3+ from (standard) DDR3.  It also
allows to delete CONFIG_DDR_STANDARD (this is not a software
configuration, but a board attribute).

Default DDR3 spec for each SoC:

  PH1-LD4, PH1-sLD8: DDR3+
  Others: DDR3

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
3c963d4899 ARM: uniphier: disable debug circuit clocks for PH1-Pro4
These settings control the clocks around the memory controller.
The debug ability is unneeded once it works properly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
00dd3f6ab0 ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settings
These settings were used only for the PH1-sLD3 and older SoCs.  The
PH1-LD4 and newer one just ignore them because their DDR-PHY take
care of such timing parameters instead.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
94b756f331 ARM: uniphier: refactor UMC init code for ProXstream2
Currently, a dummy value is defined for the UMC_SPCCTLA register
when the DRAM size is zero.  This seems weird because the controller
does not need setting in the first place if the size is zero.

Also, redefine enum dram_size to represent the DRAM size per 16-bit
unit.  This makes things simpler because the channel 0 and 1 are
connected with 32-bit width DRAM, while the channel 2 is connected
with 16-bit width one.

I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_*
for consistency) while I am here because SIZE_* might be easily
mixed-up with the macros in include/linux/sizes.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
a54c879a42 ARM: uniphier: use pr_err() where possible
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
59fe23c2e0 ARM: uniphier: optimize ProXstream2 UMC init code with "for" loop
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
46abfcc99e ARM: uniphier: rework struct uniphier_board_data
This commit reworks "struct uniphier_board_data" with an array of
DRAM channel data in it.  It will allow further cleanups by means of
"for" statements that iterate over the DDR channels.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
8353266825 ARM: uniphier: remove unused umc_polling()
This function is unused.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:16 +09:00
Masahiro Yamada
f775c09d00 ARM: uniphier: adjust DDR clock delay line for ProXstream2
It turned out that DDR channel 2 was not working on ProXstream2
Vodka board.  Add the missing ACBLDR0 register setting to adjust
the delay between the clock lines and the address/command lines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
c9552895a8 ARM: uniphier: move cmd_ddrmphy.c to fix build error
If CONFIG_CMD_DDRMPHY_DUMP is enabled, the build fails.

Fixes: 93d92d46cd ("ARM: uniphier: add dump command for DDR Multi PHY registers")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
126f9bad77 ARM: uniphier: fix makefiles to build cmd_ddr(m)phy.c
The U-Boot proper building needs to descend arch/arm/mach-uniphier/dram
to build these commands.

Fixes: 93d92d46cd ("ARM: uniphier: add dump command for DDR Multi PHY registers")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 17:07:46 +09:00
Masahiro Yamada
84a7562e49 ARM: uniphier: support some more DRAM use cases on PH1-Pro4 boards
Some of PH1-Pro4 boards are equipped with larger amount of DRAM than
the reference board.  Add UMC settings to support them.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14 16:36:13 +09:00
Masahiro Yamada
048c61d674 ARM: uniphier: remove unneeded if conditionals
The if block does the same as the else block does.  The conditional
is not necessary at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:40:33 +09:00
Masahiro Yamada
faefef9994 ARM: uniphier: move UMC register macros to umc-regs.h
The umc-proxstream2.c defiens the same macros as in umc-regs.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-20 08:40:22 +09:00
Masahiro Yamada
93d92d46cd ARM: uniphier: add dump command for DDR Multi PHY registers
The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY
which is not register-compatible with the former SoCs.
Add a new command to support the register dump of this IP.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:57 +09:00
Masahiro Yamada
15607d0d94 ARM: uniphier: add DRAM init code for ProXstream2/PH1-LD6b
As mentioned in the log of commit 019df879a9 (ARM: uniphier: add
ProXstream2 and PH1-LD6b support), the DRAM init code was missing
for a long time.  Finally, here it is.  SPL works now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:55 +09:00
Masahiro Yamada
107b3fb484 ARM: uniphier: move headers out of include/mach directory
These headers are only included locally in arch/arm/mach-uniphier/.
There is no reason to export them by putting in the mach/ directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:53 +09:00
Masahiro Yamada
9ca6616426 ARM: uniphier: move cmd_ddrphy.c to dram subdirectory
This command shows the register dump of the DDR PHY, so it would be
more at home in the dram subdirectory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 01:54:45 +09:00
Masahiro Yamada
33886693b6 ARM: uniphier: merge umc/ and ddrphy/ into a single directory
The UMC (Universal Memory Controller) and the DDR PHY block are
highly related to each other.  It is better to have both code in the
same directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23 00:08:55 +09:00