Commit graph

21857 commits

Author SHA1 Message Date
Andrew Murray
99b4eaa68e usb: Prevent using reserved registers on DM36x usb
The musb driver defines and uses MUSB_CSR0_H_DIS_PING, however this
bit is reserved on the DM36x. Thus this patch ensures that the
reserved bit is not accesssed.

It has been observed that some USB devices will fail to enumerate
with errors such as 'error in inquiry' without this patch.

See http://www.ti.com/litv/pdf/sprufh9a for details.

Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk>
Acked-by: Marek Vasut <marex@denx.de>
2013-10-10 07:58:00 -04:00
Tom Rini
7406d321cc omap5_common: Re-work mmc boot to try SD and eMMC, correct root device
OMAP5 boards may have both eMMC (on MMC2) and an SD slot (on MMC1).  We
Update the default bootcmd to match what happens on AM335x where we try
SD first, and then eMMC.  In this case however, the hardware layout used
for powering both of these means that in the kernel eMMC shall be found
first as it is powered by a fixed regulator and SD found second as SD is
powered via the palmas which will result in deferred probing.

Tested-by: Aparna Balasubramanian <aparnab@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-10-09 14:13:43 -04:00
Paul Burton
cc734f5ab2 cmd_ubi: add write.part command, to write a volume in multiple parts
This allows you to write data to an UBI volume when the amount of memory
available to write that data from is less than the total size of the
data. For example, you may split a root filesystem UBIFS image into
parts, provide the total size of the image to the first write.part
command and then use multiple write.part commands to write the
subsequent parts of the volume. This results in a sequence of commands
akin to:

  ext4load mmc 0:1 0x80000000 rootfs.ubifs.0
  ubi write.part 0x80000000 root 0x08000000 0x18000000
  ext4load mmc 0:1 0x80000000 rootfs.ubifs.1
  ubi write.part 0x80000000 root 0x08000000
  ext4load mmc 0:1 0x80000000 rootfs.ubifs.2
  ubi write.part 0x80000000 root 0x08000000

This would write 384MiB of data to the UBI volume 'root' whilst only
requiring 128MiB of said data to be held in memory at a time.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Stefan Roese <sr@denx.de>
2013-10-09 12:52:22 -05:00
Paul Burton
dd7185f176 cmd_ubi: use int64_t volume size for 'ubi create'
int64_t matches the bytes field in struct ubi_mkvol_req to which the
size is assigned. With the prior signed 32 bit integer, volumes were
restricted to being less than 2GiB in size.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Stefan Roese <sr@denx.de>
2013-10-09 12:52:20 -05:00
Paul Burton
39ac34473f cmd_mtdparts: use 64 bits for flash size, partition size & offset
This matches the 64 bit size in struct mtd_info and allows the mtdparts
command to function correctly with a flash >= 4GiB. Format specifiers
for size & offset are given the ll length, matching its use in
drivers/mtd in absence of something like inttypes.h/PRIx64.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Stefan Roese <sr@denx.de>
2013-10-09 12:52:16 -05:00
Paul Burton
40462e541d mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEAN
Linux modified the MTD driver interface in commit edbc4540 (with the
same name as this commit). The effect is that calls to mtd_read will
not return -EUCLEAN if the number of ECC-corrected bit errors is below
a certain threshold, which defaults to the strength of the ECC. This
allows -EUCLEAN to stop indicating "some bits were corrected" and begin
indicating "a large number of bits were corrected, the data held in
this region of flash may be lost soon". UBI makes use of this and when
-EUCLEAN is returned from mtd_read it will move data to another block
of flash. Without adopting this interface change UBI on U-boot attempts
to move data between blocks every time a single bit is corrected using
the ECC, which is a very common occurance on some devices.

For some devices where bit errors are common enough, UBI can get stuck
constantly moving data around because each block it attempts to use has
a single bit error. This condition is hit when wear_leveling_worker
attempts to move data from one PEB to another in response to an
-EUCLEAN/UBI_IO_BITFLIPS error. When this happens ubi_eba_copy_leb is
called to perform the data copy, and after the data is written it is
read back to check its validity. If that read returns UBI_IO_BITFLIPS
(in response to an MTD -EUCLEAN) then ubi_eba_copy_leb returns 1 to
wear_leveling worker, which then proceeds to schedule the destination
PEB for erasure. This leads to erase_worker running on the PEB, and
following a successful erase wear_leveling_worker is called which
begins this whole cycle all over again. The end result is that (without
UBI debug output enabled) the boot appears to simply hang whilst in
reality U-boot busily works away at destroying a block of the NAND
flash. Debug output from this situation:

  UBI DBG: ensure_wear_leveling: schedule scrubbing
  UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083
  UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 1027
  UBI DBG: ubi_io_read: read 4096 bytes from PEB 1027:4096
  UBI DBG: ubi_eba_copy_leb: copy LEB 0:0, PEB 1027 to PEB 4083
  UBI DBG: ubi_eba_copy_leb: read 1040384 bytes of data
  UBI DBG: ubi_io_read: read 1040384 bytes from PEB 1027:8192
  UBI: fixable bit-flip detected at PEB 1027
  UBI DBG: ubi_io_write_vid_hdr: write VID header to PEB 4083
  UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:4096
  UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 4083
  UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:4096
  UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:8192
  UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:8192
  UBI: fixable bit-flip detected at PEB 4083
  UBI DBG: schedule_erase: schedule erasure of PEB 4083, EC 55, torture 0
  UBI DBG: erase_worker: erase PEB 4083 EC 55
  UBI DBG: sync_erase: erase PEB 4083, old EC 55
  UBI DBG: do_sync_erase: erase PEB 4083
  UBI DBG: sync_erase: erased PEB 4083, new EC 56
  UBI DBG: ubi_io_write_ec_hdr: write EC header to PEB 4083
  UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:0
  UBI DBG: ensure_wear_leveling: schedule scrubbing
  UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083
  ...

This patch adopts the interface change as in Linux commit edbc4540 in
order to avoid such situations. Given that none of the drivers under
drivers/mtd return -EUCLEAN, this should only affect those using
software ECC. I have tested that it works on a board which is
currently out of tree, but which I hope to be able to begin
upstreaming soon.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Stefan Roese <sr@denx.de>
2013-10-09 12:52:04 -05:00
Andreas Huber
d3379e2254 km/scripts: fix ramfs
'actual_bank' is not used anymore, instead boot_bank is used.

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
2013-10-09 10:07:56 -04:00
Holger Brunck
13303e43b4 powerpc/km: drop unused CONFIG_SYS_DTT_LOW_TEMP
This define is not used in u-boot code, we can drop this define safely.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-10-09 10:07:56 -04:00
Holger Brunck
7d77203cd7 km/common: switch on CMD_GREPENV
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-10-09 10:07:56 -04:00
Holger Brunck
a3b88121eb powerpc/83xx: remove staticness for qe_iop_conf_tab
commit a5510058 powerpc/83xx/km: make local functions and structs static

removed the staticness also from this struct. But this struct is needed
in arch/powerpc/cpu/mpc83xx/cpu_init.c and declared as extern.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-10-09 10:07:56 -04:00
Tom Rini
3be2bdf5dc Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx 2013-10-09 10:06:40 -04:00
Tom Rini
df166cc9f4 da850evm.h: Always set CONFIG_CMD_SF, move to by CONFIG_SPI_FLASH
When we have CONFIG_SPI_FLASH set we now require CONFIG_CMD_SF.

Signed-off-by: Tom Rini <trini@ti.com>
2013-10-08 15:08:38 -04:00
Tom Rini
31cd065df0 Revert "am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot."
Upon further inspection and review and chatting with kernel folks, what
happens here is that what mmcblk# a device gets is based on probe order.
So a system with an SD card inserted with place eMMC on mmcblk1, but
without an SD card, it will be on mmcblk0.  So U-boot can only provide a
best guess.  In this case, if no SD card is present, we would want to
pass mmcblk0p2 still.  If an SD card is present, it woudl be able to
provide a uEnv.txt that would be loaded (even if the kernel is NOT
there) which can still update mmcroot variable.

This reverts commit 827512fb11.

Cc: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Tom Rini <trini@ti.com>
2013-10-08 11:09:17 -04:00
Tom Rini
9f3fe6da27 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-10-08 09:51:48 -04:00
Tom Rini
968294bd7b Merge branch 'master' of git://git.denx.de/u-boot-spi 2013-10-08 09:03:15 -04:00
Rajeshwari Shinde
c4a796329d spi: exynos: Support word transfers
Since SPI register access is so expensive, it is worth transferring data
a word at a time if we can. This complicates the driver unfortunately.

Use the byte-swapping feature to avoid having to convert to/from big
endian in software.

This change increases speed from about 2MB/s to about 4.5MB/s.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:12 +05:30
Rajeshwari Shinde
120af1572a spi: exynos: Minimise access to SPI FIFO level
Accessing SPI registers is slow, but access to the FIFO level register
in particular seems to be extraordinarily expensive (I measure up to
600ns). Perhaps it is required to synchronise with the SPI byte output
logic which might run at 1/8th of the 40MHz SPI speed (just a guess).

Reduce access to this register by filling up and emptying FIFOs
more completely, rather than just one word each time around the inner
loop.

Since the rxfifo value will now likely be much greater that what we read
before we fill the txfifo, we only fill the txfifo halfway. This is
because if the txfifo is empty, but the rxfifo has data in it, then writing
too much data to the txfifo may overflow the rxfifo as data arrives.

This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:11 +05:30
Rajeshwari Shinde
8d203afdd3 spi: exynos: Support a delay after deactivate
For devices that need some time to react after a spi transaction
finishes, add the ability to set a delay.

Implement this as a delay on the first/next transaction to avoid
any delay in the fairly common case where a SPI transaction is
followed by other processing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:11 +05:30
Rajeshwari Shinde
fc9ae1bac4 exynos: Export timer_get_us() to get microsecond timer
This function, if implemented by the board, provides a microsecond
timer. The granularity may be larger than 1us if hardware does not
support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:10 +05:30
Wolfgang Denk
b770e88a6c Fix number base handling of "load" command
As documented, almost all U-Boot commands expect numbers to be entered
in hexadecimal input format. (Exception: for historical reasons, the
"sleep" command takes its argument in decimal input format.)

This rule was broken for the "load" command; for details please see
especially commits 045fa1e "fs: add filesystem switch libary,
implement ls and fsload commands" and 3f83c87 "fs: fix number base
behaviour change in fatload/ext*load".  In the result, the load
command would always require an explicit "0x" prefix for regular
(i. e. base 16 formatted) input.

Change this to use the standard notation of base 16 input format.
While strictly speaking this is a change of the user interface, we
hope that it will not cause trouble.  Stephen Warren comments (see
[1]):

        I suppose you can change the behaviour if you want; anyone
        writing "0x..." for their values presumably won't be
        affected, and if people really do assume all values in U-Boot
        are in hex, presumably nobody currently relies upon using
        non-prefixed values with the generic load command, since it
        doesn't work like that right now.

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/171172

Acked-by: Tom Rini <trini@ti.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-07 15:54:18 -04:00
Chin Liang See
572886af59 socfpga: Adding pin mux handoff files
Adding the generated pin mux configuration by Preloader
Generator tool

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-10-07 19:32:30 +02:00
Chin Liang See
5d649d2b08 socfpga: Adding System Manager driver
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-10-07 19:32:21 +02:00
Albert ARIBAUD
0610a16cf2 omap1510inn: arm925t: remove support
omap1510inn is orphan and has been for years now.
Reove it and, as it was the only arm925t target,
also remove arm925t support.
Update doc/README.scrapyard accordingly.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-10-07 19:25:19 +02:00
Jagannadha Sutradharudu Teki
3cfcf774c2 doc: SPI: Update SPI status track
Updated SPI/status.txt, with memory_map and TODO.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:35:10 +05:30
Jagannadha Sutradharudu Teki
adbb5860e5 sf: ramtron: Remove page_size print
There is no page_size for ramtron flashes,
so just print the detected flash and it's size.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:35:09 +05:30
Jagannadha Sutradharudu Teki
ce22b922dd sf: Minor cleanups
- Add spaces, tabs
- Commenting.
- Rearrange code.
- Add static qualifier for missing func.
- Remove memory_map from ramtron.c
- Ramtron: spi_flash_internal.h -> sf_internal.h

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:34:56 +05:30
Poddar, Sourav
2f24223ae1 README: qspi usecase and testing documentation.
Contains documentation and testing details for qspi flash
interface.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:52 +05:30
Matt Porter
247cdf0413 dra7xx_evm: add SPL API, QSPI, and serial flash support
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:52 +05:30
Matt Porter
1d0933eaf9 spi: add TI QSPI driver
Adds a SPI master driver for the TI QSPI peripheral.
- Added quad read support.
- Added memory mapped support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:51 +05:30
Poddar, Sourav
004f15b600 sf: Add memory mapped read support
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.

This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
 transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".

This will enable the spi controller to do memory mapped configurations
if required.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:51 +05:30
Poddar, Sourav
62d206dc31 armv7: hw_data: change clock divider setting.
Clock requirement for qspi clk is 192 Mhz.
According to the below formulae,

f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)

fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz
For clockoutx2_Hmn to be 768, hmn + 1 should be 4.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:51 +05:30
Matt Porter
c97a9b3275 omap5: add qspi support
Add QSPI definitions and clock configuration support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:50 +05:30
Priyanka Jain
0ab449beec sf: probe: Add support for EN25S64
Add support for EON EN25S64 SPI flash.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
364995499c doc: SPI: Add status.txt for tracking SPI subsys status
doc/SPI/status.txt added to track the u-boot SPI subsystem status.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
898e76c938 sf: Rename spi_flash files
Renamed:
spi_flash.c -> sf.c
spi_flash_internal.h -> sf_internal.h
spi_flash_ops.c -> sf_ops.c
spi_flash_probe.c -> sf_probe.c

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
1b1bd9a7b3 spi: spi cleanups
- Rearranged multi-line comment style.
- Add tabs.
- Add spaces.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:49 +05:30
Jagannadha Sutradharudu Teki
a5e8199a13 sf: spi_flash cleanups
More cleanups on spi_flash side:
- Removed unneeded comments.
- Rearranged macros in proper location.
- Rearranged func declerations
- Renamed few function names.
- Added License headers.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:49 +05:30
Jagannadha Sutradharudu Teki
30b0ca6318 sf: Remove spi_flash_do_alloc references
Added a support for common probe, hence removed removed
spi_flash_do_alloc reference.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:49 +05:30
Jagannadha Sutradharudu Teki
9719695b24 sf: probe: Add support for MX25L51235F
Add support for Macronix MX25L51235F SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
0665538632 sf: probe: Add support for MX25L25635F
Add support for Macronix MX25L25635F SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
532f2f111c sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_write
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
3ea708f0d3 sf: probe: Print erase_size while printing flash details
Included erase_size while printing probed flash details.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
567901c8e0 sf: probe: Use print_size arg as page_size
Use flash->page_size arg in print_size() instead of
flash->sector_size while printing detected flas part details.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:47 +05:30
Jagannadha Sutradharudu Teki
af878522b5 sf: probe: Add support for S25FL512S_256K
Add support for Spansion S25FL512S_256K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:47 +05:30
Jagannadha Sutradharudu Teki
f0be6ded71 sf: probe: Add support for S25FL256S_256K
Add support for Spansion S25FL256S_256K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
fda41259b8 sf: probe: Add support for EN25Q64
Add support for EON EN25Q64 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
6af8dc3ebc sf: Remove unneeded flash drivers files
Now the common probing is handled in spi_flash_probe.c
hence removed the unneeded flash drivers.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
af1679bc30 sf: ramtron: Add support for separate flash driver
Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
7ab35d922d sf: Add proper comment style on spi_flash structure
Added proper comment style on spi_flash structure to make
more readable.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
32ebd1a7d5 sf: probe: Simply the BAR configuration logic
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:45 +05:30