Commit graph

146 commits

Author SHA1 Message Date
Gowtham Tammana
ba7455a796 arm: mach-k3: am642_init: Add missing ddr guard
The `struct udevice *` reference is needed for either of the
K3_LOAD_SYSFW, K3_AM64_DDRSS config guards. Adding the missing
K3_AM64_DDRSS guard.

Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210624171614.14244-1-g-tammana@ti.com
2021-07-15 17:56:04 +05:30
Dave Gerlach
61305e00c7 arm: mach-k3: j721e_init: Force early probe of clk-k3 driver
Force the clk-k3 driver to probe early during R5 SPL boot to ensure the
default system clock configuration is completed. Many other drivers
assume a default state of the clock tree and it is currently possible
for them to probe before clk-k3 depending on the exact system
configuration.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reported-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
925698daac arm: mach-k3: sysfw-loader: pass boardcfg to sciserver
Copy the contents of the board config loaded from sysfw.itb into an
EXTBOOT shared memory buffer that gets passed to sciserver. This only
needs to be done if EXTBOOT area has not been populated by ROM code yet.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Dave Gerlach
7acd4d7142 arm: mach-k3: common: Drop main r5 start
Only start-up the non-linux remote cores if we are running in legacy
boot mode. HSM rearch is not yet supporting this.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
0714580346 arm: mach-k3: do board config for PM only if supported
If the raw PM support is built in, we are operating in the split
firmware approach mode where PM support is not available. In this
case, skip the board config for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
547b277cd9 arm: mach-k3: add support for detecting firmware images from FIT
Add callback routines for parsing the firmware info from FIT image, and
use the data to boot up ATF and the MCU R5 firmware.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Dave Gerlach
277729eaf3 arm: mach-k3: Add platform data for j721e and j7200
Add platform clock and powerdomain data for J721e and J7200. This data
is used by the corresponding drivers to register all the required device
clocks and powerdomains.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
df5363a67f tools: k3_fit_atf: add DM binary to the FIT image
Add DM (device manager) firmware image to the fit image that is loaded by
R5 SPL. This is needed with the HSM rearch where the firmware allocation
has been changed slightly.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Lokesh Vutla
481d394e77 common: fit: Update board_fit_image_post_process() to pass fit and node_offset
board_fit_image_post_process() passes only start and size of the image,
but type of the image is not passed. So pass fit and node_offset, to
derive information about image to be processed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
99214c1f48 arm: mach-k3: introduce new config option for sysfw split
On J7 family of SoCs (J721E and J7200), sysfw is being split to be run
under two cores, TIFS portion on DMSC core, and DM firmware under MCU
R5. As MCU R5 is also used to run one phase of the bootloader, we must
prevent access from here towards sysfw services. To support this, add
new config option which can be used to detect presence of RM/PM sysfw
services.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Aswath Govindraju
26f32c32b2 configs: am64x_evm_*_defconfig: Rearrange the components in SRAM to satisfy the limitations for USB DFU boot mode
For USB DFU boot mode there is a limitation on the load address of boot
images that they have to be less than 0x70001000. Therefore, move the
SPL_TEXT_BASE address to 0x70000000.

Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at
0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move
the location of ATF to a latter location in SRAM, past the SPL image. Also
rearrange the EEPROM and BSS data on top of ATF.

Given below is the placement of various data sections in SRAM

     ┌──────────────────────────────────────┐0x70000000
     │                                      │
     │                                      │
     │                                      │
     │    SPL IMAGE (Max size 1.5 MB)       │
     │                                      │
     │                                      │
     │                                      │
     ├──────────────────────────────────────┤0x7017FFFF
     │                                      │
     │           SPL STACK                  │
     │                                      │
     ├──────────────────────────────────────┤0x70192727
     │          GLOBAL DATA(216 B)          │
     ├──────────────────────────────────────┤0x701927FF
     │                                      │
     │       INITIAL HEAP (32 KB)           │
     │                                      │
     ├──────────────────────────────────────┤0x7019A7FF
     │                                      │
     │          BSS  (20 KB)                │
     ├──────────────────────────────────────┤0x7019F7FF
     │         EEPROM DATA (2 KB)           │
     ├──────────────────────────────────────┤0x7019FFFF
     │                                      │
     │                                      │
     │            ATF (123 KB)              │
     │                                      │
     │                                      │
     ├──────────────────────────────────────┤0x701BEBFB
     │   BOOT PARAMETER INDEX TABLE (5124 B)│
     ├──────────────────────────────────────┤0x701BFFFF
     │                                      │
     │SYSFW FIREWALLED DUE TO A BUG (128 KB)│
     │                                      │
     ├──────────────────────────────────────┤0x701DFFFF
     │                                      │
     │      DMSC CODE AREA (128 KB)         │
     │                                      │
     └──────────────────────────────────────┘0x701FFFFF

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Aswath Govindraju
669a03e0ff arm: mach-k3: am642_init: Do USB fixups to facilitate host and device boot modes
U-Boot either supports USB host or device mode for a node at a time in the
device tree nodes. To support both host and dfu bootmodes, dr_mode is set
to "peripheral" by default and then fixed based on the mode selected by
the boot mode config dip switches on the board.

This needs to happen before the cdns3 generic layer binds the usb device
to a host or a device driver. Therefore, use fdtdec_setup_board()
implementation to fixup the device tree property.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-4-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Aswath Govindraju
3ae127c4e2 arm: mach-k3: am642_init: Add support for USB boot mode
Add support for identifying USB host and device boot modes

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-3-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Aswath Govindraju
0c51509224 tools: k3_fit_atf: Add support for providing ATF load address using a Kconfig symbol
Add support for providing ATF load address with a Kconfig symbol.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-2-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Marek Behún
236f2ec432 treewide: Convert macro and uses of __section(foo) to __section("foo")
This commit does the same thing as Linux commit 33def8498fdd.

Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.

Remove the quote operator # from compiler_attributes.h __section macro.

Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Lokesh Vutla
b5425a9676 arm: am64x: Add support for selecting DT based on EEPROM
Enable support for selecting DTB within SPL based on EEPROM.
This will help to use single defconfig for both EVM and SK

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12 16:32:44 +05:30
Lokesh Vutla
2ee76314a7 board: ti: am64x: Add support for reading eeprom data
I2C EEPROM data contains the board name and its revision.
Add support for:
- Reading EEPROM data and store a copy at end of SRAM
- Updating env variable with relevant board info
- Printing board info during boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12 16:32:44 +05:30
Dave Gerlach
d411f0973a arm: mach-k3: am642: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:31:16 +05:30
Dave Gerlach
33b7258947 board: ti: am64x: Add board support for am64x evm
Add board specific initialization for am64x based boards.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Keerthy
7fe7713c2e armv8: mach-k3: am642: Add custom MMU support
Change the memory attributes for the DDR regions used by the remote
processors on AM65x so that the cores can see and execute the proper code.

A separate table based on the previous K3 SoCs is introduced since the
number of remote processors and their DDR usage is different between the
SoC families.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Suman Anna
078332cee3 arm: mach-k3: am642: Shut down R5 core after ATF startup on A53
The AM642 SoCs use the Main R5FSS0 as a boot processor, and runs
the R5 SPL that performs the initialization of the System Controller
processor and starting the Arm Trusted Firmware (ATF) on the Arm
Cortex A53 cluster. The Core0 serves as this boot processor and is
parked in WFE after all the initialization. Core1 does not directly
participate in the boot flow, and is simply parked in a WFI.

Power down these R5 cores (and the associated RTI timer resources
that were indirectly powered up) after starting up ATF on A53 by
using the appropriate SYSFW API in release_resources_for_core_shutdown().
This allows these Main R5F cores to be further controlled from the
A53 to run regular applications.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Dave Gerlach
f4686c3d5b arm: mach-k3: am642: Use mmc start and stop callbacks
To avoid any glitches on MMC clock line, make use of pm per and post
callbacks when loading sysfw.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Dave Gerlach
d2edabfa8d arm: mach-k3: am642: Load SYSFW binary and config from boot media
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the AM642 early initialization sequence. Also
make use of existing logic to detect if ROM has already loaded sysfw
and avoided attempting to reload and instead just prepare to use already
running firmware.

While at it also initialize the MAIN_UART1 pinmux as it is used by SYSFW
to print diagnostic messages.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Dave Gerlach
6d52c9dd90 arm: mach-k3: am642: Store boot info from ROM
For AM642, ROM supports loading system firmware directly
from boot image. ROM passes information about the number of
images that are loaded to bootloader at a specific address
that is temporary.  Add support for storing this information
somewhere permanent before it gets corrupted.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Dave Gerlach
b4a8c3b242 arm: mach-k3: am642: Unlock all applicable control MMR registers
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MAIN domain.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Keerthy
57dba04afb arm: mach-k3: am642: Add support for boot device detection
AM642 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Dave Gerlach
eb54168bb0 arm: mach-k3: Add basic support for AM642 SoC definition
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.

Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
  MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
  ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
  controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
  peripherals.
* Centralized System Controller for Security, Power, and Resource
  Management (DMSC).

See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:27:57 +05:30
Harald Seiler
35b65dd8ef reset: Remove addr parameter from reset_cpu()
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to.  This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value.  Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.

Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g.  COLD vs WARM resets).  As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).

To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely.  Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.

This transformation was done with the following coccinelle patch:

    @@
    expression argvalue;
    @@
    - reset_cpu(argvalue)
    + reset_cpu()

    @@
    identifier argname;
    type argtype;
    @@
    - reset_cpu(argtype argname)
    + reset_cpu(void)
    { ... }

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 14:03:02 -05:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Simon Glass
65e25bea59 dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
991759196f dm: Drop the unused arg in uclass_find_device_by_seq()
Now that there is only one sequence number (rather than both requested and
assigned ones) we can simplify this function. Also update its caller to
simplify the logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Suman Anna
7873e9df8f armv8: K3: j7200: Add custom MMU support
The A72 U-Boot code can load and boot a number of the available
R5FSS Cores on the J7200 SoC. Change the memory attributes for the
DDR regions used by the remote processors so that the cores can see
and execute the proper code.

The J7200 SoC has less number of remote processors compared to J721E,
so use less memory for the remote processors. So, a separate table
based on the current J721E table is added for J7200 SoCs, and selected
using the appropriate Kconfig CONFIG_TARGET_J7200_A72_EVM symbol.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-09-15 18:51:53 +05:30
Vignesh Raghavendra
7ce6c8ae58 arm: mach-k3: Add HyperFlash boot mode support
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-09-15 18:51:52 +05:30
Lokesh Vutla
01dbe366ba arm: mach-k3: j7200: Detect if ROM has already loaded sysfw
Detect if sysfw is already loaded by ROM and pass this information to
sysfw loader. Based on this information sysfw loader either loads the
sysfw image from boot media or just receives the boot notification
message form sysfw.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
9c8f41beea arm: mach-k3: j7200: Add support for storing extended boot info from ROM
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. ROM passes this information on number of images that are loaded
to bootloader at certain location. Add support for storing this
information before it gets corrupted.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
30de1ba0d3 arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.

Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
  capable dual Cortex-R5F MCUs and a Centralized Device Management and
  Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
  throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
  in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
  20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
  I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
  management.

See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1

Add support for detection J7200 SoC

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
73108dcd7f arm: mach-k3: j721e: Fix unlocking control module registers
In main control mmr there is no partition 4 and partition 6 is available
only on J721e. Fix the same in ctrl_mmr_unlock function

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
2a18be77de arm: mach-k3: j721e: Add detection for j721e
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e. This detection is needed when DT is not
available.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
dc57a554a5 arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. In such cases, SPL need not load sysfw from boot media, but need
to receive boot notification message from sysfw. So separate out
remoteproc calls for system controller from sysfw loader and just
receive the boot notification if sysfw is already loaded.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
58ccd6105c arm: mach-k3: Move mmr_unlock to a common location
mmr_unlock api is common for all k3 devices. Move it to a common
location.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Jean-Jacques Hiblot
d099db2829 arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined
And in turn tispl.bin ends up not embedding any DTB.
Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
b29a7cd09d board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom
when eeprom is not available

Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
897e83f0a5 arm: mach-k3: am6_init: Add support for USB boot mode
Add support for identifying USB host and device boot modes

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
403fc5c9cf arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes
U-boot only supports either USB host or device mode for a node at a
time in dts. To support both host and dfu bootmodes, set "peripheral"
as the default dr_mode but fixup property to "host" if host bootmode
is detected.

This needs to happen before the dwc3 generic layer binds the usb device
to a host or device driver. Therefore, add an fdtdec_setup_board()
implementation to fixup the dt based on the boot mode.

Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe
in both the host and device cases. This is required for accessing the
interface at USB 2.0 speeds.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
febb47ac61 arm: mach-k3: am6_init: Gate mmc related configurations with the appropriate config
Gate mmc related system related configurations with DM_MMC to avoid build
errors when MMC is not enabled

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
f5838b1542 arm: mach-k3: sysfw-loader: Add support to load SYSFW from USB
Add support for loading system firmware from a USB mass storage device

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
f9916b6d3b armv7R: K3: am654: Use full malloc in SPL both pre and post reloc
In order to be able to use things like file system drivers early on in
SPL (before relocation) in a memory-constrained environment when DDR is
not yet available we cannot use the simple malloc scheme which does not
implement the freeing of previously allocated memory blocks. To address
this issue go ahead and enable the use of the full malloc by manually
initializing the required functionality inside board_init_f by creating
a full malloc pool inside the pre-relocation malloc pool.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Andrew F. Davis
864e285739 arm: mach-k3: Clean non-coherent lines out of L3 cache
When switching on or off the ARM caches some care must be taken to ensure
existing cache line allocations are not left in an inconsistent state.
An example of this is when cache lines are considered non-shared by
and L3 controller even though the lines are shared. To prevent these
and other issues all cache lines should be cleared before enabling
or disabling a coherent master's cache. ARM cores and many L3 controllers
provide a way to efficiently clean out all cache lines to allow for
this, unfortunately there is no such easy way to do this on current K3
MSMC based systems.

We could explicitly clean out every valid external address tracked by
MSMC (all of DRAM), or we could attempt to identify only the set of
addresses accessed by a given boot stage and flush only those
specifically. This patch attempts the latter. We start with cleaning the
SPL load address. More addresses can be added here later as they are
identified.

Note that we perform a flush operation for both the flush and invalidate
operations, this is not a typo. We do this to avoid the situation that
some ARM cores will promote an invalidate to a clean+invalidate, but only
emit the invalidation operation externally, leading to a loss of data.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 10:18:27 +05:30
Simon Glass
a00867b47a sf: Drop dm.h header file from spi_flash.h
This header file should not be included in other header files. Remove it
and use a forward declaration instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
e6385c7e9c Makefile: Rename ALL-y to INPUTS-y
When binman is in use, most of the targets built by the Makefile are
inputs to binman. We then need a final rule to run binman to produce the
final outputs.

Rename the variable to indicate this, and add a new 'inputs' target.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00