2 commits

Author	SHA1	Message	Date
James Doublesin	34f27b2e86	ram: k3-am654: Do not rely on default values for certain DDR register ... Added the following registers to the DDR configuration: - ACIOCR0, - ACIOCR3, - V2H_CTL_REG, - DX8SLxDQSCTL. Modified enable_dqs_pd and disable_dqs_pd to only touch the associated bit fields for pullup and pulldown registers (to preserve slew rate and other bits in that same register). Also update the dts files in the same patch to maintain git bisectability. Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>	2019-10-25 17:33:21 -04:00
James Doublesin	d5e08fd204	armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename ... The current configuration of DDR on AM654 base board is for 1600MTs but the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi. Since 1600MHz is misleading, rename it to k3-am654-base-board-ddr4-1600MTs.dtsi Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>	2019-10-25 17:33:21 -04:00

Renamed from arch/arm/dts/k3-am654-base-board-ddr4-1600MHz.dtsi (Browse further)