Move fpga info to U_BOOT_CMD_MKENT subcommand.
Also use strtol instead of simple_strtoul. The reason is that if -1 is
passed (or fpga info without "fpga" variable) the list of all fpgas is
shown.
This functionality is in the fpga core but it couldn't be performed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Create command wrapper to clean fpga subcommands.
The function logic is taken from cmd_dm.c
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to check parameters in separate switch. Check them
directly when they are read. Also there is no reason to check loadmk
case separately because fpga_data address must be non zero too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Parameter checking is dead code because all the time there must be all
params assigned. If they are not assigned there is no 9th parameters
passed and checking before return CMD_RET_USAGE.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to check parameters in separate switch before main
one. This patch is simplifying error path and checking parameters right
after assignment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Incorrect command is already handled and FPGA_NONE should be used only
one. In case of error CMD_RET_USAGE can be returned directly without any
addition logic around.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move fpga_get_op() to top of file to remove local function declaration
and also remove useless retyping.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clean fpga_get_op() error handling by moving checking/print to do_fpga.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for info, load, loadp, loadb, loadbp, loadmk_legacy,
loadmk_legacy_gz, loadmk_fit, loadfs also with variable support.
There are probably missing failed tests.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch applied in 2010
"cmd_fpga: cleanup help and check parameters"
(sha1: a790b5b2326be9d7c9ad9e3d9b51a8bfabc62d07"
was adding this checking
+ if (dev == FPGA_INVALID_DEVICE) {
+ puts("FPGA device not specified\n");
+ op = FPGA_NONE;
+ }
which simply broke one command flow which was
setenv fpga <dev>
fpga loadmk <addr> // legacy image
fpga loadmk <addr>:<fit_image_name> //fit image
Also this sequence for FIT image is completely broken
setenv fpga <dev>
setenv fpgadata <addr>:<fit_image_name>
fpga loadmk
(Note: For legacy images this is working fine).
even from code I don't think this has ever worked properly
for fit image (dev = FPGA_INVALID_DEVICE should be rejected
by fpga core). Fit image support was in 2008 added by:
"[new uImage] Add new uImage fromat support to fpga command"
(sha1: c28c4d193d)
Just a summary of these facts that none found this for pretty long time
it shouldn't be a problem to remove this flow (without fpga dev)
completely to simplify the code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use Macro instead of hard code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
There are multiple GPIOs that can be used with the same driver depending
on the CONFIG_GPIO_BASE defined in the controller driver.
GPIO3 and 4 require a clock to be enabled so let's enable them when the
driver is built.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
The set_header call in kwbimage.c adds a checksum to the end of the
image in addition to setting up the header. It 'helpfully' updates the
st_size to match the fact that the file is now longer. However, mkimage
uses this length in the munmap call. This can lead to unmapping an extra
page, of perhaps required data. When this happens, a SEGV can occur.
To prevent this from happening, the munmap call now uses the same length
that was passed to mmap. This could also have been fixed by not changing
the length in kwbimage.c, however changing it in the main file means
that other plugins will also not fall for the same trap.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
[cp: resolve checkpatch complaints]
Tested-by: Chris Packham <judge.packham@gmail.com>
Add driver model support for OMAP_SERIAL while reusing
the functions in ns16550.c
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
This patch enables DM_SERIAL for the pandora board. Verified that
the default kernel can still be booted with this.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Add support for loading U-Boot on the Broadcom 7260 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Change the configured serial console index to reflect that it is the
first physical UART, reorder some defconfig lines and move some
environment configuration from bcmstb.h to bcm7445.h.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Four different boards had different options for enabling cache
that were virtually all the same. This consolidates these
common functions into arch/arm/cpu/arm926ejs/cache.c
This also has the positive side-effect of enabling cache on
the Davinci (da850) boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add mach-at91 to the list of consolidations]
Signed-off-by: Tom Rini <trini@konsulko.com>
Following build warning appears when pinctrl-single is built for ARM64:
In file included from drivers/pinctrl/pinctrl-single.c:10:0:
drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’:
./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
#define __arch_getw(a) (*(volatile unsigned short *)(a))
Fix this by using phys_addr_t for variable reg instead of u32
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
timer_pre_probe() tries to populate the clock rate from DT. omap
timer driver tries to overwrite this value irrespective of the value
populated fro DT. So update this value only when DT doesn't populate
the clock rate.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In order to handle counter overflows use 64 bit values for counter.
Also load the initial value during probe.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Add HS400 support.
Selecting HS400 needs first select HS200 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit fixes various devicetree warnings in the at91 devicetrees
like:
arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
These warnings make buildman report failed builds for most of at91 boards.
Thus, fixing it.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
For at91family, makefile was building unwanted DTBs
Moved them under specific target configuration.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Replace clrsetbits on ODR register (2 operations: one read + one write)
by writing on the correct bit (SET or RESET) of the BSRR register
(only 1 write operation).
Moreover this register if safe for simultaneous access by 2 master on
the bus.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch adds support for :
- Rate calculation through muxes and generic dividers
- Basic gate setting propagation
- Reparenting for muxes
- Clock rate setting through generic dividers without reparenting
Support is only added to the Composite VPU and VAPB clocks in order
to support the Video Processing Unit Power Domain clock setup.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
This patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.
This driver will depend on changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In int-ll64.h, we always use the following typedefs:
typedef unsigned int u32;
typedef unsigned long uintptr_t;
typedef unsigned long long u64;
This does not need to match to the compiler's <inttypes.h>.
Do not include it.
The use of PRI* makes the code super-ugly. You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
All architectures have the same definition for s8/16/32/64
and u8/16/32/64.
Factor out the duplicated code into <asm-generic/int-ll64.h>.
BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
You do not need to use the typedefs provided by compiler.
Our compilers are either IPL32 or LP64. Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/Makefile references armv5 for backwards compatibility with
older compilers. This patch removes those references to armv5,
since by now newer compilers are required which should have armv7
support enabled.
The Makefile also also has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty, so this patch tunes the
CPU_V7A architecture to generic-armv7-a.
The following size changed apply to omap3_logic using GCC.
Stock
text data bss dec hex filename
50910 429 67580 118919 1d087 spl/u-boot-spl
540713 22700 327072 890485 d9675 u-boot
Without Armv5
text data bss dec hex filename
50916 429 67580 118925 1d08d spl/u-boot-spl
540719 22700 327064 890483 d9673 u-boot
mtune=generic-armv7-a
text data bss dec hex filename
50932 429 67580 118941 1d09d spl/u-boot-spl
540519 22700 327080 890299 d95bb u-boot
Signed-off-by: Adam Ford <aford173@gmail.com>
setparity users has been updated to use new setconfig ops,
so we can safely remove setparity ops
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.
Adds SERIAL_GET_PARITY/BITS/STOP macros.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Unify the fgetc function when MUX is activated or not:
- always call tstc() : it is the normal behavior expected
by serial uclass (call tstc then getc) and that avoids
issue when SERIAL_RX_BUFFER is activated
- reload WATCHDOG in the char waiting loop
This patch allow to have the same behavior when CONSOLE_MUX is activated
or not and avoid regression when this feature is deactivated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Activate the serial rx buffer.
Prepare console MUX activation with vidconsole, and avoid console
performance issue (missing character for copy-paste).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".
=> nand info
Device 0: nand0, sector size 256 KiB
Page size 4096 b
OOB size 224 b
Erase size 262144 b
subpagesize 4096 b
options 0x00104200
bbt options 0x00060000
=> nand dump 0
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
...
The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]
The get_next_memory_node() always sets mem to -1 , which is incorrect,
because then every iteration of memory bank parsing will start from the
first memory bank instead of the previous one.
On systems with 1 memory bank defined in DT and CONFIG_NR_DRAM_BANKS=4 ,
like ie. r8a77965-salvator-x , this will result in U-Boot incorrectly
reporting four identical memory banks with the same memory configuration.
Fix this by setting mem to startoffset value, which restores the behavior
before the fixed patch was applied.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes: 452bc12102 ("fdt: fix fdtdec_setup_memory_banksize()")
Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZynqMP}
