Commit graph

33968 commits

Author SHA1 Message Date
Simon Glass
a683d0d347 input: Adjust structure of code in process_modifier()
Move all the '!release' code into one block so that it is clear that it only
applies on key release.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:41 -07:00
Simon Glass
b1d7a1875e input: Support the German keymap
Add support for the German keymap, taken from i8042.c. This can be selected
when the input library it initialised.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:41 -07:00
Thomas Chou
9961a0b6fb sandbox: add a sandbox timer and basic test
Add a sandbox timer which get time from host os and a basic
test.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:41 -07:00
Thomas Chou
6752195760 common/board_f.c: move mark_bootstage after arch_cpu_init_dm
As mark_bootstage() uses timer, it should go after driver model
is initialized.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Simon Glass
0b186c0825 input: Allow repeat filtering to be disabled
Generally the input library handles processing of a list of scanned keys.
Repeated keys need to be generated based on a timer in this case, since all
that is provided is a list of keys current depressed.

Keyboards which do their own scanning will resend codes when they want to
inject a repeating key. Provide a function which tells the input library to
accept repeating keys and not to try to second-guess the caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
3a85e4362a input: Add a function to add a keycode to the existing set
Most keyboards can be scanned to produce a list of the keycodes which are
depressed. With the i8042 keyboard this scanning is done internally and
only the processed results are returned.

In this case, when a key is pressed, a 'make' code is sent. When the key
is released a 'break' code is sent. This means that the driver needs to
keep track of which keys are pressed. It also means that any protocol error
can lead to stuck keys.

In order to support this type of keyboard, add a function when can be used
to provide a single keycode and either add it to the list of what is pressed
or remove it from the list. Then the normal input_send_keycodes() function
can be used to actually do the decoding work.

Add debugging to display the ASCII characters written to the input queue
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
77c7f0459f input: Add a few more keyboard keycodes
The slash and * are missing from the keycode tables. Add these so that
these keypad keys can be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Simon Glass
2e5513bda0 input: Correct keycode for Ctrl-Y
This code is currently incorrect, perhaps due to a typo. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Simon Glass
c5d257f93f i8042: Adjust keyboard init to assume success
Modify i8042_kbd_init() so that the normal pass is sucessful init and
failure exits early. This will make the code easier to extend and is easier
to read.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
4f087bace2 i8042: Adjust kbd_reset() to collect all failures
Rather than lots of 'return' statements, use goto to a single return.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
31d38ee66d i8042: Use functions to handle register access
At present the register access in kbd_reset() is quite primitive. This makes
it hard to follow.

Create functions to read and write data, both to a single register, and via
the command/data approach.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-on: Intel Crown Bay and QEMU
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
7fe0933c58 video: Drop unused console functions
CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and
CONFIG_CONSOLE_TIME are not used by any board. The implementation is not
great and stands in the way of a refactor of i8042. Drop these for now.
They can be re-introduced quite easily later, perhaps with driver-model
real-time-clock (RTC) support.

When reintroducing, it might be useful to make a few changes:
- Blink time would be more useful than blink count
- The confusing #ifdefs should be avoided
- The time functions should support driver model
- It would be best keyed off console_tstc() or some similar idle loop
    rather than a particular input driver (i8042 in this case)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
1fa4bfde18 dm: cros_ec: Convert cros_ec keyboard driver to driver model
Adjust the cros_ec keyboard driver to support driver model. Make this the
default for all Exynos boards so that those that use a keyboard will build
correctly with this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Simon Glass
f77f5e9be7 dm: tegra: Convert keyboard driver to driver model
Adjust the tegra keyboard driver to support driver model, using the new
uclass. Make this the default for all Tegra boards so that those that use
a keyboard will build correctly with this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Simon Glass
b206cd7372 dm: stdio: Plumb in the new keyboard uclass
When driver model is used for keyboards we must scan the available keyboards
and register them with stdio. Add code to do this.

At some point (once LCD/video is converted) we should be able to convert
stdio to driver model and avoid these dual data structures.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
745009c4d0 cros_ec: Use udevice instead of cros_ec_dev for keyboard functions
In preparation for converting the cros_ec keyboard driver to driver model,
adjust the cros_ec functions it will use to use a normal struct udevice.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Simon Glass
66877b0f5f input: Add the keycode translation tables separately
Require the caller to add the keycode translation tables separately so that
it can select which ones to use. In a later patch we will add the option to
add German tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
92778b2784 input: Return -ENOSPC when there is not space
Return a useful error instead of -1 when something goes wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
c9cac4cdce input: Add a device pointer to the input config
The read_keys() method in input is passed a struct input_config. Add a
device pointer there so that we can find out the device that is referred
to with driver model.

Once all drivers are converted we can update the input structure to use
driver model instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:40 -07:00
Simon Glass
e84421d8f3 dm: input: Create a keyboard uclass
Add a uclass for keyboard input, mirroring the existing stdio methods.
This is enabled by a new CONFIG_DM_KEYBOARD option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19 20:13:39 -07:00
Simon Glass
34ab37eef5 dm: usb: Add support for USB keyboards with driver model
Switch USB keyboards over to use driver model instead of scanning with the
horrible usb_get_dev_index() function. This involves creating a new uclass
for keyboards, although so far there is no API.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:39 -07:00
Ariel D'Alessandro
2b24e09c66 rockchip: Turn on CONFIG_DEBUG_UART_NS16550 in defconfigs
No UART driver was specified in defconfig, thus
DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
commit 220e8021af added a new Altera UART
driver.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19 17:06:25 -05:00
Tom Rini
9ef671c9d4 Merge branch 'master' of git://git.denx.de/u-boot-spi 2015-11-19 13:27:26 -05:00
Tom Rini
aa7077fcee Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-11-19 11:25:36 -05:00
Tom Rini
4c60850792 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2015-11-19 09:06:44 -05:00
Michal Simek
bdaeb8f23c common: mii: Do not allow to exceed max phy limit
Phy can have addresses 0-31. Check this boundary to ensure that user
can't call commands on phy address 32 and more.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-19 14:03:05 +01:00
Michal Simek
f3bd72801a zynq: sdhci: Define max clock by macro
zc1571 with silicon can operate on 200MHz maximum frequency. Setup this
frequency by default and fix setting for ep108.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 14:03:05 +01:00
Michal Simek
6777f38630 net: zynq: Fix MDC setting for zynq
Based on spec:
"MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and
write operations)"
Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47
which is above of 2.5MHz.
Using 48 divider will give us correct setting according spec
(111/48=2.31).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 14:03:05 +01:00
Michal Simek
2889659a55 net: zynq: Remove unused MDCCLKDIV2 macro
Driver cleanup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 14:03:05 +01:00
Michal Simek
242b15476c net: zynq: Fix mdc clock division setting for 100Mbit/s
Using set and clear macro is incorrect because it is not overwritting
origin mdc clock division setup.
For example origin setup is 8(0b001) and new setup is 64(0b100) which
means 0b101 is setup which is 96 divider.
Using writel to rewrite all setting like for 1000Mbit/s case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 14:03:05 +01:00
Michal Simek
e4d2318adb net: zynq: Wait till packet is sent
Wait till BD is processed to ensure that packet was sent successfully.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 14:03:05 +01:00
Edgar E. Iglesias
603ff0081a net: zynq: Disable secondary queues
Zynq has no priority queues.
ZynqMP has one priority queue and this change is required
to get ethernet working.
This patch was not needed on ep108 for uknown reason even
it should be used.
Tested on Zynq and ZynqMP.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 14:03:01 +01:00
Michal Simek
23a598f719 net: zynq: Add dummy packet to fix packet duplication issue
Target is duplicating packets. IP prefetches another BD and process it
when the first one is sent. Adding one dummy BD to the chain fix the
problem with packet duplication.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:50:09 +01:00
Michal Simek
081dc2fa78 net: zynq: Do not report TX underrun
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:50:09 +01:00
Michal Simek
45c0774151 net: zynq: Setup BD when structures are filled
Fix incorrect sequence in BD handling.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:50:09 +01:00
Michal Simek
ff4758789e net: zynq: Allocate BD_SPACE in connection to RX_BUF
BD_SEPRN_SPACE should not have hard coded value and it will be
calculated based on the number of buffer descriptors that we
would like to use.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:50:09 +01:00
Michal Simek
2588f2ddfd dm: sf: Add support for all targets which requires MANUAL_RELOC
It is follow up patch based on
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba0)
to update function pointers for DM.

Using post_bind is not ideal but it is one on current option what can be
used. Variable reloc_done has to be used do not call relocation after
every bind. Maybe new core functions should be introduced for this case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-19 13:10:32 +01:00
Michal Simek
31e1029a8e dm: core: Add missing entries for manual relocation
Patches:
"dm: core: Add a post_bind method for parents"
(sha1: 0118ce7957)
"dm: core: Add a uclass pre_probe() method for devices"
(sha1: 02c07b3741)
"dm: core: Allow the uclass to set up a device's child after binding"
(sha1: 081f2fcbd9)
"dm: core: Allow uclass to set up a device's child before it is probed"
(sha1: 83c7e434c9)

Adds new entries to struct driver and struct uclass_driver without
extending code for manual relocation. This patch fixes it for all
architectures which requires MANUAL_RELOC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19 13:10:16 +01:00
Michal Simek
281f1566b8 dm: spi: Add support for all targets which requires MANUAL_RELOC
It is follow up patch based on
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba0)
to update function pointers for DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19 13:10:16 +01:00
Nathan Rossi
e0f21e1cbc microblaze: Fix C99/gnu99 compatiblity for inline functions
'extern inline' is not portable across various C standards. To ensure
compatiblity with various standards/compilers change the functions to
static inline. This is a portable construct and serves as a comparable
definition to 'extern inline' from the gnu90 standard.

Additionally remove the function prototypes as they are not required due
to the functions being declared static and functions are correctly
ordered based on dependence.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 13:09:41 +01:00
Nathan Rossi
7cb73730c8 microblaze: Fix style issues in header files
Fix various style issues in MicroBlaze header files. Specifically fixing
style voilations including '__inline__', 'foo * bar' and 'void foo ('.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 13:09:41 +01:00
Michal Simek
0ebf40417d net: zynq: Fix clearing statistic
Previous loop was completely bogus. Iterration should go just over
statistic counters.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:09:21 +01:00
Michal Simek
97a51a0363 net: zynq: Extend register description with offsets
Extend comments with register offset to help with debuggging.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:09:21 +01:00
Michal Simek
16ce6de87e net: zynq: Add support for different PHY interface types
MII is setup by default for all cases. The most of boards are using
RGMII but PHY drivers are not doing any specific setting that's why MII
setting was working fine. With TI DP83867 is necessary to setup
paramaters based on interface type.

Use one setting per board for it which is something what will be removed
when driver is moved to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:09:21 +01:00
Michal Simek
198e9a4fe9 net: zynq: Add debug message to phyread/phywrite
Add debug messages to phyread/write to help with PHY debug.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:09:21 +01:00
Nathan Rossi
08598d6ee9 ARM: zynq: Add target for building bootable SPL image for Zynq
Add a build target to generate 'boot.bin' which includes SPL. This is
used by the platforms BootROM to load SPL directly.

This change also conditionally changes what the 'boot.bin' target
generates depending on the SoC. Leaving the behaviour unchanged for the
AT91 targets.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-19 13:09:21 +01:00
Nathan Rossi
66eef1e780 tools: zynqimage: Add Xilinx Zynq boot header generation to mkimage
As with other platforms vendors love to create their own boot header
formats. Xilinx is no different and for the Zynq platform/SoC there
exists the "boot.bin" which is read by the platforms bootrom. This
format is described to a useful extent within the Xilinx Zynq TRM.

This implementation adds support for the 'zynqimage' to mkimage. The
implementation only considers the most common boot header which is
un-encrypted and packed directly after the boot header itself (no
XIP, etc.). However this implementation does take into consideration the
other fields of the header for image dumping use cases (vector table and
register initialization).

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 13:09:21 +01:00
Michal Simek
bf146325a3 ARM64: zynqmp: Enable TI phy by default
Enable TI phy for Xilinx ZynqMP platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 13:09:21 +01:00
Edgar E. Iglesias
721aed7912 net: phy: Add support for Texas Instruments DP83867
Code is taken from Linux kernel driver (v4.2).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19 13:09:21 +01:00
Michal Simek
8741c490f9 ARM: zynq: Choose boot image based on OF_SEPARATE macro
OF_CONTROL is enabled by default for all Zynq boards.
The difference between two boot images is done by OF_SEPARATE
or OF_EMBED macros.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-19 12:57:48 +01:00