Commit graph

211 commits

Author SHA1 Message Date
Simon Glass
437c2b7cd0 x86: chromebook_link: Enable GPIO support
Enable GPIO support and provide the required GPIO setup information to
the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:15 +01:00
Simon Glass
9c678e152a x86: dts: Add microcode updates for ivybridge CPU
Add two microcode updates that are provided for this CPU. The updates
have been converted to a device tree form.

Note: SPDX submission has been done. If this license is approved I will
convert the files to use SPDX.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:14 +01:00
Simon Glass
2b6051541b x86: ivybridge: Add early LPC init so that serial works
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
which provides a serial port. This is accessible on Chromebooks, so enable
it early in the boot process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:12 +01:00
Simon Glass
8ef07571a0 x86: Add chromebook_link board
This board is a 'bare' version of the existing 'link 'board. It does not
require coreboot to run, but is intended to start directly from the reset
vector.

This initial commit has place holders for a wide range of features. These
will be added in follow-on patches and series. So far it cannot be booted
as there is no ROM image produced, but it does build without errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:11 +01:00
Simon Glass
e98a03ca68 dm: x86: Convert coreboot serial to use driver model
This makes use of the existing device tree node to use driver model
for the serial console.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-23 19:45:45 -06:00
Simon Glass
d1259c9f5f dm: x86: dts: Add additional info to the serial port node
Add more information so that U-Boot can find the address of the serial port.
Also fix the reg-shift value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-23 19:45:28 -06:00
Simon Glass
6ddc4fd822 x86: Add device tree information for Chrome OS EC
Add the required node describing how to find the EC on link.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 21:50:32 -06:00
Simon Glass
5957ac2a9f Makefile: Support include files for .dts files
Linux supports this, and if we are to have compatible device tree files,
U-Boot should also.

Avoid giving the device tree files access to U-Boot's include/ directory.
Only include/dt-bindings is accessible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-06-20 11:55:03 -06:00
Masahiro Yamada
3284c8b8ca dts: generate multiple device tree blobs
It is convenient to have all device trees on the same SoC compiled.
It allows for later easy repackaging without the need to re-run
the make file.

  - Build device trees with the same SoC under arch/$(ARCH)/dts

  - Copy the one specified by CONFIG_DEFAULT_DEVICE_TREE or
    DEVICE_TREE=... to dts/dt.dtb

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Masahiro Yamada
5ab502cb89 dts: move device tree sources to arch/$(ARCH)/dts/
Unlike Linux Kernel, U-Boot historically had *.dts files under
board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.

I think arch/$(ARCH)/dts dicretory is a better location
to store both *.dts and *.dtsi files.

For example, before this commit, board/xilinx/dts directory
had both Microblaze dts (microblaze-generic.dts) and
ARM dts (zynq-*.dts), which are totally unrelated.

This commit moves *.dts to arch/$(ARCH)/dts/ directories,
allowing us to describe nicely mutiple DTBs generation in the next commit.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Simon Glass
2712f08898 x86: fdt: Create basic .dtsi file for coreboot
This contains just the minimum information for a coreboot-based board.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:42 -08:00