Commit graph

728 commits

Author SHA1 Message Date
Vipul Kumar
6e9d9fcb4c spi: xilinx_spi: convert to livetree
Update the xilinx spi driver to support a live tree.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Vipul Kumar
83ce646943 spi: xilinx_spi: Added support to read JEDEC-id twice at the boot time
This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.

This patch added support to read JEDEC id in xilinx_spi_xfer ().

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Vipul Kumar
0c0de58f7b spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function
This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.

This patch also added support to read fifo_size from dts.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Michal Simek
4e7c1a2651 spi: xilinx: Read reg base address from DTS file
This patch added support to read register base address from DTS file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Ley Foon Tan
8b71e46cea spi: cadence_qspi: Fix warning cast from pointer to integer of different size
Use "%p" to print cmdbuf.

Compilation warning as below:

  CC      spl/drivers/spi/cadence_qspi_apb.o
  LD      spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
          cmdlen, (unsigned int)cmdbuf);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
9bd39dd8e5 spi: cadence_qspi: Fix compilation warning
Use "%zu" for size_t data type.

Compilation warning as below:

In file included from include/linux/bug.h:7:0,
                 from include/common.h:26,
                 from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
        ^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
 #define pr_fmt(fmt) fmt
                     ^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
  debug_cond(_DEBUG, fmt, ##args)
  ^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Thomas Fitzsimmons
894c3ad27f board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-07-10 16:55:57 -04:00
Hannes Schmelzer
c0eaffa039 spi: omap3: fix claim/release bus within DM
The claim/release bus function must not reset the whole SPI core because
settings regarding wordlen, clock-frequency and so on made by
set_wordlen, set_mode, set_speed get lost with this action. Resulting in
a non-functional SPI.

Without DM the failure didn't came up since after the spi_reset within
claim bus all the setup (wordlen, mode, ...) was called, in DM they are
called by the spi uclass.

We change now the things as following for having a working SPI instance
in DM:

- move the spi_reset(...) to the probe call in DM for having a known
hardware state after probe. Without DM we don't have a probe call, so we
issue the reset as before during the claim_bus call.

- in release bus we just reset the modulctrl to the reset-value (spi-
slave)

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-28 19:54:10 +05:30
Hannes Schmelzer
9cddf70ead spi: omap3: fix set_speed and set_mode dm callbacks
commit 8480792287
("spi: omap3: Skip set_mode, set_speed from claim") did break SPI
support on my AM335x board.

The named commit:

- ignored the responsible arguments (speed, mode)
The set speed/mode function must use the supplied function arguments to
work properly. With this commit we take those arguments and transfer
them to the priv-data.

- used wrong udevice pointer for getting priv data
the udevice-pointer within function argument is already the spi-bus
device, so it is wrong looking here for some parent (ocp-bus in this
case) and getting priv-pointer from there.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:35:15 +05:30
Hannes Schmelzer
b1d2b529b4 spi: omap3: pre-initialize bus-speed with max. slave-speed
Otherwise the frequency is zero and the clock divider cannot be setup by
'omap3_spi_set_speed' function.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:35:01 +05:30
Michael Trimarchi
34ad749141 spi: mxc_spi: Fix chipselect on DM_SPI driver uclass
CS GPIO activation low/high is determinated by the device tree
so we don't need to take in accoung in cs_activate and cs_deactivate

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:23:06 +05:30
Michael Trimarchi
618e8e20c2 spi: mxc: Fix compilation problem of DM_SPI class driver
drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr'
linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 14:18:41 +05:30
Vipul Kumar
240cd7566e spi: zynq_qspi: Fixed incorrect return value error
This patch replaced "return 0" with "return status" to fix the
incorrect return value error reported by the coverity.

Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-25 14:13:57 +05:30
Ley Foon Tan
6c353674bd spi: cadence_qspi: Change to use devfdt_get_addr_index()
Change to use devfdt_get_addr_index() function to get fdt address.

Original code has compilation warning below:

drivers/spi/cadence_qspi.c: In function ‘cadence_spi_ofdata_to_platdata’:
drivers/spi/cadence_qspi.c:297:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->regbase = (void *)data[0];
                  ^
drivers/spi/cadence_qspi.c:298:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->ahbbase = (void *)data[2];
                  ^
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:30:04 +05:30
Tom Rini
2a046ff5e9 Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-06-01 16:46:39 -04:00
Álvaro Fernández Rojas
46689a94b2 spi: bcm63xx_hsspi: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
85e1ddbaf0 spi: bcm63xx_spi: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Tom Rini
8ada17dde8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv
  tree fixing a warning.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-30 14:51:37 -04:00
Rick Chen
6083cf3883 spi: atcspi200: Fix compiler warning
Fix warning as below when compile in 64-bit.

warning: format '%u' expects argument of type
'unsigned int', but argument 6 has type 'size_t
{aka long unsigned int}

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Heinrich Schuchardt
4bcd88a2d8 spi: fsl_qspi: remove superfluous assignment
In

	void *rx_addr = NULL;
	rx_add = A;

the first assignment has no effect. Remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:19:24 +05:30
Heinrich Schuchardt
266580612f spi: lpc32xx: simplify logical expression
A & A & B == A & B

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:19:06 +05:30
Heinrich Schuchardt
8fad5e0b11 spi: atcspi200: avoid NULL dereference
For SPI_XFER_BEGIN | SPI_XFER_END the code sets data_out = NULL.
In the debug statement we should not dereference this value.
As we do not transfer any data the debug statement is not needed in this
case anyway.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:18:41 +05:30
Patrice Chotard
5e46123bf3 spi: stm32_qspi: Add reset support
In some situation, QSPI controller is already configured by an early
boot stage, adding reset support will insure that QSPI controller is
started from a pristine state.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
2a6ca73691 spi: stm32_qspi: Use dev_read_xxx API
Use dev_read_xxx() instead of old manner fdt_xxx() API

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
495f3b2ae5 spi: stm32_qspi: Add chip select management
Quad-SPI interface is able to manage 2 spi nor devices.
FSEL bit selects the flash memory to be addressed in single flash mode.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
76afe56a44 spi: stm32_qspi: Add st, stm32f469-qspi compatible string
Add "st,stm32f469-qspi" compatible which is used on kernel side.
This will be necessary when DT will be synchronised from kernel.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
09e1772067 spi: stm32_qspi: Align reg-names with kernel 4.12 RC1
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.12-rc1.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
8c4592d278 spi: stm32_qspi: Sort include files alphabetically
Sort include files by alphabetical order

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrick Delaunay
936abadac8 spi: stm32_qspi: Solve issue detected by checkpatch
Fix parameters function alingemnt
Fix variable declaration

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
12e7c91a0b spi: stm32_qspi: Remove CONFIG_CLK flag
As all platforms which uses this driver have CONFIG_CLK flag
enable in their defconfig, we can remove it from driver code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Marek Behún
dbbd5bdd27 spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequency
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.

Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Rajat Srivastava
1f55356411 spi: fsl_qspi: Introduce is_controller_busy function
Some SoCs have different endianness of QSPI IP if compared
to endianness of core. The function is_controller_busy()
checks if the QSPI controller is busy or not, considering
the endianness of the QSPI IP.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Adam Ford
f1b1f77060 Convert CONFIG_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver.  For now, just update
the CONFIG tests.  This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:11 -04:00
Eugeniy Paltsev
9b14ac5cc2 spi: dw: invert wait condition in dw_spi_xfer
While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 11:16:41 +05:30
Marek Vasut
ea5512eb09 spi: sh_qspi: Make use of the 32byte FIFO
The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
the SPI transmission 1 byte at time, if there is a 32byte chunk of
data to be transferred, fill the FIFO completely and then transfer
the data to/from the FIFO. This increases the SPI NOR access speed
significantly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
9573db654d spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
Replace the ad-hoc endless loops with wait_for_bit() with
reasonable timeout. Note that the loops had internal 10uS
delays, although there is no reason for those on this HW,
so they are dropped.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
1182264952 spi: sh_qspi: Drop SPBDCR wait
Waiting for SPBDCR == 1 is not required and is covered by the
subsequent wait for SPSR_SPRFF, so drop this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
0e6fa20b14 spi: sh_qspi: Replace data types with short ones
Just replace unsigned {char,short,long} with u{8,16,32},
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:50 +02:00
Marek Vasut
fbebea27e1 mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows
access to a SPI NOR flash attached to the RPC block and does not
support RPC in Hyperflash mode. Note that this block is extremely
selective when communicating with the SPI NOR.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:12:01 +02:00
Tom Rini
e80fa2c2c0 Revert "spi: atmel: Drop non-dm code"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 7b09477873.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:19:00 -04:00
Tom Rini
5270df2836 Revert "spi: atmel: Drop atmel_spi.h"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 37434db29b.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:18:26 -04:00
Christophe Leroy
18f8d4c60d powercp: mpc8xx: move commproc.h
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
move it into arch/powerpc/include/asm

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
ee1e600c13 powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Jagan Teki
89d4fc153b spi: atmel: default y if DM_SPI && ARCH_AT91
ATMEL_SPI is now fully converted to driver-model and
respective boards switch to DM_SPI as well,
so make default y for ARCH_AT91

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
37434db29b spi: atmel: Drop atmel_spi.h
atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
7b09477873 spi: atmel: Drop non-dm code
All board configs are now enabled DM_SPI for SPL and
U-Boot proper, so now its time to drop non-dm code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
9bf48e2ee8 spi: atmel: Add ifdef for DM_GPIO code
Few boards are configuring gpio directly from board instead
using drivers/gpio so add ifdef for DM_GPIO to compatible
for both the cases.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-04-06 16:11:09 -04:00
Sjoerd Simons
63018a3edd omap3: spi: Correct ti, pindir-d0-out-d1-in parsing
The ti,pindir-d0-out-d1-in property is not expected to have a value
according to the device-tree binding, so treat it as a boolean not a
uint property.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-23 23:03:29 +05:30
Eugeniy Paltsev
4b5f6c52e7 DW SPI: use 32 bit access instead of 16 and 32 bit mix
Current DW SPI driver uses 32 bit access for some registers and
16 bit access for others. So if DW SPI IP is connected via bus
which doesn't support 16 bit access we will get bus error.

Fix that by switching to 32 bit access only instead of 16 and 32 bit mix

Additional Documentation to Support this Change:
The DW_apb_ssi databook states:
"All registers in the DW_apb_ssi are addressed at 32-bit boundaries
to remain consistent with the AHB bus. Where the physical size of
any register is less than 32-bits wide, the upper unused bits of
the 32-bit boundary are reserved. Writing to these bits has no
effect; reading from these bits returns 0." [1]

[1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
bcdcb3e61e DW SPI: add option to use external gpio for chip select
DW SPI internal chip select management has limitation:
it hold CS line in active state only when the FIFO is not
empty. If the FIFO freed before we add new data the SPI transaction will
be broken.

So add option to use external gpio for chip select. Gpio can be added
via device tree using standard gpio bindings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
d3d8aaec74 DW SPI: refactor poll_transfer functions
There is no sense in waiting for RX data in dw_reader function:
there is no chance that RX data will appear in RX FIFO if
RX FIFO is empty after previous TX write in dw_writer function.
So get rid of this waiting. After that we can get rid of dw_reader
return value and make it returning void. After that we can get rid
of dw_reader return value check in poll_transfer function.

With these changes we're getting closer to Linux DW SPI driver.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
fc282c7bcb DW SPI: fix transmit only mode
In current implementation we get -ETIMEDOUT error when we try to use
transmit only mode (SPI_TMOD_TO)
This happens because in transmit only mode input FIFO never gets any data
which breaks our logic in dw_reader(): we are waiting until RX data will be
ready in dw_reader, but this newer happens, so we return with error.

Fix that by using SPI_TMOD_TR instead of SPI_TMOD_TO which allows to use
RX FIFO.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Eugeniy Paltsev
c6b4f031d9 DW SPI: fix tx data loss on FIFO flush
In current implementation if some data still exists in Tx FIFO it
can be silently flushed, i.e. dropped on disabling of the controller,
which happens when writing 0 to DW_SPI_SSIENR (it happens in the
beginning of new transfer)

So add wait for current transmit operation to complete to be sure
that current transmit operation is finished before new one.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-22 23:01:35 +05:30
Tom Rini
3fa9bc7969 Merge git://git.denx.de/u-boot-spi 2018-03-15 08:27:27 -04:00
Jagan Teki
b2b41d2777 spi: omap3: Fix redeclared error
omap3_spi_set_speed|mode redeclared bus symbol, fix the same.

error:
drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’:
drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of symbol
  struct udevice *bus = dev->parent;

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-14 23:19:31 +05:30
Patrice Chotard
aa5e3e22f4 board: stm32: switch to DM STM32 timer
Use available DM stm32_timer driver instead of dedicated
mach-stm32/stm32fx/timer.c.

Remove all defines or files previously used for timer usage in
arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx

Enable DM STM32_TIMER for STM32F4/F7 and H7.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Jagan Teki
8480792287 spi: omap3: Skip set_mode, set_speed from claim
set_mode, set_seed functions has separate function pointers
in dm_spi_ops, so use them in relevent one instead of
calling from claim_bus.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13 19:50:10 +05:30
Jagan Teki
15927aef02 spi: atcspi200: Drop non-dm code
Boards adp-ae3xx_defconfig, nx25-ae250_defconfig
already enabled DM_SPI, so non-dm code make no use
of it hence droped.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13 19:50:10 +05:30
Tuomas Tynkkynen
fbca0e66cc spi: Migrate CONFIG_CF_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
4a942f49b8 spi: Migrate CONFIG_KIRKWOOD_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
2c4b096b4c spi: Migrate CONFIG_LPC32XX_SSP to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
bbdf38698e spi: Migrate CONFIG_MPC8XXX_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
60e5456291 spi: Migrate CONFIG_MXC_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
7b819b569e spi: Migrate CONFIG_MXS_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:53 -05:00
Tuomas Tynkkynen
a5dfabea19 spi: Migrate CONFIG_SH_QSPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:47 -05:00
Tuomas Tynkkynen
95d3877a58 spi: Migrate CONFIG_SH_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:29 -05:00
Heinrich Schuchardt
923837e159 atcspi200: avoid possible NULL dereference
Check if ns before and not after dereferencing it.

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-07 22:06:18 -05:00
Tom Rini
1d12a7c8cd Merge git://git.denx.de/u-boot-spi 2018-01-26 07:46:34 -05:00
Eugeniy Paltsev
58c125b9e2 DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.

Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.

Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 11:26:16 +05:30
Vignesh R
aaa21d3ffc spi: cadence_qspi_apb: Make flash writes 32 bit aligned
Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.

[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Vignesh R
a743e2ba38 Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de.

Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Goldschmidt Simon
948ad4f075 Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
This reverts commit b63b46313e.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Jason Rush
15a70a5da3 spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Chris Packham
df16881cea spi: kirkwood_spi: implement workaround for FE-9144572
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz.  However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.

Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:08 +05:30
Mario Six
24fc1ec2ee spi: spi-uclass: Fix style violations
Remove a superfluous newline, and reduce the scope of a variable.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:08 +05:30
Mario Six
184fa1c8da spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
c5b88f29ba spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.

But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.

Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
547bcc3d18 spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
29cc4368ad dm: spi: add BCM63xx HSSPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:06 +05:30
Álvaro Fernández Rojas
5ac07d2969 dm: spi: add BCM63xx SPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Adam Ford
26410c1517 Convert CONFIG_DAVINCI_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_DAVINCI_SPI

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Peng Fan
afe8e1b033 spi: fsl_qspi: support i.MX6UL/6ULLL/7D
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.

The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB
address directly.

Add the compatible entry for 6ul/7d.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Rick Chen
6720e4ae7a cosmetic: atcspi200: Rename function name as atcspi200
Integrate function and struct name from ae3xx to
atcspi200 will be more reasonable.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 09:45:21 +08:00
Rick Chen
41bbb8b333 spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
atcspi200 is Andestech spi ip which is embedded in
AE3XX and AE250 platforms. So rename as atcspi200
will be more reasonable to be used in different
platforms.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 09:44:09 +08:00
Heinrich Schuchardt
11f12c17d7 rockchip: spi: the symbol for Hertz is Hz
fix typo

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Heinrich Schuchardt
042de609ed omap3: spi: the symbol for Hertz is Hz
fix typo

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:40 -05:00
Bin Meng
ab20107468 spi: ich: Lock down controller settings if required
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-27 15:13:47 +08:00
Tuomas Tynkkynen
95688de311 spi: Drop CONFIG_ATMEL_DATAFLASH_SPI
Last user of this option went away in commit:

fdc7718999 ("board: usb_a9263: Update to support DT and DM")

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-10-16 09:42:51 -04:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Adam Ford
ab0ac27242 spi: davinci_spi: Add da830-spi support for DM
The DM support is already in the driver, so add
da830-spi to the compatible list.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
2017-09-29 10:52:20 -04:00
Suresh Gupta
1050998728 spi: fsl_qspi: Copy 16 byte aligned data in TX FIFO
In some of the QSPI controller version, there must be atleast
128bit data available in TX FIFO for any pop operation otherwise
error bit will be set. The code will not make any behavior change
for previous controller as the transfer data size in ipcr register
is still the same.

Patch is tested on LS1046A which do not require 16 bytes aligned and
LS1088A which require 16 bytes aligned data in TX FIFO

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Anupam Kumar <anupam.kumar_1@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-25 15:45:15 +05:30
Suresh Gupta
1c631da459 spi: fsl_qspi: Add controller busy check before new spi operation
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-25 12:49:56 +05:30
Peng Fan
994266bdff spi: mxc_spi: support driver model
Add driver model support for mxc spi driver.
Most functions are restructured to be reused by DM and non-DM.
Tested on mx6slevk/mx6qsabresd board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-09-25 12:47:59 +05:30
rick
7155cd2e6e nds32: spi: Support spi dm driver.
Support spi driver and can detect MX25U1635E flash on AE3XX board.

Verification:

sf probe 0:0 50000000 0
spi_flash_std_probe(sf_Probr.c)
	spi_flash_probe_slave(sf_Probr.c)
	SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
	NDS32 # sf test 0x100000 0x1000
	SPI flash test:
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps
	Test passed
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
Philipp Tomsich
d27c273908 rockchip: spi: Convert to livetree
Update the Rockchip SPI driver to support a live device tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:35 +02:00
Bin Meng
d2ca80c3d7 x86: ich-spi: Clear atomic preop only when SPI settings are not locked
The atomic preop register can only be written when SPI settings are
not locked, otherwise it's read-only.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-09-02 23:35:55 +08:00
Bin Meng
52dd56ba84 x86: ich-spi: Remove useless assignment in ich_spi_xfer()
In ich_spi_xfer() when the driver presets control fields, control
variable gets assigned twice. Apparently only the last assignment
takes effect. Remove the other one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-09-02 23:35:55 +08:00