Commit graph

60159 commits

Author SHA1 Message Date
Simon Glass
a27520904f x86: Add new common CPU functions for turbo/burst mode
Add a few more CPU functions that are common on Intel CPUs. Also add
attribution for the code source.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add missing MSR_IA32_MISC_ENABLE write back in cpu_set_eist();
        fix 2 typos in cpu_get_burst_mode_state() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:47 +08:00
Simon Glass
f6d00da459 x86: Tidy up some duplicate MSR defines
Some MSR registers are defined twice in different parts of the file. Move
them together and remove the duplicates. Also drop some thermal defines
which are not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:47 +08:00
Simon Glass
2f0c2f03e7 x86: Add common functions for TDP and perf control
These functions are the same on modern Intel CPUs, so use common code to
set them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: return false instead of 0 in cpu_ivybridge_config_tdp_levels();
        fix 'muiltiplier' and 'desgn' typos]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:47 +08:00
Simon Glass
55a6b13a75 x86: Use a common bus clock for Intel CPUs
Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in
a common file and tidy up the copies.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:47 +08:00
Simon Glass
246ac08b03 x86: Add a common function to set CPU thermal target
This code appears in a few places, so move it to a common file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:46 +08:00
Simon Glass
e2493a7f5a x86: Use a common definition of MSR_IA32_PERF_CTL
Remove the duplicate definition as it is not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:46 +08:00
Simon Glass
a827ba910c x86: pci: Drop the first parameter in pci_x86_r/w_config()
This parameter is needed by the PCI driver-mode interface but is always
NULL on x86. There are a number of calls to this function so it makes
sense to minimise the parameters.

Adjust the x86 function to omit the first parameter, and introduce stub
functions to handle the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:46 +08:00
Simon Glass
49a0f8cc96 x86: Move acpi_s3.h to a common location
At present this hedaer is only available on x86. To allow sandbox to use
it for testing, move it to a common location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:46 +08:00
Simon Glass
59c871bca7 spl: Allow distinguishing between two phases in U-Boot
U-Boot has two distinct phases: before and after relocation. These are
commonly referred to as F (running from Flash) and R (Relocated and
running from RAM). Some drivers want to do different things in these
phases so update the SPL phase function to return a different value for
each.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
b51882d007 spl: Convert CONFIG_SPL_SIZE_LIMIT to hex
This is currently a decimal value which is not as convenient or
meaningful. Also U-Boot tends to use hex everywhere.

Convert this option to hex and add a comment for the size_check macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the typo in the commit title]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
27084c03d3 spl: Allow tiny printf() to be controlled in SPL and TPL
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.

Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
535e07846a arm: mxs: Correct CONFIG_SPL_NO_CPU_SUPPORT option
At present this is defined in Kconfig but there is a separate one in the
CONFIG whitelist. It looks like these are duplicates.

Rename the non-Kconfig one and remove it from the whitelist.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
9da3776bf6 iod: Enhance to support display of multiple values
At present the 'iod' command differs from 'md' in that it only shows a
single value. It is useful to see a dump of multiple values, particularly
when x86 peripherals contain register sets accessible via I/O ports.

Enhance the command to match md.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct multi-line comment format style]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:44 +08:00
Simon Glass
e37d963ec8 cros_ec: Add MEC_EMI_BASE and size to the header file
Provide these values which are part of the EC interface now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:44 +08:00
Simon Glass
fd42948fc9 log: Add log_nop() to avoid unused-variable warnings
If a log statement includes a variable and logging is disabled, this can
generate warnings about unused variables. Add a bit more complexity to the
macros to avoid this for the common case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:44 +08:00
Simon Glass
0b7ebee38e binman: Take account of skip-at-start with image-header
The image-header currently sets it offset assuming that skip-at-start is
zero. This does not work on x86 where offsets end at 4GB. Add in this
value so that the offset is correct.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:44 +08:00
Simon Glass
2d553c006d binman: Handle reading data for end-at-4gb sections
Some x86 sections have special offsets which currently result in empty
data being returned from the 'extract' command. Fix this by taking account
of the skip-at-start property.

Add a little more debugging while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:44 +08:00
Simon Glass
4e185e8dd7 binman: Add a base implementation of Entry.ReadChildData()
At present this function is not present in the Entry base class so it is
hard to find the documentation for it. Move the docs from the section
class and expand it a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:43 +08:00
Simon Glass
7bc4f0f883 binman: Allow verbose output with all commands
At present the verbose flag only works for the 'build' command. This is
not intended, nor is it useful. Update the code to support the verbose
flag and make use of a command exception handler.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:43 +08:00
Simon Glass
4e8de068a3 serial: ns16550: Add a PCI device/function field
When this UART is used early in boot (before PCI is set up) it is
convenient to store the PCI BDF of the UART so that it can be manually
configured. This is useful when it is used as a debug UART, for example.

Add a new field to hold this information, so that drivers can simply use
the existing platform data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:43 +08:00
Simon Glass
33c215af4b dm: pci: Add a function to read a PCI BAR
At present PCI address transaction is not supported so drivers must
manually read the correct BAR after reading the device tree info. The
ns16550 has a suitable implementation, so move this code into the core
DM support.

Note that there is no live-tree equivalent at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the unclear comments in test.dts]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:43 +08:00
Simon Glass
6a73cf3d8f pci: Show a message if PCI autoconfig fails
At present this fails silently which can be confusing since some devices
on the PCI bus may not work correctly. Show a message in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add a '\n' in the PCI autoconfig fail message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:42 +08:00
Simon Glass
f365152a55 pci: Add more debug detail when resources are exhausted
If PCI auto-config runs out of memory, show a few more details to help
diagnose the problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change %x to %llx to avoid build warnings on some platforms]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:42 +08:00
Simon Glass
bdaa976153 pci: Correct 'specifified' and 'Plese' typos
Fix these spelling errors the header file and documentation.

Fix a small typo in the PCI documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:42 +08:00
Simon Glass
90c668605f pci: Disable autoconfig in SPL
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
proper. For TPL and SPL we can normally used fixed BARs and save code size
and time.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:42 +08:00
Simon Glass
0911569b28 pci: Show the result of binding a device
Update the debugging info a little to show the result of trying to bind
a PCI device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:42 +08:00
Simon Glass
be0d8fa452 pci: sandbox: Probe PCI emulation devices when used
At present PCI emulation devices are not probed before use, since they
used to be children of the device that used them, and children cannot be
probed before their parents.

Now that PCI emulation devices are attached to the root node, we can
simply probe them, and avoid using the internal function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:41 +08:00
Simon Glass
9b69ba4a78 pci: sandbox: Move the emulators into their own node
Sandbox pci works using emulation drivers which are currently children of
the pci device:

	pci-controller {
		pci@1f,0 {
			compatible = "pci-generic";
			reg = <0xf800 0 0 0 0>;
			emul@1f,0 {
				compatible = "sandbox,swap-case";
			};
		};
	};

In this case the emulation device is attached to pci device on address
f800 (device 1f, function 0) and provides the swap-case functionality.

However this is not ideal, since every device on a PCI bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.

Worse, child devices cannot be probed before their parents. This forces
us to use 'find' rather than 'get' to obtain the emulator device. In fact
the emulator devices are never probed. There is code in
sandbox_pci_emul_post_probe() which tries to track when emulators are
active, but at present this does not work.

A better approach seems to be to add a separate node elsewhere in the
device tree, an 'emulation parent'. This could be given a bogus address
(such as -1) to hide the emulators away from the 'pci' command, but it
seems better to keep it at the root node to avoid such hacks.

Then we can use a phandle to point from the device to the correct
emulator, and only on sandbox. The code to find an emulator does not
interfere with normal pci operation.

Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. Update the existing
device trees and the code for finding an emulator.

This brings PCI emulators more into line with I2C.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 3 typos in the commit message;
        encode bus number in the labels of swap_case_emul nodes;
        mention commit 4345998ae9 in sandbox_pci_get_emul()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:41 +08:00
Simon Glass
e77663cf74 sandbox: Allow use of real I/O with readl(), etc.
At present these functions are stubbed out. For more comprehensive testing
with PCI devices it is useful to be able to fully emulate I/O access. Add
simple implementations for these.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change to use 'const void *' in sandbox_write();
        cast 'addr' in read/write macros in arch/sandbox/include/asm/io.h;
        remove the unnecessary cast in readq/writeq in nvme.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:41 +08:00
Simon Glass
b0e2c23d3e sandbox: pci: Increase the memory space
Increase the memory space so we can support the p2sb bus which needs
multiples of 1MB.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:41 +08:00
Simon Glass
189882c933 sandbox: Add a -T flag to use the test device tree
U-Boot already supports using -D to indicate that it should use the normal
device tree. It is sometimes useful to run with the test device tree, e.g.
when running a test. Add a -T option for this along with some
documentation.

It can be used like this:

   /tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev"

(this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:41 +08:00
Simon Glass
37a1cf9c9c sandbox: pci: Move pci_offset_to_barnum() to pci.h
This function is useful in PCI emulators. More it into the header file to
avoid duplicating it in other drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
fae2c16ede sandbox: pci: Drop the get_devfn() method
This method is not used anymore since the bus/device/function of PCI
devices can be obtained from their (parent's per-child) platform data.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
cea7c0956a sandbox: swap_case: Use statics where possible
Some functions and a struct should be marked static since they are not
used outside this file. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
239cdcff5a sandbox: Add support for clrsetio_32() and friends
These functions are available on x86 but not sandbox. They are useful
shortcuts and clarify the code, so add them to sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
3414581380 sandbox: Rename PCI ID for swap_case to be more specific
Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more
descriptive and allows us to add new PCI emulators without any conflict or
confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Simon Glass
5abd58f0de sandbox: mmc: Fix up MMC emulator for valgrind
At present running sandbox with valgrind produces some warnings due to the
MMC emulator not filling in all the expected fields. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: use sizeof() instead of hardcoded 16]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Simon Glass
a605b0f767 sandbox: spmi: Add ranges property for address translation
At present address translation does not work since there is no ranges
property in the spmi nodes. Add empty ranges properties and a little more
logging so that this shows the error:

   /tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \
	-c "ut dm spmi_access_peripheral" -L7 -v
   ...
   pm8916_gpio_probe() bad address: returning err=-22

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Simon Glass
22327003a9 dm: test: Correct a stray backslash in dm_test_destroy()
This should perhaps be a period.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add the ending period and reword the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Simon Glass
e5f7390458 dm: core: Add device_foreach_child()
We have a 'safe' version of this function but sometimes it is not needed.
Add a normal version too and update a few places that can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Simon Glass
4805a7af8e dm: core: Correct the return value for uclass_find_first_device()
This function returns -ENODEV when there is no device. This is
inconsistent with other functions, such as uclass_find_next_device(),
which returns 0.

Update it and tidy up the incorrect '-1' values in the comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:38 +08:00
Simon Glass
ea14778d06 dm: core: Call ofdata_to_platdata() with of-platdata
At present this function is never called when of-platdata is enabled since
we never have a device tree. However, this function is responsible for
copying over the of-platdata, so we must call it. Otherwise the probe()
method would have to be used.

Correct this and fix the sandbox serial driver to not read from the device
tree and try to write to what is read-only platdata on some platforms.

Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:38 +08:00
Simon Glass
ad95047936 dm: test: Don't fail when tests are skipped due to build
At present tests that are marked as only for livetree fail when executed
on sandbox_flattree. They cannot actually be executed, but we should not
resport them as 'not found', since this causes errors. Instead, they
should be silently skipped.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:38 +08:00
Simon Glass
fe9a967925 dm: test: Fix running of multiple test from command line
At present when multiple 'ut dm' commands are executed, all but the first
is run with a flat tree, even if live tree is enabled. This is because the
live tree node pointer is set to NULL and never restored.

This does not affect normal test running, which just runs all the test in
one go, but can be confusing when several individual tests are run during
the same U-Boot run.

Correct this by restoring the pointer.

Fixes: c166c47ba3 (dm: test: Add support for running tests with livetree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:38 +08:00
Simon Glass
fdd72be486 dm: core: Add documentation on how to debug driver model
Sometimes devices don't appear and it can be confusing. Add a few notes to
help with this situation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 2 issues in the doc and include the doc in the index.rst]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:37 +08:00
Simon Glass
c8b31cce45 dm: core: Drop a few early returns
Two functions in this file return early for no good reason. Adjust the
code to match the standard DM style of returning 0 at the end of the
function on success.

Oddly enough this save 12 bytes of code size on ARM.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:37 +08:00
Simon Glass
d3e773613b dm: core: Use U-Boot logging instead of pr_debug()
The pr_debug() functions do not response to setting the log level and in
fact have their own separate log level. Use U-Boot logging instead.

Perhaps we should make these options redirect to log_debug(), etc.?

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:37 +08:00
Simon Glass
bdeb2bccbf x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMIT
This MSR number is used on most modern Intel processors, so drop the
confusing NHM prefix (which might mean Nehalem).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: drop MSR_IVT_TURBO_RATIO_LIMIT as no code uses it]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:37 +08:00
Simon Glass
ebe002cd18 x86: Add various MTRR indexes and values
Add some new MTRRs used by Apollolake as well as a mask for the MTRR
type.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:37 +08:00
Simon Glass
08deb6d36f x86: Add more comments to the start-up code
The full start-up sequence (TPL->SPL->U-Boot) can be a bit confusing since
each phase has its own 'start' file. Add comments to explain this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:36 +08:00