This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
of nand chips.
Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Serval SoC family has 32 pins. Currently there is no
support for Serval in Linux kernel.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
- Sync Armada-38x dts with Linux 4.20 from Chris
- Misc changes and enhancements to Turris Mox (v4) from Marek
- Reserve PSCI area for Armada 8k from Heinrich
- New Allied Telesis x530 board (Armada-385) from Chris
- Misc minor changes (defconfig etc)
The Armada 37xx watchdog driver was recently accepted for mainline
kernel by watchdog subsystem maintainer, but the driver works a little
different than the one in U-Boot. This patch fixes this.
In the previous implementation there was a tiny period of time when the
watchdog was disabled and the system was vulnerables - this was during
pinging, which was done by disabling, setting, and enabling the counter.
Now pinging is done without disabling the watchdog. We use 2 counters:
Counter 1 is the watchdog counter - on expiry, the system is reset.
Counter 0 is used to reset Counter 1 to start counting from the set
timeout again. So Counter 1 is set to be reset on Counter 0 expiry event
event and pinging is done by forcing an immediate expiry event on
Counter 0.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
The bounce buffer is used by a few drivers (most of the MMC drivers)
to overcome limitations in their respective DMA implementation.
This moves the configuration to Kconfig and makes it user-selectable
(even though it will be a required feature to make those drivers
work): the expected usage is for drivers depending on this to 'select'
it unconditionally from their respective Kconfig (see follow-up
patches).
This commit includes a full migration using moveconfig.py to ensure
that each commit compiles. To ensure bisectability we update
dependencies of various drivers to now select BOUNCE_BUFFER when needed.
[trini: Squash all patches to ensure bisectability]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
Modify the RC and EP mode judge method, save the mode as a variable,
the variable will be used by other function.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
fsl-mc lazyapply command applies dpl from efi_exit_boot_services().
Status of fsl-mc node in working fdt is updated at this stage.
However, an efi application like grub may already have copied the fdt.
So the updates to fdt done at efi_exit_boot_services() may not be
visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply
command is used.
Fixes: b7b8410a8f (ls2080: Exit dpaa only right before exiting U-Boot)
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Restore the legacy flow along with TFABOOT flow for
IFC configuration.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Each ECC layout consumes about 2984 bytes in the .data section. Allow
to disable the default ECC layouts if a driver is known to provide its
own ECC layout.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
With the new mscc_bb_spi.c driver, there is no longer use for the
gpio-mscc-bitbang-spi.c driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Do not build write support, unless it's enabled.
In the SPL case, this change will typically remove
precious bytes (as write support is most often
not needed in SPL).
This is important on this platform, where the maximum
SPL size is 14 KiB.
With gcc v7.3, this change saves 144 bytes producing:
size spl/u-boot-spl
text data bss dec hex filename
9240 752 712 10704 29d0 spl/u-boot-spl
To make the code easier to compile-out and more
readable, a pair of read_data/write_data helpers are created.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Use CONFIG_IS_ENABLED(BLK) instead of CONFIG_BLK,
in order to fix the following build issues when
CONFIG_SPL_MMC_WRITE is selected:
drivers/mmc/mmc_write.c:69:7: error: conflicting types for 'mmc_berase'
ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:39:7: note: previous declaration of 'mmc_berase' was here
ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt);
^~~~~~~~~~
drivers/mmc/mmc_write.c:187:7: error: conflicting types for 'mmc_bwrite'
ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:37:7: note: previous declaration of 'mmc_bwrite' was here
ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
^~~~~~~~~~
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This add support for the the MSCC serial GPIO driver in MSCC
VCoreIII-based SOCs.
By using a serial interface, the SIO controller significantly extends
the number of available GPIOs with a minimum number of additional pins
on the device. The primary purpose of the SIO controller is to connect
control signals from SFP modules and to act as an LED controller.
This adds the base driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Buildman clang support and a few fixes
Small fixes to 'dm tree' and regmap test
Improve sandbox build compatibility
A few other minor fixes
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Merge tag 'dm-pull-15jan19' of git://git.denx.de/u-boot-dm
Fix recent changes to serial API for driver model
Buildman clang support and a few fixes
Small fixes to 'dm tree' and regmap test
Improve sandbox build compatibility
A few other minor fixes
Switching private data manual allocation to driver model auto allocation
so users no longer need to deallocate themself because this would be
deallocated by driver model when the device is no longer required.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cache up to 4 kiB entries. 4 kiB is the default block size on ext4, yet
the underlying block layer devices usually report support for 512B . In
most cases, the 512B support is emulated (ie. SD cards, SSDs, USB sticks
etc.) and the real block size of those devices is much bigger.
To avoid performance degradation with such devices and FS setup, bump
the maximum cache entry size to 4 kiB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
If _debug_uart_putc() is called before _debug_uart_init(), the
ns16550 debug uart driver hangs in a tight loop waiting for the
tx FIFO to get empty.
As this can happen via a printf sneaking in before the port calls
debug_uart_init(), introduce a config option to ignore characters
before the debug uart is initialized.
This is done by reading the baudrate divisor and aborting if is zero.
The Kconfig option is required as reading the baudrate divisor does
not seem to work for all ns16500 compatibles (which is why the last
attempt on this has been reverted in 1a67969a99).
Tested on socfpga_cyclone5_socrates.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DEBUG_UART_SKIP_INIT is used only by debug UART and thus should depend
on DEBUG_UART.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The mmc_select_mode_and_width() function can be called while the card
is in HS200/HS400 mode and can be used to downgrade the card to lower
mode, e.g. HS. This is used for example by mmc_boot_part_access_chk()
which cannot access the card in HS200/HS400 mode and which is in turn
called by saveenv if env is in the MMC.
In such case, forcing the card clock to legacy frequency cannot work.
Instead, the card must be switched to HS mode first, from which it can
then be reprogrammed as needed.
However, this procedure needs additional code changes, since the current
implementation checks whether the card correctly switched to HS mode in
mmc_set_card_speed(). The check only expects that the card will be going
to HS mode from lower modes, not from higher modes, hence add a parameter
which indicates that the HS200/HS400 to HS downgrade is happening. This
makes the code send the switch command first, reconfigure the controller
next and finally perform the EXT_CSD readback check. The last two steps
cannot be done in reverse order as the card is already in HS mode when
the clock are being switched on the controller side.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Convert HiSilicon HI6220 MMC driver based on DWMMC IP to driver
model.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Enable this on poplar]
Signed-off-by: Tom Rini <trini@konsulko.com>
Updates i2c muxes drivers to support livetree.
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695a)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is needed to properly calculate i2c bus speed divisors.
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Xilinx AXI I2C controller driver based on the Linux i2c-xiic driver.
This driver is stripped of all the IRQ handling and uses pure polling,
yet tries to retain most of the structure of the Linux driver to make
backporting of fixes easy.
Note that the IP has a known limitation on 255 bytes read and write,
according to xilinx this is still being worked on [1].
[1] https://forums.xilinx.com/t5/Embedded-Processor-System-Design/AXI-IIC-V2-0-I2C-Master-Reading-multiple-bytes-from-I2C-slave/m-p/854419/highlight/true#M39387
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
All driver-model functions should have a device as the first parameter.
Update this function accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
At present this stores the error number in an unsigned int so an error is
never detected. Use the existing signed variable instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
At present the 'Index' column assumes there is only one digit. But on some
devices (e.g. snow) there are a lot of regulators and GPIO banks. Adjust
the output to allow for two digits without messing up the display.
Also capatalise the heading to match.
Fixes: 5197dafc42 (dm: core: Widen the dump tree to show more of the
driver's name.)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Liviu Dudau <liviu.dudau@foss.arm.com>
This patch adds ethernet support for Mediatek ARM-based SoCs, including
a minimum setup of the integrated switch.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-By: "Frank Wunderlich" <frank-w@public-files.de>
The ethsys contains not only the clock gating controller, but also the
reset controller for the whole ethernet subsystem and its components.
This patch adds binding of the reset controller so that the ethernet node
can have references on it.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The following hang is observed on a Hummingboard 2 MicroSOM
i2eX iMX6D - rev 1.3 with no eMMC populated on board:
U-Boot SPL 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)
Trying to boot from MMC1
U-Boot 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)
CPU: Freescale i.MX6D rev1.5 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 33C
Reset cause: POR
Board: MX6 HummingBoard2
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
---> hangs
which is caused by the following infinite loop inside esdhc_send_cmd_common()
while (!(esdhc_read32(®s->irqstat) & flags))
;
Instead of looping forever, provide an exit path so that a timeout
error can be propagated in the case irqstat does not report
any interrupts, which may happen when no eMMC is populated on
board.
Reported-by: Ricardo Salveti <rsalveti@rsalveti.net>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Ricardo Salveti <rsalveti@rsalveti.net>
