Commit graph

8318 commits

Author SHA1 Message Date
Scott Wood
a166fbca20 powerpc: fix 8xx and 82xx type-punning warnings with GCC 4.7
C99's strict aliasing rules are insane to use in low-level code such as a
bootloader, but as Wolfgang has rejected -fno-strict-aliasing in the
past, add a union so that 16-bit accesses can be performed.

Compile-tested only.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2013-06-11 22:01:45 +02:00
Gabor Juhos
842033e696 pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option
The pci_indirect.c file is always compiled when
CONFIG_PCI is defined although the indirect PCI
bridge support is not needed by every board.

Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
config option and only compile indirect PCI
bridge support if this options is enabled.

Also add the new option into the configuration
files of the boards which needs that.

Compile tested for powerpc, x86, arm and nds32.
MAKEALL results:

powerpc:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 641
  Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
  ----------------------------------------------------------
  Note: the warnings for ELPPC and MPC8323ERDB are present even
  without the actual patch.

x86:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 1
  ----------------------------------------------------------

arm:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 311
  ----------------------------------------------------------

nds32:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 3
  ----------------------------------------------------------

Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
2013-06-07 14:17:01 -04:00
Masahiro Yamada
a0ba279ac6 generic_board: reduce the redundancy of gd_t struct members
This commit refactors common/board_f.c and common/board_r.c
in order to delete the dest_addr and dest_addr_sp from
gd_t struct.

As mentioned as follows in include/asm-generic/global_data.h,

  /* TODO: is this the same as relocaddr, or something else? */
  unsigned long dest_addr;        /* Post-relocation address of U-Boot */

dest_addr is the same as relocaddr.
Likewise, dest_addr_sp is the same as start_addr_sp.

It seemed dest_addr/dest_addr_sp was used only as a scratch variable
to calculate relocaddr/start_addr_sp, respectively.

With a little refactoring, we can delete dest_addr and dest_addr_sp.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
2013-06-07 14:17:01 -04:00
Peter Korsgaard
12d7a47420 am335x: enable falcon boot mode for mmc (raw and fat) and nand
Jump into full u-boot mode if a 'c' character is received on the uart.

We need to adjust the spl bss/malloc area to not overlap with the
loadaddr of the kernel (sdram + 32k), so move it past u-boot instead.

For raw mmc, we store the kernel parameter area in the free space after
the MBR (if used). For nand, we use the last sector of the partition
reserved for u-boot.

This also enables the spl command in the full u-boot so the kernel
parameter area snapshot can be created.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07 14:17:01 -04:00
Tom Rini
b6144dfce9 devkit8000: Add SPL_OS for MMC support
Signed-off-by: Tom Rini <trini@ti.com>
2013-06-07 14:16:43 -04:00
Tom Rini
47b8e52744 Merge branch 'master' of git://git.denx.de/u-boot-video 2013-06-07 08:35:36 -04:00
Tom Rini
edfcf85a0a am33xx/omap4+: Move SRAM_SCRATCH_SPACE_ADDR to <asm/arch/omap.h>
The location of valid scratch space is dependent on SoC, so move that
there.  On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR.  On
am33xx/ti814x we want to use what the ROM defines as "public stack"
which is the area after our defined download image space.  Correct the
comment about and location of CONFIG_SPL_TEXT_BASE.

Signed-off-by: Tom Rini <trini@ti.com>
2013-06-06 08:57:45 -04:00
Stephen Warren
ea697ae7eb ARM: bcm2835: add simplefb DT node during bootz/m
Add a DT simple-framebuffer node to DT when booting the Linux kernel.
This will allow the kernel to inherit the framebuffer configuration from
U-Boot, and display a graphical boot console, and even run a full SW-
rendered X server.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-05 22:40:38 +02:00
Stephen Warren
6a195d2d8a lcd: add functions to set up simplefb device tree
simple-framebuffer is a new device tree binding that describes a pre-
configured frame-buffer memory region and its format. The Linux kernel
contains a driver that supports this binding. Implement functions to
create a DT node (or fill in an existing node) with parameters that
describe the framebuffer format that U-Boot is using.

This will be immediately used by the Raspberry Pi board in U-Boot, and
likely will be used by the Samsung ARM ChromeBook support soon too. It
could well be used by many other boards (e.g. Tegra boards with built-in
LCD panels, which aren't yet supported by the Linux kernel).

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-05 22:40:03 +02:00
Tom Rini
eecf9e2e78 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-06-05 12:45:34 -04:00
Tom Rini
1318d00e58 Merge branch 'tpm' of git://git.denx.de/u-boot-x86 2013-06-05 08:55:35 -04:00
Tom Rini
320d9746d3 am33xx: Correct NON_SECURE_SRAM_START/END
Prior to Sricharan's cleanup of the boot parameter saving code, we
did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a
problem that the address was pointing to the middle of our running SPL.
Correct to point to the base location of the download image area.
Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being
used.  As part of correcting these tests, make use of the fact that
we've always been placing our stack outside of the download image area
(which is fine, once the downloaded image is run, ROM is gone) so
correct the max size test to be the ROM defined top of the download area
to where we link/load at.

Signed-off-by: Tom Rini <trini@ti.com>

---
Changes in v2:
- Fix typo noted by Peter Korsgaard
2013-06-04 16:32:31 -04:00
Simon Glass
13167dac19 bootstage: Remove unused entries related to kernel/ramdisk/fdt load
Now that the code for loading these three images from a FIT is common, we
don't need individual boostage IDs for each of them.

Note: there are some minor changes in the bootstage numbering, particuarly
for kernel loading. I don't believe this matters.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:32 -04:00
Simon Glass
4651800d51 image: Use fit_image_load() to load kernel
Use the new common code to load a kernel. The functionality should not
change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:31 -04:00
Simon Glass
53f375fa81 image: Use fit_image_load() to load FDT
Use the new common code to load a flat device tree. Also fix up a few casts
so that this code works with sandbox. Other than that the functionality
should not change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:31 -04:00
Simon Glass
a51ec63b85 image: Use fit_image_load() to load ramdisk
Use the new common code to load a ramdisk. The functionality should not
change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:31 -04:00
Simon Glass
782cfbb259 image: Introduce fit_image_load() to load images from FITs
At present code to load an image from a FIT is duplicated in the three
places where it is needed (kernel, fdt, ramdisk).

The differences between these different code copies is fairly minor.
Create a new function in the fit code which can handle any of the
requirements of those cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:31 -04:00
Simon Glass
a2cc9bf4c1 bootstage: Introduce sub-IDs for use with image loading
Loading a ramdisk, kernel or FDT goes through similar stages. Create
a block of IDs for each task, and define a consistent numbering within
the block. This will allow use of common code for image loading.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:31 -04:00
Simon Glass
063ae006ae main: Separate out the two abortboot() functions
There are two implementations of abortboot(). Turn these into two separate
functions, and create a single abortboot() which calls either one or the
other.

Also it seems that nothing uses abortboot() outside main, so make it static.

At this point there is no further use of CONFIG_MENU in main.c.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2013-06-04 16:06:31 -04:00
Simon Glass
ea5427e260 net: Add prototype for update_tftp
This function should be declared in net.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2013-06-04 16:06:31 -04:00
Simon Glass
6236fd75af at91: Correct CONFIG_AUTOBOOT_PROMPT definition for pm9263
This is not currently used, since autoboot is not enabled for this
board, but the string is missing a parameter. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-06-04 16:06:31 -04:00
Tom Wai-Hong Tam
1b393db587 tpm: Reorganize the I2C TPM driver
This patch does a similar code reogranzation from
  http://patchwork.ozlabs.org/patch/132179/
which is based on an old version of code (fdt support and bus selection
still not in). It merges this tidy-up on top of the recent code. It does
not make any logical change.

tpm.c implements the interface defined in tpm.h based on underlying
LPC or I2C TPM driver. tpm.c and the underlying driver communicate
throught tpm_private.h.

Note: Merging the LPC driver with tpm.c is left to future patches.

Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-03 01:31:23 -07:00
Vincent Palatin
ec34fa5e43 tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C)
Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs,
which supports clockstretching, combined reads and a bus speed of
up to 400khz. The device also has a new device id.

This is based on the kernel patch provided by Infineon :
https://gerrit.chromium.org/gerrit/42332

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Luigi Semenzato <semenzato@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2013-06-03 01:26:25 -07:00
Tom Wai-Hong Tam
5bdf46b71b x86: config: Reflect the name changes of LPC TPM configs
The new name is more aligned with Linux kernel's naming of TPM driver.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-03 01:26:25 -07:00
Tom Rini
d6639d10db Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2013-05-31 18:28:47 -04:00
Sergey Lapin
dfe64e2c89 mtd: resync with Linux-3.7.1
This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:

- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.

- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).

To produce this update I used tag v3.7.1 of linux-stable repository.

The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-05-31 17:12:03 -05:00
Albert ARIBAUD
a19b0dd62d Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c
2013-05-30 14:45:06 +02:00
Axel Lin
60985bba58 tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL build
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28 12:58:44 -07:00
Tom Warren
d56273de15 Tegra: Remove unused/non-existent spl linker script reference
Tegra builds use the common u-boot-spl.lds now.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 12:58:42 -07:00
Shaveta Leekha
6eaeba23dd powerpc/b4860qds: Add LAW Target ID and Create LAW entry for Maple
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:14 -05:00
Poonam Aggrwal
8fa0102bcf powerpc/B4: Merge B4420 and B4860 in config_mpc85xx.h
B4420 is a subset of B4860. Merge them in config_mpc85xx.h to simplify
the defines.
- Removed #define CONFIG_SYS_FSL_NUM_CLUSTERS as this is used nowhere.
- defined CONFIG_SYS_NUM_FM1_10GEC to 0 for B4420 as it does not have 10G.

Also move CONFIG_E6500 out of B4860QDSds.h into config_mpc85xx.h.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:14 -05:00
Suresh Gupta
16d88f415a Enable XAUI interface for B4860QDS
- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
	The PHY addresses of Teranetics PHY on XAUI riser card are assigned
	based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
	AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
        and slot2
- Configure MDIO for 10Gig Mac

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:12 -05:00
Shaohui Xie
94025b1cd8 powerpc/p5040: enable PBL tool support
Provided a default RCW for P5040, then it can use PBL to build
ramboot image.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:12 -05:00
York Sun
3d2972feac powerpc/T4160: Merge T4160 and T4240 in config_mpc85xx.h
T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify
the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:11 -05:00
Shaohui Xie
c79fd50382 T4240/ramboot: enable PBL tool for T4240
Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:10 -05:00
Suriyan Ramasami
0ad6c34c3e ARM: Add Seagate GoFlex Home support
Add Seagate GoFlex Home support

Start with dockstar configuration
define support for RTC, DATE, SATA and EXT4FS

Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
2013-05-23 11:59:17 +02:00
Andre Przywara
d21c3afab7 ARM: vexpress: enable bootz and hush parser for all VExpress boards
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23 11:22:51 +02:00
Andre Przywara
3d3ae8502d ARM: vexpress: add support for Versatile Express Cortex-A15-TC2
This adds support for the Cortex-A15-TC2 core tile for the Versatile
Express board by ARM. This is mostly a copy of the A5 support file,
but will be extended later with A15 specific options.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23 11:22:48 +02:00
Ryan Harkin
cd4f46e1ef ARM: vexpress: create A5 specific board config
This patch creates a new config for the A5 dual core tile that includes the
generic config for the Versatile Express platform.

The generic config has been modified to provide support for the Extended
Memory Map, as used on the A5 core tile.  A5 does not support the legacy
memory map.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23 11:22:44 +02:00
Ryan Harkin
9b58a3f606 ARM: vexpress: refactoring of Versatile Express CA9x4 support
The current ca9x4_ct_vxp platform contains support for a Versatile
Express motherboard with a quad core A9 core tile.

This patch separates the Versatile Express motherboard code and the
A9 specific code, to ease supporting more core tiles in the next
patches.

Andre: merged the first two of Ryan's original patches and did some
checkpatch fixes.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23 11:22:39 +02:00
Andrew Gabbasov
aedadf10f0 cfi_flash: Fix unaligned accesses to cfi_qry structure
Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.

Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-23 09:47:59 +02:00
Prabhakar Kushwaha
a1b81ab26f nand/fsl_ifc: Convert to self-init
Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2013-05-22 16:53:42 -05:00
Bo Shen
3225f34e5c ARM: atmel: add sama5d3xek support
Add sama5d3xek support with following feature
  - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
  - boot from SPI flash support
  - boot from SD card support
  - LCD support
  - EMAC support
  - USB OHCI support

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21 11:54:16 +02:00
Kuo-Jung Su
f6c3b34697 mmc: update Faraday FTSDC010 for rw performance
Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.

It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-15 18:18:15 -05:00
Tom Rini
fb651b10d4 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2013-05-15 08:41:04 -04:00
Wolfgang Denk
d6ed322222 Power: remove support for Freescale MPC8220
The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.

Remove the code to avoid wasting maitaining efforts on dead stuff.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
2013-05-15 08:41:03 -04:00
Shaohui Xie
04bccc3ab0 T4240/net: use QSGMII card PHY address by default
Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card
PHY address is variable depends on different slot.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:25 -05:00
Shaohui Xie
7794b1a7e6 net/phy: add VSC8574 support
The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:25 -05:00
Shengzhou Liu
959278083d t4240qds/eth: fixup ethernet for t4240qds
1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
   slots and interfaces.
3, Adding detection of slot present for XGMII interface.
4, There is no PHY for XFI, so removed related phy address settings.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:24 -05:00
York Sun
10d644b10d powerpc: Add T4160QDS
T4160QDS shares the same platform as T4240QDS. T4160 is a low power
version of T4240, with eight e6500 cores, two DDR3 controllers, and
slightly different SerDes protocols.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:00:30 -05:00