Commit graph

88042 commits

Author SHA1 Message Date
Bin Meng
124308e67b riscv: qemu: Remove out-of-date "riscv, kernel-start" handling
Commit 66ffe57 ("riscv: qemu: detect and boot the kernel passed by QEMU")
added some logic to handle "riscv,kernel-start" in DT and stored the
address to an environment variable kernel_start.

However this "riscv,kernel-start" has never been an upstream DT binding.
The upstream QEMU never generates such a DT either. Presumably U-Boot
development was based on a downstream QEMU fork.

Now we drop all codes in commit 66ffe57, except that BOARD_LATE_INIT
is kept for later use.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-02 16:32:41 +08:00
Bin Meng
608b80b5b8 riscv: qemu: Enable PRE_CONSOLE_BUFFER
By default the video console only outputs messages after it's ready.
Messages before that won't show on the video console, but U-Boot has
an option to buffer the console messages before it's ready.

Enable this support, and carefully select an address for the buffer.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-02 16:32:36 +08:00
Bin Meng
6b343ab38d console: Print out complete stdio device list
At present if both CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are on,
during boot, the printed out stdio devices are incomplete, e.g.:
with "stdout=serial,vidconsole", only "vidconsole" is printed.

For such case, we can print out the stdio device name from the
environment variables.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-02 16:32:31 +08:00
Bin Meng
f30fd55e82 console: Refactor stdio_print_current_devices() a little bit
In preparation to future changes, refactor this routine a little bit.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
2023-08-02 16:32:26 +08:00
Bin Meng
75bfc6fac5 console: Make stdio_print_current_devices() static
As it is only called in common/console.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-02 16:32:02 +08:00
Bin Meng
142276ce51 console: kconfig: Drop the redundant VIDEO dependency
The VIDEO dependency is described twice in CONSOLE_MUX.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-02 16:31:58 +08:00
Bin Meng
716161663e riscv: qemu: Enable Bochs video support
Enable video console using the emulated Bochs VGA card.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-02 16:31:52 +08:00
Heinrich Schuchardt
093bd0354e acpi: Add missing RISC-V acpi_table header
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h. This file does not exist for the RISC-V architecture
and thus code compilation fails when using this driver on RISC-V

Create an empty include file.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-08-02 11:02:33 +08:00
Heinrich Schuchardt
cd24d0722a riscv: sifive: initialize PCI on Unmatched
The Unmatched board is typically booted from NVMe which requires PCI.
When dropping to a console PCI is not initialized yet. 'pci enum' has to be
called.

Change the configuration to call  pci_init() in board_init_r().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-08-02 11:02:33 +08:00
Minda Chen
493c03f820 configs: starfive-jh7110: Add CONFIG_RTL8169
Add PCIe device rtl8169 net adapter driver support.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Minda Chen
ff8590a225 net: rtl8169: Add one device ID 0x8161
Add rtl8169 NIC device ID and reorder the device ID.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Minda Chen
3094845165 net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V
For RISC-V architeture, hardware maintain the dcache coherency.
Software do not flush the cache. So even cache-line size larger
than descriptor size, driver can work.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Minda Chen
a6a0d6a191 net: rtl8169: Fix compile warning in rtl8169
While compiling rtl8169.c, There are many "make pointer from
integer without a cast" compile warnings. fix them with
adding cast.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Mason Huo
8db2224ffc riscv: dts: starfive: Enable PCIe host controller
Enable and add pinctrl configuration for PCIe host controller.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Mason Huo
cb2750e10b configs: starfive-jh7110: Add support for PCIe host driver
Add PCIe host driver and nvme driver in configure file.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Mason Huo
7870a05581 starfive: pci: Add StarFive JH7110 pcie driver
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.

Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Minda Chen
7eb62cb716 i2c: designware: Add Kconfig for designware_i2c_pci.c
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain Designware i2c and PCI but do not use ACPI,
This file cannot be compiled. So add a new Kconfig for
designware_i2c_pci.c, which depends on ACPIGEN

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Tom Rini
7755b22007 - MTRR fixes for x86 boards
- Add a little more info to 'cbsysinfo' command
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Merge tag 'x86-pull-20230801' of https://source.denx.de/u-boot/custodians/u-boot-x86

- MTRR fixes for x86 boards
- Add a little more info to 'cbsysinfo' command
2023-08-01 11:57:55 -04:00
Tom Rini
e5b082a3c5 - dm video cosmetic style fix
- bochs: remove the x86 limitation
  - correct kconfig text for PCI default FB size
  - kconfig: drop the superfluous PCI dependency
  - set up default FB size for Bochs
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Merge tag 'video-20230801' of https://source.denx.de/u-boot/custodians/u-boot-video

 - dm video cosmetic style fix
 - bochs: remove the x86 limitation
 - correct kconfig text for PCI default FB size
 - kconfig: drop the superfluous PCI dependency
 - set up default FB size for Bochs
2023-08-01 10:17:49 -04:00
Tom Rini
aaeaef2536 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- i2c-gpio: Correctly handle new {sda, scl}-gpios bindings (Chris)
- mvebu: x240: Use i2c-gpio instead of built in controller (Chris)
2023-08-01 10:17:23 -04:00
Nikhil M Jain
b8d3a6c7d1 drivers: video: tidss: tidss_drv: Use kconfig VIDEO_REMOVE to remove video
Perform removal of DSS if kconfigs VIDEO_REMOVE or SPL_VIDEO_REMOVE is
set by user. Otherwise if above Kconfigs are not selected, it is assumed
that user wants splash screen to be displayed until linux kernel boots
up. In such scenario, leave the power domain of DSS as "on" so that
splash screen stays intact until kernel boots up.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-08-01 13:41:02 +02:00
Nikhil M Jain
3f9b5a7ffa drivers: video: tidss: tidss_drv: Change remove method
Change remove method of DSS video driver to disable video port instead
of performing a soft reset, as soft reset takes longer duration. Video
port is disabled by setting enable bit of video port to 0.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-08-01 13:40:07 +02:00
Bin Meng
e1a0cafcfb video: bochs: Set the frame buffer size per configuration
At present the uclass stored frame buffer size is set to a hard
coded value, but we can calculate the correct value based on what
is configured.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:35:39 +02:00
Bin Meng
f91f0e74df video: kconfig: Set default FB size for Bochs
Set up a default frame buffer size of 8MiB for Bochs for non-x86
architecturs as PCI is normally not enumerated before relocation
on these architectures.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 13:34:51 +02:00
Bin Meng
185ae84af0 video: kconfig: Drop the superfluous dependency
PCI is always selected by X86 architecture hence "X86 && PCI" does
not make it better.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:34:05 +02:00
Bin Meng
17cd80237b video: kconfig: Fix wrong text for the PCI default FB size
There is an example in the VIDEO_PCI_DEFAULT_FB_SIZE help text to
tell people how to calculate its value but the resolution given
does not match the value. Fix it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 13:33:05 +02:00
Bin Meng
e1b46977de video: bochs: Remove the x86 dependency
Now that the driver is legacy free, remove the x86 dependency so
that it can be used on non-x86 architectures.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:32:25 +02:00
Bin Meng
ffe1c8379e video: bochs: Avoid using IO instructions to access VGA IO port
At present the driver uses IO instructions to access the legacy
VGA IO ports, which unfortunately limits the driver to work only
on x86. It turns out the IO instruction is not necessary as Bochs
VGA card remaps the legacy VGA IO ports (0x3c0 -> 0x3df) to its
memory mapped register space from offset 0x400.

Update the driver to use MMIO access for VGA IO port.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:31:29 +02:00
Bin Meng
caae795a1c video: bochs: Drop the useless argument of bochs_vga_write()
bochs_vga_write() takes 'index' as one argument, but never uses it.

While we are here, use macros instead of magic numbers for the
VGA IO port register name and value.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:30:41 +02:00
Bin Meng
5ee029a190 video: bochs: Drop inclusion of <asm/mtrr.h>
The driver does not call any MTRR APIs.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:29:14 +02:00
Bin Meng
08ece5b3ec dm: video: Cosmetic style fix
Some coding convention fixes for video_post_bind().

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:28:59 +02:00
Simon Glass
db971a7587 x86: Add a little more info to cbsysinfo
Show the number of records in the table and the total table size in
bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-01 10:08:49 +08:00
Simon Glass
d560f7cae0 x86: Return mtrr_add_request() to its old purpose
This function used to be for adding a list of requests to be actioned on
relocation. Revert it back to this purpose, to avoid problems with boards
which need control of their MTRRs (i.e. those which don't use FSP).

The mtrr_set_next_var() function is available when the next free
variable-MTRR must be set, so this can be used instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: 3bcd6cf89e ("x86: mtrr: Skip MSRs that were already programmed..")
Fixes: 596bd0589a ("x86: mtrr: Do not clear the unused ones..")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-01 10:06:46 +08:00
Bin Meng
bff002d45b video: vesa: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Bin Meng
0f497b2b8c video: ivybridge: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Bin Meng
b5126f26d0 video: broadwell: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Bin Meng
3dfa411501 x86: fsp: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Bin Meng
41fbb34469 x86: Change testing logic of mtrr commit
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
needs to program MTRRs too. With current testing logic of mtrr
commit in init_cache_f_r(), the mtrr commit is skipped which won't
work as the queued mtrr requests include setup for DRAM regions.

Change the logic to allow such configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tweak to put back CONFIG_FSP_VERSION2 at top:
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Tom Rini
4e619e8d4f Merge tag 'u-boot-rockchip-20230731' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Update dwc3 generic driver and update support for rk3568/rk3328;
- Add boards:
        rk3566: Pine64 Quartz64-A/B, SOQuartz on Model A/Blade/CM4-IO
        rk3568: Radxa E25 Carrier Board
        rk3588: Radxa ROCK5A
- Fixes and updates for chromebook veryon/jerry/speedy;
- SPI support fixes for rk3399/rk3568/rk3588;
- rk3588 usbdp phy support;
- dts and config updates for different boards;
2023-07-31 11:33:51 -04:00
Jonas Karlman
1f54f71b18 board: rockchip: Add Radxa E25 Carrier Board
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.

Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA

Device tree is imported from linux next-20230728.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
2023-07-31 20:34:32 +08:00
Jagan Teki
b6fd3c63f4 configs: rockchip: Enable USB2PHY for RK3328 boards
Enable USB2PHY for all RK3328 boards.

=> usb start
starting USB...
Bus usb@ff5c0000: USB EHCI 1.00
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: generic_phy_get_bulk : no phys property
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: USB DWC2
scanning bus usb@ff5c0000 for devices... 2 USB Device(s) found
scanning bus usb@ff5d0000 for devices... 1 USB Device(s) found
scanning bus usb@ff600000 for devices... 2 USB Device(s) found
scanning bus usb@ff580000 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Mass Storage (480 Mb/s, 500mA)
       TS-RDF5A Transcend 000000000009

  1  Hub (12 Mb/s, 0mA)
      U-Boot Root Hub

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

  1  Hub (480 Mb/s, 0mA)
  |   U-Boot Root Hub
  |
  +-2  Human Interface (12 Mb/s, 98mA)
       Logitech USB Receiver

=> dm tree -s
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 syscon        1  [ + ]   syscon                |-- syscon@ff450000
 phy           0  [ + ]   rockchip_usb2phy      |   `-- usb2phy@100
 clk           2  [ + ]   rockchip_usb2phy_clo  |       |-- usb480m_phy
 phy           1  [ + ]   rockchip_usb2phy_por  |       |-- otg-port
 phy           2  [ + ]   rockchip_usb2phy_por  |       `-- host-port
 sysinfo       0  [ + ]   sysinfo_smbios        |-- smbios
 usb           3  [ + ]   dwc2_usb              |-- usb@ff580000
 usb_hub       3  [ + ]   usb_hub               |   `-- usb_hub
 usb_dev_ge    0  [ + ]   usb_dev_generic_drv   |       `-- generic_bus_3_dev_2
 usb           0  [ + ]   ehci_generic          |-- usb@ff5c0000
 usb_hub       0  [ + ]   usb_hub               |   `-- usb_hub
 usb_mass_s    0  [ + ]   usb_mass_storage      |       `-- usb_mass_storage
 blk           2  [ + ]   usb_storage_blk       |           |-- usb_mass_storage.lun0
 partition     4  [ + ]   blk_partition         |           |   |-- usb_mass_storage.lun0:1
 partition     5  [ + ]   blk_partition         |           |   `-- usb_mass_storage.lun0:2
 bootdev       3  [   ]   usb_bootdev           |           `-- usb_mass_storage.lun0.bootdev
 usb           1  [ + ]   ohci_generic          `-- usb@ff5d0000
 usb_hub       1  [ + ]   usb_hub                   `-- usb_hub

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
c016525858 clk: rockchip: rk3328: Handle usb480m phy clock
Handle USB480M clock ID in set_rate() and set_parent()
to allow the dt assigned-clocks and assigned-clock-parents
work on rk3328.dtsi

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
9aa93d8403 phy: rockchip-inno-usb2: Add USB2 PHY for RK3328
USB2.0 Host and OTG controllers in RK3328 are using USB2PHY.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
5d334b70cc configs: Enable DWC3 USB 3.0 on RK3328 boards
Enable USB 3.0 in all RK3328 boards.

=> usb start
starting USB...
Bus usb@ff5c0000: ehci_generic usb@ff5c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: 1 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (12 Mb/s, 0mA)
      U-Boot Root Hub

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

  1  Hub (480 Mb/s, 0mA)
      U-Boot Root Hub

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
185571b6ec usb: dwc3-generic: Restrict single ctrl node for RK3328
Like Rockchip RK3568, the RK3328 also have single node to
represent the glue and ctrl for USB 3.0.

So, use the driver data to use single ctrl for RK3328 DWC3.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
559911ff2e configs: Drop unused XHCI_DWC3 for RK3328 boards
Driver support for rk3328 is not supported so drop this
unused XHCI_DWC3.

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
b71f74eab4 arm64: dts: rockchip: Drop unused rk3328-xhci node
rk3328-xhci has been added due to the fact that the upstream
dwc3 is unsupported. Moreover, the driver for rk3328-xhci is
not added to the code tree.

By considering these facts and unsupported rk3328-xhci this
patch is dropping all related code from DT. However, the DWC3
is fixed now in dwc3-generic and RK3328 USB 3.0 is functional
in upcoming patches.

Let's drop it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jonas Karlman
fea7a29cc8 power: regulator: rk8xx: Add 500us delay after LDO regulator is enabled
A quick power cycle of a LDO regulator during dw-mmc signal voltage
change has shown that SD-card does not always get recognized.

Linux driver use an enable_time of 400us for LDO regulators. Apply a
500us delay when a LDO regulator is enabled to fix possible issues.

Fixes: 94afc1cb46 ("power: regulator: rk8xx: update the driver for rk808 and rk818")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: elaine.zhang<elaine.zhang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Chris Packham
5c1c6b7306 arm: mvebu: x240: Use i2c-gpio instead of built in controller
There is an Errata with the built-in I2C controller where various I2C
hardware errors cause a complete lockup of the CPU (which eventually
results in an watchdog reset).

Put the I2C MPP pins into GPIO mode and use the i2c-gpio driver instead.
This uses a bit-banged implementation of an I2C controller and avoids
triggering the Errata.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-07-31 13:50:57 +02:00
Chris Packham
414236b887 i2c: i2c-gpio: Correctly handle new {sda, scl}-gpios bindings
gpio_request_list_by_name() returns the number of gpios requested.
Notably it swallows the underlying -ENOENT when the "gpios" property
does not exist.

Update the i2c-gpio driver to check for ret == 0 before trying the new
sda-gpios/scl-gpios properties.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2023-07-31 13:50:57 +02:00