This patch defines the 2 flush_dcache_range and invalidate_dcache_range
functions for all the powerpc architecture. Their implementation is
borrowed from the kernel's misc_32.S file and replace the ones from
mpc86xx and ppc4xx since they were equivalent.
This is a fix for the problem introduced by this patch:
http://patchwork.ozlabs.org/patch/448849/
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T1023RDB is a Freescale Reference Design Board that hosts the T1023 SoC.
T1023RDB board Overview
-----------------------
- T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- Memory: 2GB Micron MT40A512M8HX unbuffered 32-bit fixed DDR4 without ECC
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
- one 1G RGMII port on-board(RTL8211F PHY)
- one 1G SGMII port on-board(RTL8211F PHY)
- one 2.5G SGMII port on-board(AQR105 PHY)
- PCIe: Two Mini-PCIe connectors on-board.
- SerDes: 4 lanes up to 10.3125GHz
- NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash
- NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash
- eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash.
- USB: one Type-A USB 2.0 port with internal PHY
- eSDHC: support SD/MMC card and eMMC on-board
- 256Kbit M24256 I2C EEPROM
- RTC: Real-time clock DS1339 on I2C bus
- UART: one serial port on-board with RJ45 connector
- Debugging: JTAG/COP for T1023 debugging
As well updated T1024RDB to add T1023RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix defconfig files]
Reviewed-by: York Sun <yorksun@freescale.com>
Freescale PCIe controllers v3.0 and later need to set bit
CFG_READY to allow all inbound configuration transactions
to be processed normally when in EP mode. However, bit
CFG_READY has been moved from PCIe configuration space to
CCSR PCIe configuration register comparing previous version.
The patch is to set this bit according to PCIe version.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T2080QDS PEX1/Slot#1 will down-train from x4 to x2,
with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15.
Soft reset PCIe can fix this issue.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds SD boot support for T4240RDB board. SPL
framework is used. PBL initializes the internal RAM and
copies SPL to it. Then SPL initializes DDR using SPD and
copies u-boot from SD card to DDR, finally SPL transfers
control to u-boot.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: Fix T4240RDB_SDCARD_defcofig]
Reviewed-by: York Sun <yorksun@freescale.com>
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Commit 96d2bb952b ("powerpc/mpc85xx: Don't relocate exception vectors")
simplified IVOR initialization a bit too much, failing to use the
post-relocation offset. This doesn't cause a problem with normal NOR
boot, in which both the pre-relocation and post-relocation addresses
are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such
as for NAND/SD/etc. boot on some targets, as well as the QEMU target,
the post-relocation address will not be the same in the lower 16 bits,
as reserve_uboot() ensures that the relocation address is always 64
KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.
Fixes: 96d2bb952b ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Once we add support for the ohci controller the phy-init and phy-power-on
functions may be called twice (once by the ehci code and once by the ohci
code) protect them against this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The 2/3 usb-phys on the sunxi SoCs are really a single separate functional
block, and are modelled as such in devicetree. So once we've moved all the
sunxi usb code to the driver-model then phy_probe will be called once
for the entire block from the driver-model enumeration code.
Move to this now as this also avoids problems with phy_probe being called
multiple times once we introduce ohci support. This also allows us to get rid
of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed
to be called only once.
Since we're effectively rewriting the probe / remove functions, move them
to the end of the file while we are at it, as that is the most logical place
for them.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The usbc.? files now only contain usb-phy related code, rename them to make
this clear.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Rename the sunxi_usbc_foo functions to sunxi_usb_phy_bar to make it clear
that these are usb-phy functions. Also change the verbs & nouns in the suffix
to match the verbs & nouns used in the Linux kernels generic phy framework.
This patch purely renames things, it contains no functional changes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This is the only function left in sunxi/usbc.c which is not phy related,
so remove it.
This is a preparation patch for turning the usbc.c code into a proper
usb phy driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The sunxi "usbc" code is mostly about phy setup, but currently also sets up
the host controller clocks, which is something which really belongs in the
host controller drivers, so move it there.
This is a preparation patch for moving the sunxi ehci code to the driver
model and for adding ohci support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Now that all sunxi boards are using driver-model for gpio (*), we can remove
the non driver-model support from the axp gpio code, and the glue to call
into the axp gpio code from the sunxi_gpio non driver-model code.
*) For the regular u-boot build, SPL still uses non driver-model gpio for
now, but the SPL never uses axp gpios support and we were already not building
axp-gpio support for the SPL.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
All sunxi boards now use the driver-model, so remove the non driver-model
code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Now that we've everything prepared for it remove the DM settings from the
defconfig(s) and simply always set them for sunxi.
This makes all sunxi boards allways use the driver model for gpios and
ethernet, and allows us to move over more bits to the driver-model without
the need to introduce #ifdef-ery for boards which are not yet using DM.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This is a preparation patch for switching all sunxi boards over to using
the driver model.
Note that rather then defining both CONFIG_DEFAULT_DEVICE_TREE (for u-boot)
and CONFIG_FDTFILE (for the kernel), this commit simply replaces all
CONFIG_FDTFILE defconfig settings with CONFIG_DEFAULT_DEVICE_TREE and
uses CONFIG_DEFAULT_DEVICE_TREE for setting the default fdtfile env value
in sunxi-common.h .
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
u-boot has support for a number of boards for which a dts file still needs
to be written, add minimal dts files for these boards so that we can switch
them over to driver-model / fdt.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We need dts files for all boards we support, so bring in a few unmerged ones,
these will be replaced with the upstream merged versions the next time we
sync dts files.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Bring all the sunxi dts files (and update existing ones) from
mripard/sunxi/dt-for-4.1 (which will be merged into upstream master any
day now). This is necessary so that we can move all sunxi boards over to
the driver model.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Modify the sunxi-emac eth driver to support driver model.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
Besides being spelled wrong, the DMA_CPU_TRRESHOLD define actually has
nothing to do with DMA as we only use mmio fifo access. Rename it to
EMAC_RX_BUFSIZE to properly reflect what it does.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
Split all the core functionality out into functions taking a
struct emac_eth_dev *priv argument as preparation for adding driver-model
support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
This is a preparation-patch for adding device-model support to the emac
driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
netdev.h should not be included in driver-model enabled builds (doing so
causes compiler warnings about struct eth_driver not being declared), but
we do use sunxi_gmac_initialize in the driver-model case, so move it out of
netdev.h .
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add driver-model support to the axp_gpio code, note that this needs a small
tweak to the driver-model version of sunxi_name_to_gpio to deal with the
vbus detect and enable pins which are not standard numbered gpios.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Move the axp-gpio code out of the drivers/power/axp*.c code, and into
a new separate axpi-gpio driver.
This change drops supports for the gpio3 pin on the axp209, as that requires
special handling, and no boards are using it.
Besides cleaning things up by moving the code to a separate driver, as
a bonus this change also adds support for the (non vusb) gpio pins on the
axp221 and the gpio pins on the axp152.
The new axp-gpio driver gets its own Kconfig option, and is only enabled
on boards which need it. Besides that it only gets enabled in the regular
u-boot build and not for the SPL as we never need it in the SPL.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the axp152 and axp209 PMICs to the pmic register access
helpers. This is a preparation patch for moving the axp gpio code to a
separate gpio driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Move the register helpers used to access the registers via p2wi resp.
rsb bus on the otherwise identical axp221 and axp223 pmics to a separate
file, so that they can be used by the upcoming standalone axp gpio driver
too.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Change the axp_gpio_foo function prototypes to match the gpio uclass op
prototypes, this is a preparation patch for moving the axp gpio code to
a separate driver-model gpio driver.
Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c
this adds are removed in a later patch.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
When doing a driver-model enabled build we still need sunxi_name_to_gpio_bank
(for now) for the mmc pinmux code in board/sunxi/board.c, so build it for
driver-model enabled builds too.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
We want to use driver-model/fdt with other model SoCs too, so add
compatible strings for the other SoCs to the dm sunxi gpio code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Until sunxi moves to device tree (e.g. for USB) we need to convert named
GPIOs to numbers. Add a function to do this.
This fixes the USB / EHCI support not working on the LinkSprite pcDuino3
(which uses devicemodel).
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
By convention, sunxi GPIOs are named PA1, PA2 instead of A1, A2. Change
the driver model GPIO driver for sunxi to use these names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
i2c_init_board() gets called before the driver-model (gpio) code is
initialized, so move the setup of the soft-i2c pins out of i2c_init_board()
and into board_init(), at which time the driver-model setup has been done.
Also add proper error checking and properly request the gpios as that is
mandatory with the driver-model.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The driver-model gpio functions may return another value then -1 as error,
make the sunxi display code properly handle this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The driver-model gpio functions may return another value then -1 as error,
make the sunxi usbc properly handle this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The driver-model gpio functions may return another value then -1 as error,
make the sunxi mmc code properly handle this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This fixes the following errors being printed during boot:
Error, wrong i2c adapter 0 max 0 possible
Error, wrong i2c adapter 0 max 0 possible
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add a defconfig for generic 7" tablets using the Ippo q8h v1.2 pcb,
with an A33 SoC (the pcb can take an A23 or an A33), and a 1024x600 LCD.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The Astar MID756 is a 7" tablet using the A33 SoC with a 800x480 LCD screen,
512M RAM, 8G ROM and integrated sdio wifi.
Also see: http://linux-sunxi.org/Softwinner_astar-rda
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Enable full support for the A33 SoC including display, otg-usb, etc.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the new second DRAM PLL found on the A33 SoC.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This is a preparation patch for adding A33 support, which will have a
mach name of sun8i-a33.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i
have a various things in common, like having separate ahb reset control
registers, the SID living inside the pmic, custom pmic busses, new style
watchdog, etc.
This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be
used to check for these features avoiding the need for an ever growing list
of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more
"new style" sunxi SoCs.
Note that this commit changes the behavior of the gmac and hdmi code for
sun8i and the upcoming sun9i devices. This does not matter as sun8i does
not have gmac nor hdmi, and sun9i has new hardware-blocks for these so
the old code will not work there.
Also this is intentional as if a sun8i / sun9i variant which does use the
old hwblocks shows up then the GEN_SUN6I code paths will be the right ones
to use.
For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
We do not use irqs in u-boot so remove the unused irq field, and all the
#ifdef-ery around the irq initialization.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
There is no reason not to and this make the #ifdef-ery easier to read.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This is already invoked a few cycles later in monitor mode by
_secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers
_secure_monitor via smc #0). Drop it here, it serves no purpose.
CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Tested-by: Ian Campbell <ijc@hellion.org.uk>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
