Commit graph

54961 commits

Author SHA1 Message Date
Simon Glass
9e92116bc8 rockchip: Add support for chromebook_bob
Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.

Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)

Not included:
- Keyboard
- Display
- Sound
- USB
- TPM

Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
08c85b57a5 rockchip: gru: Add extra device-tree settings
Add some U-Boot-specific settings. These should really go in the
*u-boot.dtsi file, but it seems that rk3399 does not use that yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
aa48c94ca8 rockchip: Implement spl_gpio in the GPIO driver
Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
3ec6f11c7d rockchip: Move pull-up/down enum into a common file
At present this enum is only available to rk3288. Move it so that other
rockchip SoCs can access it. It is needed for the SPL GPIO driver for
rk3999 in a later patch.

Also adjust the enum name to lower case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
8a0c6aa33f rockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set env
Some boards use different stdio environment variables from the default.
Provide a #define for this which can be set before including the header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
c35f8e5017 rockchip: Tidy up board include-file ordering
These board files have inconsistent #include ordering. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
5328af1774 rockchip: clk: Add mention of four new clocks
These clocks are needed to get MMC running. We don't actually support
setting them yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
cf5c8d1880 rockchip: Add settings for Samsung LPDDR3 4GB SDRAM 1866MHz
This memory is used on Bob. Add settings for this, taken from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
3523c07867 rockchip: Allow booting from SPI
The u-boot,spl-boot-device property only allows MMC at present. Add SPI as
well for boards that boot from SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
6cecc2b556 rockchip: Clarify docs on SPI writing
We use every second block when creating a SPI image, so update the text to
say this explicitly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
60853a9b5c rockchip: evb_rk3399: Tidy up the README
Add mention of a prerequisite needed to build the image. Also adjust the
English wording in a few places.

Ideally this should move to using binman to produce images, and avoid the
manual steps.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
0a09f2f117 rockchip: Adjust rk3399 device tree to be closer to linux
This file has changed upstream, with some additions and changes. Move the
U-Boot version towards this.

Some USB changes seem to be incompatible with how the bindings work on
rockchip in U-Boot. Testing is needed to make sure that USB still works
correct, and adjust the code (not device tree) if not.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
d244474f38 rockchip: Bring in device tree files for rk3399-gru
Bring in these files from Linux v4.20.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
0c14c36605 rockchip: Drop note about supporting other SoCs
Quite a wide range of Rockchip SoCs are supported in mainline U-Boot now,
so drop the comment about needing to add more.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
16217f965d rockchip: Add mention of other boards
At present some Rockchip SoCs and boards are not mentioned in the README.
So that people can see which SoCs are supported, expand the list to
include everything.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
5c01d1c0d0 gpio: Add a simple GPIO API for SPL
In space-constrained environments or before driver model is available, it
is sometimes necessary to set GPIO values. Add an SPL API for this, to
allow early board code to change GPIOs. The caller must provide the
register address, so that the drivers can be fairly generic.

This API can be implemented by GPIO drivers, behind a suitable guard,
like #ifdef CONFIG_SPL_BUILD.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
66f657d15b gpio: Use more command-specific enums values
At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command
values. These are pretty generic names. Add a 'C' suffix to avoid possible
conflicts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
6831616063 clk: Improve debug message in clk_set_default_rates()
It is helpful to print the clock number as well as the index, so that this
can be looked up in the binding file. Update the debug() statement to do
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:12 +01:00
Simon Glass
f60662de77 lib: Allow using display_buffer() in SPL
At present this function uses printf() format strings that are not
supported in SPL, so the output just consists of %llx strings on 64-bit.
machines. Fix this by adding a special case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
e5b29d870b ARM: dts: rk322x: Correct the uart2 default pin configuration
To match the iomux setting of uart2 at SPL, correct the uart2
default pin configuration, if not changed, the evb-rk3229 can't
output the log message.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
96f73e0d24 pinctrl: rockchip: Clean the unused rockchip pinctrl drivers
If we used the pinctrl-rockchip driver, these code is not needed,
so remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
2ec3d25f8f rockchip: defconfig: Clean the unused pinctrl config
If we used the pinctrl-rockchip driver, these config is not needed,
so remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
e7ae4cf27a pinctrl: rockchip: Add common rockchip pinctrl driver
Use this driver to fit all Rockchip SOCs and to support
the desired pinctrl configuration via DTS.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
2409e47b3f rk3288: chrome: defconfig: Enable FDT for new pinctrl driver
The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA
and enable SPL_OF_LIBFDT to make FDT be built in.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
08c817c399 ARM: rockchip: Remove the pinctrl request at rk3288-board-spl
If we use the new pinctrl driver, the pinctrl setup will be done
by device probe. Remove the pinctrl setup at rk3288-board-spl.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
bfb11abef2 ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188
It seems that pinctrl is not requested for rk3188 SPL, remove it so
that can save more space for SPL image size.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
c0b163e908 ARM: rockchip: rk3188: Remove the pinctrl setup and enable uart at SPL
When the boot ROM sets up MMC we don't need to do it again. Remove the
MMC setup code entirely, but we also need to enable uart for debug message.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
cb5950788c rockchip: rk3399-evb: defconfig: Enable FDT for new pinctrl driver
The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA
to make FDT be built in.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Marty E. Plummer
8e2e601c5f rockchip: add support for veyron-speedy (ASUS Chromebook C201)
This adds support for the ASUS C201, a RK3288-based clamshell
device. The device tree comes from linus's linux tree at
3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters
are for 4GB Samsung LPDDR3, decoded from coreboot's
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc

Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Mark Kettenis
09056c94a1 rockchip: dts: rk3399-firely: add 'same-as-spl'
Like on rk3399-puma we want to continue booting the fill U-Boot from
the same device as the SPL stage.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Simon Glass
0d968ceb1f rockchip: Drop call to rockchip_dnl_mode_check() for now
This function causes a 5-second delay and stops the display working on
minnie. This code should be in a driver and should only be enabled by
a device-tree property, so that it does not affect devices which do not
have this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Simon Glass
2d0c01b8f0 sound: rockchip: Add sound support for jerry
Jerry uses a max98090 audio codec and the internal SoC I2S peripheral.
Enable sound support and add the required device-tree pieces.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Simon Glass
bcea0e1e81 rockchip: Add a sound driver
Add a sound driver for rk3288 supporting chromebook_jerry. This uses the
I2S driver, and existing audio codec and the clock/pinmux support.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Simon Glass
2665f09115 rockchip: Add an I2S driver
Add a driver for I2S which allows audio data to be sent from the SoC to
the audio codec. The sample rate and other settings are hard-coded for now
as there is no suitable device-tree binding available.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Simon Glass
3dbfe5ae61 rockchip: rk3288: Add i2s pinctrl and clock support
Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Tom Rini
db4a29993d - ihs and imx driver fixes
- relax EDID validation checks for 0 hsync/vsync
   pulse width (support some quirky displays)
 -----BEGIN PGP SIGNATURE-----
 
 iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCXFLpkQ4cYWd1c3RAZGVu
 eC5kZQAKCRBM6ATMmsalXLiRAJ9F4WRPFtzn/S77OinRZl2e5isCJACaA/t8hmx2
 M81piE8xdryxVKIHFJc=
 =ocAC
 -----END PGP SIGNATURE-----

Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-video

- ihs and imx driver fixes
- relax EDID validation checks for 0 hsync/vsync
  pulse width (support some quirky displays)
2019-01-31 16:07:37 -05:00
Tom Rini
ab0ec15f77 - Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
 - Add DT fixups
 - Enable Video and USB Console for libretech-cc board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJcUrPBAAoJEHfc29rIyEnRtJ8QAI2YFvozhCwdNhZg1Z1jRS2j
 5gkEW4HjwD7p4BXWYNmymDybWUtax21vXy/Q7zJHnOYuYeVwH7Tw2H0kAwVnMjja
 RXewtvaeb4sd2OWm7v9PoiUrg2+xwC9YqNCPMkEAE7EMo95Lpx11NwuvHVJqbsTG
 Qo46P5KBwOsnzg3/WAGth8/IBrFvsdJAoa7WtRRgF/THYhu1PtkzX8Cu1DHgQQMt
 UiDaoTaarCMiVP0g6dVnPJB/IrW9D9lEU9sx2C0J/yU2ikLdbX5TPPjMlqVznn8D
 hO+kqfkiGAlXiPwDEc4UskqRHTvivaL8wLGdtYyXkp0eRgxipAyDdO9oGUjkN8+e
 f1B/hQMipMnSpehYqB13XJYtjGqR8JdKNaN/BptH26YYS44iuHiTJs9XsXqyKTRU
 X9rnDSrWiaREL6ChrP0KMXzbP47KUBHA5OPsTv0YHLkcuoRMovqu2OgiK13GNQqf
 Q2RaQqBiz+sfNIsx7OKaFIr2TMpSUbe+WxEne0s+C1XrD0/V86iN32jnmioxLdEo
 qFMkKZWXHv7pfwVaMK91wAZFasnWjg5VqkEXFS4ti+SIxfkpgsg+nLHMQpw48M4e
 KfmBW5tsIiN3gfXI+ZfCEWdU2dkd9u5B+QKzLC8dimxEziZYkGk0CXN0N4lBp4on
 AItt+R8BbrBsvcp3r1WY
 =MWXC
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20190131' of git://git.denx.de/u-boot-amlogic

- Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
- Add DT fixups
- Enable Video and USB Console for libretech-cc board
2019-01-31 07:19:52 -05:00
Maxime Jourdan
fce1069bfb arm: libretech-cc: enable video by default
libretech-cc being the main device tested with CONFIG_VIDEO_MESON, let's
enable it by default.

Also enable:
 - CONFIG_SYS_WHITE_ON_BLACK for prettiness
 - CONFIG_VIDEO_DT_SIMPLEFB for framebuffer sharing with kernel

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Maxime Jourdan
01790b016e arm: meson64: enable console mux and console env by default
With the recent addition of the meson VPU driver, enable the following
config entries by default for meson-64 targets: CONFIG_CONSOLE_MUX,
CONFIG_SYS_CONSOLE_IS_IN_ENV.

This allows outputting the console via video if CONFIG_VIDEO_MESON is
selected.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Neil Armstrong
f0d090442b configs: meson64: use vidconsole and usbkbd if enabled
Allows displaying the console via video and using a USB keyboard.

Also enables CONFIG_SPLASH_SCREEN if using video.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Maxime Jourdan
0cc53faf59 arm: meson: board-gx: Setup VPU in fdt
If VIDEO_MESON is enabled, we need to setup the fdt for the framebuffer.

Call meson_vpu_rsv_fb() which reserves the framebuffer memory region for
EFI, and sets up simple-framebuffer nodes if simplefb support is
enabled.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Maxime Jourdan
2ebade0d57 arm64: dts: meson-gx: add hhi reg entry to hdmi_tx
There's no reliable way to reuse the hhi entry from the vpu as is done
in the linux kernel, so we duplicate it here.

We will be able to sync against kernel DTS in the future when the VPU
gets based on the clock framework rather than the HHI reg.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-01-31 09:35:01 +01:00
Neil Armstrong
bce59f918e arm64: dts: meson-gx: Add hdmi_5v regulator as hdmi tx supply
The hdmi_5v regulator must be enabled to provide power to the physical HDMI
PHY and enables the HDMI 5V presence loopback for the monitor.

Fixes: b409f625a6d5 ("ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[backport of linux commit e1f2163deac059ad39f07aba9e314ebe605d5a7a]
2019-01-31 09:35:01 +01:00
Maxime Jourdan
671b1db8f8 arm64: dts: meson-gx: vpu should be probed before relocation
Flag the appropriate nodes with u-boot,dm-pre-reloc

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-01-31 09:35:01 +01:00
Neil Armstrong
3bed422094 video: Add Meson Video Processing Unit Driver
This adds video output support for Amlogic GXBB/GXL/GXM chips.
The supported ports are CVBS and HDMI (based on DW_HDMI).

When using HDMI, only DMT modes are supported.

There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB)

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
[narmstrong: fixed defines alignment in meson_canvas.c]
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Jorge Ramirez-Ortiz
56dd8d87e5 video: dw_hdmi: add support for color conversion
Some IPs like the meson VPU can only feed a particular pixel format to
dw_hdmi. As of now, the driver is hardcoded to use RGB888 as input.

This commit enables different pixel format inputs, with the appropriate
CSC configuration.

Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Jorge Ramirez-Ortiz
fd99841808 video: dw_hdmi: support SoC specific read/write ops
Some IPs like the meson VPU have a specific way to write to dw_hdmi
registers. Make it configurable.

Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
[added commit description]
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Maxime Jourdan
335d287327 power: domain: meson-gx-pwrc-vpu: add missing depends
MESON_GX_VPU_POWER_DOMAIN should depend on POWER_DOMAIN.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31 09:35:01 +01:00
Neil Armstrong
535d74a8ae MAINTAINERS: Add Amlogic entry
Add entry for Amlogic SoC maintained files and the freshly
created mailing-list.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-01-30 21:22:53 -05:00
Heinrich Schuchardt
1249fa8fc2 Makefile: remove generated font files
If `make mrproper` does not delete the generated drivers/video/fonts/*.S
files a following `make tests` fails.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-30 21:22:53 -05:00