Add devicetree support for Khadas Edge-Captain.
Khadas Captain is the carrier board for Khadas Edge.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Tested-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge-V.
Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge.
Khadas Edge is an expandable Rockchip RK3399 board with goldfinger.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP
- USB 3.0, 2.0
- USB Type C power and data
- 16MB SPI Flash
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Tested-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Handle per-board init in board_early_init_f() and use the
common board_init() for per-platform board init later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
make_fit_atf.py no longer requires pyelftools, and nothing else in the
rockchip build requires it either, so remove references to installing it
from the documentation.
Signed-off-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
The new common rockchip pinctrl driver does not support explicit
requests for a particular pinctrl function. As a result, the
board_init() function bails out early before enabling the boot-on
regulators. Fix this by simply removing the request for pwm0, pwm2
and pwm3. The generic DM code already does the necessary
configuration if necessary.
Reported-by: Levin Du <djw@t-chip.com.cn>
Signed-of-by: Mark Kettenis <kettenis@openbsd.org>
Support common spl_board_init by moving code from puma
board file into, common rk3399-board-spl.c.
Part of the code has sysreset-gpio, regulators_enable_boot_on
but right now only puma board is using this with relevant
config options rest remains common for all targets.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
preloader_console_init is used for printing SPL boot banner that
usually called from spl_board_init.
The current spl_board_init in evb and rock960 is enabling explicit
pinctrl, debug uart prior to calling preloader_console_init which
eventually not required since board_init_f is already enabled
debug uart.
So, drop those explicit enablement calls from spl_board_init of
evb, rock960.
Tested this by enabling CONFIG_SPL_BOARD_INIT and adding
u-boot,dm-pre-reloc property for uart node.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add initial support for Rock PI 4 board.
Specification
- Rockchip RK3399
- LPDDR4
- eMMC
- SD card slot
- RTL8211E 1Gbps
- HDMI In/Out, DP, MIPI DSI/CSI
- PCIe M.2
- USB 2.0, USB-3.0
- USB C Type
Commit details of rk3399-rock-pi-4.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: add ROCK Pi 4 DTS support"
(sha1: 1b5715c602fda7b812af0e190eddcce2812e5417)
Signed-off-by: Akash Gajjar <akash@openedev.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add initial support for Rockpro64 board.
Specification
- Rockchip RK3399
- 2/4GB Dual-Channel LPDDR3
- SD card slot
- eMMC socket
- 128Mb SPI Flash
- Gigabit ethernet
- PCIe 4X slot
- WiFI/BT module socket
- HDMI In/Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- DC 12V/2A
Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: rockpro64 dts add usb regulator"
(sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb)
'Akash' has sent an initial patch before, so I keep him as board
maintainer and I'm co-maintainer based on our conversation.
Signed-off-by: Akash Gajjar <akash@openedev.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add initial support for Nanopc T4 board.
Specification
- Rockchip RK3399
- Dual-Channel 4GB LPDDR3-1866
- SD card slot
- 16GB eMMC
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- DC 12V/2A
Commit details of rk3399-nanopc-t4.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: Add NanoPC-T4 IR receiver"
(sha1: 95658e21b1707ad7844f873db2fdaa295109a5a3)
Tested-by: Daniel Gröber <dxld@darkboxed.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add mention of a prerequisite needed to build the image. Also adjust the
English wording in a few places.
Ideally this should move to using binman to produce images, and avoid the
manual steps.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
%s/rkflashtool/rkdeveloptool/
We are using rkdeveloptool not rkflashtool.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Since we support ATF in SPL and add script for it, let's make the
document up to date.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
As part of my usual round of build testing, output about missing
MAINTAINERS information was not logged, and thus often overlooked.
Correct that mistake by ensuring that I log the output of
genboardscfg.py every time. As part of that, address a number of
missing MAINTAINERS entires. In the case of a missing file, I have put
the original submitter down. In the rest of the cases I have added the
config (and sometimes relevant header file) to the existing set of file
globs.
Signed-off-by: Tom Rini <trini@konsulko.com>
The later-stage spl_board_init (as opposed to board_init_f) should set
up board-specific details: these differ between the EVB-RK3399 and the
RK3399-Q7 (Puma).
This moves spl_board_init back into the individual boards and removes
the unneeded functionality from Puma.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The bank0 ram size should be the DRAM size minus reserved size,
the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Replace the sdram_init() in board init and rockchip_sdram_size() in
sdram driver for all the Rockchip SoCs which enable CONFIG_RAM.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Make dram_init() in rk3036-board.c conditional on CONFIG_RAM:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enable pwm0 for display of rk3399 evb board. The PWM do not have decicated
interrupt number in dts and can not get periph_id by pinctrl framework. So
init them here.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since our sdram driver is ready, we can use the actual size
instead of hard code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Use regulators_enable_boot_on() instead of init regulators one by one,
the interface can init all the regulators with regulator-boot-on property.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The size dram node need to be deduced by the same amount of reserved space.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add vdd_center pwm regulator get_device to
enable this regulator.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
rk3399 using one gpio control signal for two usb 2.0 host port,
it's better to enable the power in board file instead of in usb driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
There is no interrupt line for each PWM which used by pinctrl to get the
periph_id, so it's not able to enable the default pinctrl setting by pinctrl
framework, let's enable it at board_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch add maintainer information for rk3399 evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
RK3399 needs reserve 0x200000 at the beginning of DRAM, for ATF bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a README to guide people flash the ATF and U-Boot
with Rockchip tools to bring up to board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
RK3399 is a SoC from Rockchip with dual-core Cortex-A72
and quad-core Cortex-A53 CPU. It supports two USB3.0
type-C ports and two USB2.0 EHCI ports. Other interfaces
are very much like RK3288, the DRAM are 32bit width address
and support address from 0 to 4GB-128MB range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
