Commit graph

53082 commits

Author SHA1 Message Date
Martin Fuzzey
9b8b918884 net: dm: fec: Fix time unit error in phy-reset-duration
The DT binding says that phy-reset-duration is in ms, but the driver
currently uses udelay().

Switch to mdelay() to fix this.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24 14:45:37 -05:00
Jeremy Gebben
30a2c8cca8 net: phy: aquantia: autodetect if firmware needs to be loaded
If the phy reports a valid firmware version and doesn't indicate
a fault, skip loading the firmware.  This allows the same image
to be used on boards that have firmware storage and those that do not.

Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24 14:45:37 -05:00
Jeremy Gebben
4506423ad2 net: phy: aquantia: add firmware loading support
Aquantia phys have firmware that can be loaded automatically
from storage directly attached to the phy or via MDIO commands.
Add support for loading firmware from either a file or a
raw location on an MMC device.

Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24 14:45:37 -05:00
Jeremy Gebben
1c6501088e configs: migrate CONFIG_PHY_AQUANTIA to Kconfig
The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G.

Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24 14:45:36 -05:00
Pankaj Bansal
9215bb1f37 miiphy: Add function to retrieve MDIO bus list head
In upcoming freescale board LX2160AQDS, the MDIO bus is muxed.
i.e. same MDIO bus can be routed to eight different slots depending
on mux register settings.

To support this mdio mux behavior, we add each MDIO bus mux as a
separate MDIO bus.

Now, various phy devices can be attached to each of these slots(mux).
The information about these devices is passed to OS via device tree.

To do the fdt fixups related to MDIO bus, its necessary that MDIO bus
list is accessed.Therefore, add a function to retrieve the list head.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24 14:45:36 -05:00
Hector Palacios
fb265a74cf cmd: mii: don't check address for 'device' subcommand
All mii operations require a valid PHY address except the 'device'
command, which expects the PHY name rather than the address.

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24 14:45:36 -05:00
Tom Rini
1ed3c0954b Merge branch 'master' of git://git.denx.de/u-boot-samsung 2018-10-23 21:13:32 -04:00
Tom Rini
818408e203 travis: Rework Freescale ARM jobs a bit
- Split the AArch64 LS10xx and LS20xx builds into their own jobs, and
  then exclude only ls1/ls2 from the catch-all.  This moves the S32V234
  job (and future i.MX8*) to the catch-all.
- Split spear out from arm926ejs and exclude freescale, not mx from that
  job.  The older Freescale i.MX boards are caught by the catch-all job
  for Freescale but now we build the non-Freescale older i.MX platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-23 11:58:44 -04:00
Dirk Meul
9cd97c5b04 ARM: Samsung: Add Exynos5422-based Odroid HC2 support
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1.

The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used
for the Odroid HC2.

Resend because MUA changed whitespace.

Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-10-23 20:00:52 +09:00
Simon Glass
3ae192c2a4 binman: Add a test for Intel reference code
Unfortunately the test was not included in the original implementation.
Add one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-22 13:57:12 -04:00
Tom Rini
c95c666d01 Merge git://git.denx.de/u-boot-x86 2018-10-22 13:56:10 -04:00
Sam Protsenko
88d60db011 arm: ti: boot: Remove environment partition
Remove "environment" partition and do not read it when booting Android
from eMMC. We don't use this partition anymore, so this is just an
unintentional leftover.

Earlier we were reading dtb file from "environment" partition to feed it
further to kernel. Now we are using dtb from FIT image ("boot" partition
contains boot_fit.img image), which can be seen from this command:

    bootm ${loadaddr}#${fdtfile}

where "#" character means we have FIT image in ${loadaddr} RAM address.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
2018-10-22 09:18:49 -04:00
Cédric Le Goater
e1a8dfde5a watchdog: aspeed: restore default value of reset_mask
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 09:18:49 -04:00
Adam Ford
290097fe27 ARM: omap3_logic: Add NOR Flash Support for SOM-LV
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR
flash part connected to CS2 in addition to the NAND part on CS0.
This patch setups the GPMC timings for the MT28 NOR Flash and
enables the CFI-Flash driver now that the CFI stuff is in Kconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22 09:18:49 -04:00
Meul, Dirk
e18333e501 arm: udoo: Convert to distro config
Instead of keeping a custom environment, use a more generic approach
by switching to distro config.

Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2018-10-22 09:18:49 -04:00
Heinrich Schuchardt
d796735c33 test: overlay: add missing include
Compiling the overlay unit test fails with odroid-c2_defconfig showing
errors like:

    test/overlay/cmd_ut_overlay.c:29:8:
    error: unknown type name ‘fdt32_t’

Add the missing include.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 09:18:49 -04:00
Bin Meng
ed5df0852f nand: atmel: Initialize pmecc smu with correct size
Currently in pmecc_get_sigma(), the code tries to clear the memory
pointed by smu with wrong size 'sizeof(int16_t) * ARRAY_SIZE(smu)'.
Since smu is actually a pointer, not an array, so ARRAY_SIZE(smu)
does not generate correct size to be cleared.

In fact, GCC 8.1.0 reports a warning against it:

error: division 'sizeof (int16_t * {aka short int *}) / sizeof (int16_t
{aka short int})' does not compute the number of array elements
[-Werror=sizeof-pointer-div]

Fix it by using the correct size.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
7702713ee8 configs: sama5d2_ptc_ek: add default bootargs for MMC defconfig
Add default bootargs for the MMC defconfig to use SD-Card as rootfs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
3fbf61a770 configs: sama5d2_ptc_ek: add default bootargs for NAND defconfig
Add the default kernel bootargs according to our NAND flash demo layout:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2PtcEKMainPage#NAND_Flash_demo_Memory_map

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
76892d0115 configs: sama5d2_xplained: enable w1 and overlay for emmc defconfig
Enable onewire support and commands, fdt overlay for the emmc defconfig.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
ac5c1f0f3e configs: sama5d27_som1_ek: enable w1 and overlay for mmc1 defconfig
Enable onewire support and commands, fdt overlay for the mmc1 defconfig.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
367386861b configs: at91: sama5: enable CMD_IMI
Enable iminfo command with CONFIG_CMD_IMI

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
96ab34b484 configs: at91: sam9x5: added FIT and iminfo support
Enabled FIT image support and iminfo command for FIT information.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Eugen Hristev
61b4dbb0d0 board: at91sam9x5: add environment var for cpu type
When booting and CPU is detected from cpuid, we also need an environment
variable that will be used in boot commands to load the proper devicetree.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22 09:18:49 -04:00
Adam Ford
6482095de6 ARM: omap3logic: Fix MMC name
In my haste to migrate SPL to DM, I copied the wrong name.
While it really doesn't matter, I'd prefer the name to match
the board, so am335x_mmc0 is now called omap3_logic_mmc0

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22 09:18:49 -04:00
Adam Ford
c3aa851322 ARM: omap3logic: Specify DM serial driver as omap_serial
With the new omap_serial driver, this patch uses this instead
from the former ns16550_serial driver.  Even though the
omap_serial driver is essentially the same.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22 09:18:49 -04:00
Adam Ford
f4db3b68c1 ARM: omap3logic: Encapsulate the MUSB functions in check for DM
With the DM_USB working for USB host features, encapsulate the
USB gadget initialization in a precomiler check.  If DM is enabled,
we don't need to manually initialize the MUSB driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22 09:18:49 -04:00
Adam Ford
169eb19135 ARM: omap3_logic.c: Optimize DDR timings based on OMAP35 or 36/37
The default timings are assumming an OMAP36 / AM37 / DM37, but
the OMAP35 controller is a bit slower, so DDR may operate out of
spec when under stress.  This patch checks the processor type and
sets the DDR timings according to processor type.

Fixes: 5ad4212ce0 ("ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV
and OMAP35 Torpedo")

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22 09:18:49 -04:00
Adam Ford
017d9819e4 ARM: da850evm_direct_nor: Remove DM_I2C_COMPAT
The da850evm does not need this enabled, so this removes a
notice that appears during compile time that says
"Please remove"

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22 09:18:49 -04:00
Bin Meng
3fdfca7a78 travis: Add qemu-x86_64 target for test.py testing
Add qemu-x86_64 to the list of targets we use for test.py runs.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:54:48 +08:00
Bin Meng
68b8912811 travis: Update to use QEMU 3.0.0 for testing
This updates travis-ci to use QEMU 3.0.0 for testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Bin Meng
66a3a9cfd4 travis: Generate grub_x64.efi for qemu-x86_64
grub_x86.efi is for 32-bit QEMU. Generate the 64-bit one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Bin Meng
a39f0554f4 x86: quark: Specify X86_TSC_TIMER_EARLY_FREQ
Specify X86_TSC_TIMER_EARLY_FREQ for Quark SoC so that TSC as
the early timer can be supported.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Bin Meng
6ce383640c x86: tsc: Introduce config option for early timer frequency
So far the TSC timer driver supports trying hardware calibration first
and using device tree as last resort for its running frequency as the
normal timer.

However when it is used as the early timer, it only supports hardware
calibration and if it fails, the driver just panics. This introduces
a new config option to specify the early timer frequency in MHz and
it should be equal to the value described in the device tree.

Without this patch, the travis-ci testing on QEMU x86_64 target fails
each time after it finishes the 'bootefi selftest' as the test.py see
an error was emitted on the console like this:

  TSC frequency is ZERO
  resetting ...
  ### ERROR ### Please RESET the board ###

It's strange that this error is consistently seen on the travis-ci
machine, but only occasionally seen on my local machine (maybe 1 out
of 10). Since QEMU x86_64 target enables BOOTSTAGE support which uses
early timer, with this fix it should work without any failure.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Bin Meng
49d5ff439c x86: Fix the mystery of printch() during 64-bit boot
At present in arch_setup_gd() it calls printch(' ') at the end which
has been a mystery for a long time as without such call the 64-bit
U-Boot just does not boot at all.

In fact this is due to the bug that board_init_f() was called with
boot_flags not being set. Hence whatever value being there in the
rdi register becomes the boot_flags if without such magic call.
With a printch(' ') call the rdi register is initialized as 0x20
and this value seems to be sane enough for the whole boot process.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-22 17:51:45 +08:00
Heinrich Schuchardt
2c78a79ec7 x86: put global data pointer into the .data section
On x86_64 the field global_data_ptr is assigned before relocation. As
sections for uninitialized global data (.bss) overlap with the relocation
sections (.rela) this destroys the relocation table and leads to spurious
errors.

Initialization forces the global_data_ptr into a section for initialized
global data (.data) which cannot overlap any .rela section.

Fixes: a160092a61 ("x86: Support global_data on x86_64")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Heinrich Schuchardt
80df194f01 x86: detect unsupported relocation types
Currently we support only relocations of type ELF64_R_TYPE or ELF32_R_TYPE.
We should be warned if other relocation types appear in the relocation
sections.

This type of message has helped to identify code overwriting a relocation
section before relocation and incorrect parsing of relocation tables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Heinrich Schuchardt
194924d881 x86: qemu: enable CONFIG_SPL_DM_RTC
Since commit 380d4f787a ("rtc: Allow use of RTC in SPL and TPL")
qemu-x86_64_defconfig does not boot anymore.

Fixes: 380d4f787a ("rtc: Allow use of RTC in SPL and TPL")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Bin Meng
0e028bf970 x86: doc: Remove stale sections of 64-bit support
There are some sections in current doc saying 64-bit is unsupported.
This apparently is out of date. Remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-22 17:51:45 +08:00
Bin Meng
6feb2ff502 x86: doc: Mention qemu-x86_64 support
Currently only 32-bit U-Boot for QEMU x86 is documented. Mention
the 64-bit support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Bin Meng
dd4611dea4 x86: Ensure no instruction sets of MMX/SSE are generated in 64-bit build
With the '-march=core2' fix, it seems that we have some luck that
the 64-bit U-Boot boots again. However if we examine the disassembly
codes there are still SSE instructions elsewhere which means passing
cpu type to GCC is not enough to prevent it from generating these
instructions. A simple test case is doing a 'bootefi selftest' from
the U-Boot shell and it leads to a reset too.

The 'bootefi selftest' reset is even seen with the image created by
the relative older GCC 5.4.0, the one shipped by Ubuntu 16.04.

The reset actually originates from undefined instruction exception
caused by these SSE instructions. To keep U-Boot as a bootloader as
simple as possible, we don't want to handle such advanced SIMD stuff.
To make sure no MMX/SSE instruction sets are generated, tell GCC not
to do this. Note AVX is out of the question as CORE2 is old enough
to support AVX yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Bin Meng
a139cc1865 x86: Specify -march=core2 to build 64-bit U-Boot proper
With newer kernel.org GCC (7.3.0 or 8.1.0), the u-boot.rom image
built for qemu-x86_64 target does not boot. It keeps resetting
soon after the 32-bit SPL jumps to 64-bit proper. Debugging shows
that the reset happens inside env_callback_init().

000000000113dd85 <env_callback_init>:
 113dd85:       41 54                   push   %r12
 113dd87:       55                      push   %rbp
 113dd88:       31 c0                   xor    %eax,%eax
 113dd8a:       53                      push   %rbx
 113dd8b:       0f 57 c0                xorps  %xmm0,%xmm0

Executing "xorps %xmm0,%xmm0" causes CPU to immediately reset.
However older GCC like 5.4.0 (the one shipped by Ubuntu 16.04)
does not generate such instructions that utilizes SSE for this
function - env_callback_init() and U-Boot boots without any issue.
Explicitly specifying -march=core2 for newer GCC allows U-Boot
proper to boot again. Examine assembly codes of env_callback_init
and there is no SSE instruction in that function hence U-Boot
continues to boot.

core2 seems to be the oldest arch in GCC that supports 64-bit.
Like 32-bit U-Boot build we use -march=i386 which is the most
conservative cpu type so that the image can run on any x86
processor, let's do the same for the 64-bit U-Boot build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22 17:51:45 +08:00
Hannes Schmelzer
c74e3295ae x86/bootm: fix error handling in boot_prep_linux(...)
Once we get a zero pointer from load_zimage(...) we must bunch out
instead of continue boot.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Simon Glass
97d20f69f5 Enable CONFIG_TIMER_EARLY with bootstage
In initr_bootstage() we call bootstage_mark_name() which ends up calling
timer_get_us(). This call happens before initr_dm(), which inits driver
model.

On x86 we set gd->timer to NULL in the transition from board_init_f()
to board_init_r(). See board_init_f_r() for this assignment. So U-Boot
knows there is no timer available in the period immediately after
relocation.

On x86 the timer_get_us() call is implemented as calls to get_ticks() and
get_tbclk(). Both of these call dm_timer_init() to set up the timer, if
gd->timer is NULL and the early timer is not available.

However dm_timer_init() cannot succeed before initr_dm() is called.

So it seems that on x86 if we want to use CONFIG_BOOTSTAGE we must enable
CONFIG_TIMER_EARLY. Update the Kconfig to handle this.

Note: On most architectures we can rely on the pre-relocation memory still
being available, so that gd->timer pointers to a valid timer device and
everything works correctly. Admittedly this is not strictly correct since
the timer device is set up by pre-relocation U-Boot, but normally this is
fine. On x86 the 'CAR' (cache-as-RAM) memory used by pre-relocation U-Boot
disappears in board_init_f_r() and any attempt to access it will hang.
This is the reason why we must mark the timer as invalid when we get to
board_init_f_r().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Simon Glass
27fb0cf1f0 binman: Add support for Intel reference code
Some platforms use this instead of FSP to set up the platform, including
memory. Add support for this in binman. This is needed for
chromebook_samus, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Simon Glass
d7e84521fe chromebook_samus: Increase pre-relocation memory
With bootstage now allocating pre-relocation memory the current amount
available is insufficient. Increase it a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-22 17:51:45 +08:00
Marek Vasut
25db340309 test: Add test for PCI device without compat string and with DT node
Add test which checks if a PCI device described in DT with an
entry and reg = <...> property, but without compatible string
results in a valid U-Boot PCI udevice with the udevice.node
populated with reference to this DT node. Also check if the
other PCI device without a DT node does not contain any bogus
udevice.node.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-20 15:23:38 -04:00
Marek Vasut
b59349a0c0 test: Add PCI device entry without compat string and with DT node
Add PCI entry without compatible string and with a DT node only with
reg = <...> property into the DT. This is needed for the tests to
verify whether such a setup creates an U-Boot PCI device with the
DT node associated with it in udevice.node.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-20 15:23:38 -04:00
Marek Vasut
92ed986521 pci: Update documentation to make 'compatible' string optional
Reword the documentation to make it clear the compatible string is now
optional, yet still matching on it takes precedence over PCI IDs and
PCI classes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-20 15:23:38 -04:00
Marek Vasut
02e4d38d87 pci: Support parsing PCI controller DT subnodes
The PCI controller can have DT subnodes describing extra properties
of particular PCI devices, ie. a PHY attached to an EHCI controller
on a PCI bus. This patch parses those DT subnodes and assigns a node
to the PCI device instance, so that the driver can extract details
from that node and ie. configure the PHY using the PHY subsystem.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-20 15:23:38 -04:00