With clang-15 we now will get warnings such as:
warning: a function declaration without a prototype is deprecated in all
versions of C [-Wstrict-prototypes]
And it is easy enough to address this warning here, as we aren't
concerned with re-syncing with an upstream.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With clang-15 we now will get warnings such as:
warning: a function declaration without a prototype is deprecated in all
versions of C [-Wstrict-prototypes]
And it is easy enough to address this warning here, as we aren't
concerned with re-syncing with an upstream.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have a number of places in the code which use the following syntax:
void func(a, b, c)
int a; /* Does a */
something_t *b; /* Pointer to b */
int c; /* Does c */
{
...
}
Which while not what we document as our coding style, this is also code
which we have imported from other projects, and would like to re-sync
with in the future. While the biggest example of this is the zlib code,
there are other places as well. For now, we will silence this warning.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Assorted TI platform fixes, correct location of NXP boot format git
repository, don't try and mount partitions that are too small to be
ext4 as ext4, handle .bin files in .gitattributes, flush out panic
messages for sure, and correct console location on Arm total_compute.
Setting RX flow error handling will stall the channel until descriptors
are available to move RX data. Setting this bit causes issues when
tearing down ethernet DMA channel at the end of TFTP transfer as
unrelated network packets can cause teardown to stall indefinitely waiting
for driver to queue add more desc leading to channel hang with error
logs:
udma_stop_dev2mem TIMEOUT !
udma_stop_dev2mem: peer not stopped TIMEOUT !
udma_stop_dev2mem TIMEOUT !
Fix this by clearing rx_error_handling similar to how its done for UDMA
as part of udma_alloc_rchan_sci_req()
This fixes occasional TFTP Failures seen when downloading multiple files
one after the other on AM64/AM62 SoCs.
Fixes: 9a92851c33 ("dma: ti: k3-udma: Add BCDMA and PKTDMA support")
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
No need to mount a too small partition to handle a EXT4 file system.
This patch add a test on partition size before to read the
SUPERBLOCK_SIZE buffer and avoid error latter in fs_devread() function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Binary files, which are committed to a private fork of this repository,
will be subject to line feed substitution unless marked as binary.
Mark .bin files as binary.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Setting sf default mode to 0x3 breaks sf update when we do SF read
through u-boot console.
This issue arises when we do a splash image through OSPI flash media,
to fix this set the default mode to 0x0.
Fixes: 04150400c9 ("configs: enable OSPI related configs in AM62x")
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
This means we will need to move the stack & heap from OCSRAM to HSM RAM
and reduce the size of BSS and the SPL to allow it to fit properly.
To protect us from overflowing our ~256k of HSM SRAM, add limits and
check during the wakeup SPL build.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
So, move scratch board area to HSM RAM.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
To make sure the panic and the reset messages will go out, console flush() should be used.
Sleep periods do not work in early u-boot phase when timer driver is not initialized yet.
Reference: https://lists.denx.de/pipermail/u-boot/2023-March/512233.html
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-yocto-sdk/boot-format:
"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."
Point to the NXP boot format github repo instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
To conserve bandwidth and potentially avoid rate limits, allow a local
mirror of Docker Hub to be specified globally. The default value is
unchanged.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The default behavior of Gitlab runners is to only run jobs which match
the configured tag, although there is an option to run untagged jobs
[1].
To support running the CI in more complex environments where different
types of runners may be present that support different tags, allow the
DEFAULT_TAG for all jobs in the pipeline to be set globally using an
environment variable. An empty default value is provided to retain
support for untagged runners.
[1] https://docs.gitlab.com/ee/ci/runners/configure_runners.html#use-tags-to-control-which-jobs-a-runner-can-run
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Copy build artifacts for all test.py tests, so they show up in
artifacts storage for later inspection. The test.py tests output
in CI is basically useless, but it is far more useful in the html
output for analysis and debugging.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The default pytest cache directory is in a read-only directory in Azure,
which results in a warning on the build page. Use the pytest command
line option to set the cache dir to somewhere writable.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable use of the python-azurepipelines package which provides automatic
formatting and uploading of the pytest output.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given efforts to add an m68k target to CI, build qemu for it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
- Fix for rockchip timer driver;
- Fix for rk3568 and rk3588 boot device and clock driver;
- Fix for rk3568 reset handler;
- Fix for rk3568 sdhci DLL at 52MHz;
To quote the author:
The first patch simplies do_read somewhat by making use of an existing
helper instead of parsing the dev_part string manually. As a bonus
(and my actual motivation), it now understands dev#partname syntax -
hard-coded partition numbers are so last decade.
I also need the symmetrical operation, being able to write to a named
raw partition, and fortunately it doesn't require that many lines of
code to implement that.
There's a very minor change in the error reporting due to using
cmdtp->name to generate the new messages, but I don't think "Error
reading blocks" offers much that "read error" doesn't.
New in v2: the last three patches add documentation, ensure CMD_WRITE
is set for sandbox and adds some basic test cases for the various ways
of accessing the partitions (by number, name, or as raw offset within
the whole disk).
v3: Add Simon's R-b to patches 2, 4, 5, fixup whitespace in patch 5.
I don't want to duplicate the documentation, but I can see the value
in 'write' having its own entry in the TOC, so I added a stub
write.rst that just refers to the read.rst, which then explicitly
documents both.
The reset identifier must be processed via MOD_CLK_PACK() before it is
used to look up register and bit within reset_regs or reset_clear_regs
arrays, otherwise completely bogus register and bit is picked from the
arrays, one which may even be out of range.
Fixes: 326e05c5e2 ("clk: renesas: Add and enable CPG reset driver")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Rockchip timer driver has been renamed after the fall back compatible.
There's no need to replace the timer compatible in rk3188-radxarock-u-boot.dtsi
anymore, so remove.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the binding for the Rockchip timer the compatible string
consists of a SoC orientated string and a fall back string
"rockchip,rk3288-timer", so remove all unneeded ones and
fix driver name.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For Rockchip platform, DLL bypass bit and start bit need to be set if
DLL is not locked.
With this change applied eMMC in my NanoPi R5S can run at 52 MHz.
Based on linux commit b75a52b0dda3 ("mmc: sdhci-of-dwcmshc: Update DLL
and pre-change delay for rockchip platform")
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Device tree contains assigned-clock-rates property for these,
but default value will work just fine
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
This removes dangling comments that no longer serve a purpose and has
been left after conversion of defines to Kconfig option.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The get_mmc_clk ops is expected to set a clock rate and return the
configured rate as an unsigned value. However, if clk_set_rate fails,
e.g. using a fixed rate clock, a negative error value is returned.
The mmc core will treat this as a valid unsigned rate and tries to
configure a divider based on this bogus clock rate.
Use 0 as the return value when setting clock rate fails, the mmc core
will configure to use bypass mode instead of using a bogus divider.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Building U-Boot for Tinker Board with USB or NET Kconfig option disabled
result in the following build error:
In file included from include/configs/rk3288_common.h:29,
from include/configs/tinker_rk3288.h:14,
from include/config.h:3,
from include/common.h:16,
from env/common.c:10:
include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:302:9: note: in definition of macro 'BOOTENV_DEV_NAME_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/configs/tinker_rk3288.h:21:9: note: in expansion of macro 'BOOTENV_DEV_NAME'
21 | func(USB, usb, 0) \
| ^~~~
include/config_distro_bootcmd.h:454:25: note: in expansion of macro 'BOOT_TARGET_DEVICES'
454 | "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
| ^~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:474:9: note: in expansion of macro 'BOOTENV_BOOT_TARGETS'
474 | BOOTENV_BOOT_TARGETS \
| ^~~~~~~~~~~~~~~~~~~~
include/configs/rk3288_common.h:40:9: note: in expansion of macro 'BOOTENV'
40 | BOOTENV
| ^~~~~~~
include/env_default.h:122:9: note: in expansion of macro 'CFG_EXTRA_ENV_SETTINGS'
122 | CFG_EXTRA_ENV_SETTINGS
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from env/common.c:32:
include/env_default.h:29:36: note: to match this '{'
29 | const char default_environment[] = {
| ^
make[2]: *** [scripts/Makefile.build:256: env/common.o] Error 1
The BOOT_TARGET_DEVICES defined in rockchip-common.h include the same
devices as defined in tinker_rk3288.h, remove the board specific one to
fix building with USB or NET option disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable SPL on RK3588 to detect which device it was booted from.
Fixes use of same-as-spl in u-boot,spl-boot-order prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rate and error value is not returned for aux16m clocks, fix this.
Fixes: 7a474df740 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Running U-Boot from eMMC on a ROCK 3 Model A result in the following:
U-Boot SPL 2023.04-rc3 (Mar 11 2023 - 17:24:48 +0000)
Trying to boot from MMC1
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
The sdhci node is missing in board device tree, sync device tree from
linux v6.3-rc1 to fix booting from eMMC. Also disable sdmmc2 and uart1
nodes related to using a WiFi and BT module in the M2 slot.
Fixes: b44c54f600 ("arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The boot source node path for emmc is using the old sdhci name.
Replace with correct mmc name and also add same-as-spl to boot order.
Fixes: 0d61f8e5f1 ("rockchip: rk3568: add boot device detection")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Running U-Boot on a ROCK 3 Model A result in the following:
No serial driver found
resetting ...
no sysreset
### ERROR ### Please RESET the board ###
Replace bootph- props with u-boot,dm- props to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Make the indent of these macro elements consistent with the
rest of this table. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add support for debug output very early during boot using the DEBUG_UART
mechanism. This uses a static fixed UART port configuration selected via
Kconfig options and dedicated print functions from debug_uart.h. This is
useful e.g. when debugging problems so early during boot, that not even
the DM is initialized at that point, and thus DM_SERIAL is not available
either.
This functionality is disabled by default. To activate it, define the
following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/
CFG_HSCIF/<nothing for regular SCIF>:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_SCIF=y
CONFIG_DEBUG_UART_BASE=0xe6540000
CONFIG_DEBUG_UART_CLOCK=24000000
The later two options define the SCIF physical base address and SCIF
input clock in Hz. Optionally, to validate DEBUG_UART works, enable
the following as well to get early serial output message by default:
CONFIG_DEBUG_UART_ANNOUNCE=y
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a
matching Kconfig entry because they are internal to the SCIF driver.
Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI,
to reflect that and avoid interferring with Kconfig symbols. Since
neither of those options are defined elsewhere, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Switch ifdef in sh_gpio_get_value() to IS_ENABLED() macro.
The CONFIG_RCAR_GEN3 will never have SPL counterpart, so
the IS_ENABLED() macro is the right one here. No functional
change, except for improved build test coverage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Calling old U-Boot API doesn't allow to use fixed PHY.
Searching by mask is the part of new function, after
scanning FDT for a fixed PHY definition
Fixes: e821a7bdb1 ("net: ravb: Detect PHY correctly")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Mikhail Lappo <mikhail.lappo@esrlabs.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
[Hai Pham: Drop phy_connect_dev since it's called in phy_connect]
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Use mask -1 instead of 0 to reinstate the search behavior
over all PHY addresses. Add Fixes tag, sort the tag list.]
Sort the list of "depends" symbols in ascending order.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Sort the list of "depends" symbols in ascending order.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Do not cache the single CPG MODE register bit 12, instead cache the
entire register value, and only pick the matching bit from the cached
value when core clock of type MDSEL or PE are used. Both MDSEL and PE
clock type currently define .offset field as 12 on Gen3, which means
this code will use bit 12 on Gen3 again, however there are additional
clock on Gen4 which use different bits, and having this flexibility
in place now will be useful when adding Gen4.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
