Commit graph

117 commits

Author SHA1 Message Date
Simon Glass
f10643cf8a dm: core: Access device ofnode through functions
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
c69cda25c9 dm: treewide: Rename dev_get_platdata() to dev_get_plat()
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Patrick Delaunay
fc8ead1a0a ata: dwc-ahci: change trace level for phy errors managed by uclass
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08 08:46:32 -04:00
Tom Rini
9f9ecd3e4d Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25 13:38:29 -04:00
Suneel Garapati
3f6f0cd8fd ata: ahci: Add BAR index quirk for Cavium PCI SATA device
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Frank Wunderlich
a7e0ef15dd ahci: mediatek: fix copyright and author-lines
after review of sam copyright should be on one line and link should
not between author lines

just remove the link and put ryder first as he is author of linux-driver

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Masahiro Yamada
1450bff3e4 ata: mvebu: use dev_read_addr() to get base address
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to ulong because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-22 08:51:44 -06:00
Frank Wunderlich
38bff327d7 ahci: mediatek: add ahci driver
add AHCI driver ported from linux

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Andre Przywara
44a4042b01 sata_sil: Enable DM_PCI operation
Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.

Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
07e1114671 Fix some checkpatch warnings in calls to udelay()
Fix up some incorrect code style in calls to functions in the linux/time.h
header, mostly udelay().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
e6f6f9e648 common: Drop part.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Trevor Woerner
bb0fb4c0f4 rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b16a331697 rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Ye Li
6b6c620c82 sata: dwc_ahsata: Fix memory issue in reset_sata
The reset_sata should reset the sata device info and free the
probe_ent memory. Otherwise, it will cause memory leak if we
init the sata again.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-08 18:29:10 -04:00
Ye Li
cdff6fba32 sata: dwc_ahsata: Fix incorrect free
Fix coverity issue CID 43665: Free of address-of expression (BAD_FREE)
incorrect_free: free frees incorrect pointer pp.

pp points the port array field of struct ahci_uc_priv, should not free it.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:05 -04:00
Ye Li
87e2cb530f sata: ahsata: Fix wrong operand for checking SERR DIAG_X
Fix coverity issue CID 3261683: Wrong operator used
(CONSTANT_EXPRESSION_RESULT) operator_confusion:
({...; __v;}) | 67108864 is always 1/true regardless of the values
of its operand. This occurs as the logical operand of !

When DIAG_X is set, the PHY COMINIT signal is detected, so
should use '&' to check whether it is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:03 -04:00
Ye Li
bf38cbf9a2 sata: ahsata: Fix resource leak
Fix coverity issue CID 3606684: Resource leak (RESOURCE_LEAK)
leaked_storage: Variable uc_priv going out of scope leaks the storage it points to

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:00 -04:00
Peng Ma
5ff78d11e5 Revert "ata: fsl_ahci: Add sata DM support for Freescale powerpc socs"
This reverts commit 1ee4942918.

Commit 1ee4942918 ("ata: fsl_ahci: Add sata DM support for Freescale
powerpc socs") introduced SCSI layer to call AHCI private API in order
to support sata operations, In DM mode, This is not necessary for
non-AHCI sata. So revert it and have already updated the driver itself
to operate sata directly.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-25 10:16:05 +05:30
Peng Ma
964b90f61d ata: fsl_sata: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
 probes, Therefore, any detection failure between of them should continue
 initialization by skipping the current port instead of exit.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08 09:27:44 -05:00
Peng Ma
40cdf26eeb ata: sata_sil: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
 probes, Therefore, any detection failure between of them should continue
 initialization by skipping the current port instead of exit.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08 09:27:44 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Peng Ma
6b9d8a70af ata: sata_sil: Add DM support for Silicon sata driver
Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as
few of the PowerPC platforms such as P series based boards need to
use SATA_SIL with DM,

Also fix below warning while PowerPC P series boards compilation,

===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19 14:11:44 +05:30
Peng Ma
e08b5b1465 ata: fsl_sata: Add DM support for Freescale PowerPC SATA driver
Add DM support for Freescale PowerPC sata driver used for PowerPC T series
SoCs,

CONFIG_BLK needs to be enabled on these platforms. It adds the SATA
controller as AHCI device, which is strictly speaking not correct,
as the controller is not AHCI compatible, But the U-Boot AHCI uclass
interface enables the usage of this DM driver,

Also fix below warning while PowerPC T series boards compilation,

===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19 14:11:44 +05:30
Roman Kapl
6e7325533b ata: ahci allow 64-bit DMA for SATA
Allow 64-bit DMA on AHCI. If not supported by the host controller, at
least print a message and fail.

Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-10-31 07:22:53 -04:00
Oleksandr Rybalko
5b7a2bf318 ata: ahci: Don't forget to clear upper address regs.
In 32bits mode upper bits need to be set to 0, otherwise controller will
try to DMA into not existing memory and stops with error.

Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
2019-10-11 10:10:19 -04:00
Oleksandr Rybalko
25643a5c3e ahci-pci: ASM1061 report wrong class, but support AHCI.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
2019-10-11 10:10:18 -04:00
Park, Aiden
bd98e6ae71 dm: scsi: Scan the actual number of ports
The scsi_scan_dev() is looping over the number of uc_plat->max_id.
The number of actual ports a AHCI controller has can be greater than
max_id. Update uc_plat->max_id to make SCSI scan all detected ports.

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-26 11:46:20 -04:00
Peng Ma
1ee4942918 ata: fsl_ahci: Add sata DM support for Freescale powerpc socs
This patch is to support Freescale sata driver with dts initialized.
Also resolved the following problems.

===================== WARNING ======================
This board does not use CONFIG_DM_SCSI. Please update
the storage controller to use CONFIG_DM_SCSI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 19:53:09 +05:30
Peng Ma
d2ebc38236 scsi: ceva: Clean up the driver code
Distinguish the ecc val by chassis version and move the ecc addr to dts.
Add ls1028a soc support.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22 12:24:24 +05:30
Christian Gmeiner
26992928e8 ata: ahci: drop read-only ahci_ioports members
Also get rid of ahci_setup_port(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-05-18 12:32:01 -04:00
Christian Gmeiner
28b4ba9481 ata: ahci: fix memory leak
malloc(..) and memalign(..) are both allocating memory and as a result
we leak the memory allocated with malloc(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 19:52:55 -04:00
Tom Rini
4b37f36d68 Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Convert DM_MMC and DM_SCSI
- A20, R40, H6 Linux dts(i) sync
- CLK, RESET support for sunxi, sun8_emac net drivers
2019-04-17 09:19:45 -04:00
Andre Przywara
f8c8669760 sunxi: update SATA driver to always use DM_SCSI
It seems like the Allwinner SATA driver is already quite capable of
using the driver model, so we can force this on all boards and can
remove support for a non-DM_SCSI build.
This removes the warning about boards with SATA ports not being
DM_SCSI compliant.

It also takes the opportunity to move the driver out of the board/sunxi
directory to join its siblings in drivers/ata, and to make it a proper
Kconfig citizen.

The board defconfigs stay untouched.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: select DM_SCSI separately]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Soeren Moch
046a69b848 ata: dwc_ahsata: Add ahci driver model support
Disable this support for cm_fx6 to avoid breakage.

Signed-off-by: Soeren Moch <smoch@web.de>
2019-04-13 20:30:09 +02:00
Soeren Moch
d5326dfa7a ata: dwc_ahsata: Fix sector reports for large disks
Do not report negative sector numbers for disks > 1TB, do not limit
sector numbers to 32 bit if CONFIG_SYS_64BIT_LBA is enabled.

Signed-off-by: Soeren Moch <smoch@web.de>
2019-04-13 20:30:09 +02:00
Michael Walle
586f7b913d sata: sata_mv: add orion-sata compatible string
The kirkwood devices are compatible with this driver.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12 07:04:18 +02:00
Michael Walle
6d29497123 sata: sata_mv: support kirkwood architecture
Fix the worng include and offset macros.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12 07:04:18 +02:00
Michael Walle
cfdf632c5c sata: sata_mv: use correct format specifier in debug()
This fixes a compile error on kirkwood.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12 07:04:18 +02:00
Baruch Siach
5903b91988 ata: ahci_mvebu: add support for Armada 38x
With board_ahci_enable() implementation for Armada 38x in place we can
now enable 38x support in the ahci_mvebu driver.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12 07:04:18 +02:00