Commit graph

45326 commits

Author SHA1 Message Date
Bin Meng
263252c762 x86: kconfig: Select OF_CONTROL
This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
67f99f970f x86: kconfig: Imply ENABLE_MRC_CACHE in the platform Kconfig
Platform knows whether MRC cache is implemented, but using it can
be a choice of a specific board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
5d89b37f71 x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
3612b1efeb x86: kconfig: Select ARCH_MISC_INIT in the platform Kconfig
arch_misc_init() is intended to do architecture-dependent stuff.
This is required by each platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
30b1ecd265 x86: kconfig: Let board select BOARD_EARLY_INIT_F
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes
and should be not 'default y' for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
1e452b4686 x86: kconfig: Imply HAVE_INTEL_ME in the platform Kconfig
Intel Management Engine is required by the platform, however it's
not a must have when building a U-Boot image. For example, during
development normally programming ME firmware is a one-time effort.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
6bf89de7e1 x86: kconfig: Select PCI and DM_PCI
PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
e28497bf4a x86: kconfig: Select USE_PRIVATE_LIBGCC
x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
0ce9c57620 x86: kconfig: Select TIMER and X86_TSC_TIMER
Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Andy Shevchenko
c3df28f6e2 x86: Make table address selectable
Some firmwares might have another window for generated tables.

So, introduce two configuration options to select start address and
maximum length for the generated tables.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Bin Meng
167a40166b x86: tsc: Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr()
Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr(), as that
better describes what the routine does.

This keeps in sync with Linux kernel commit:
  02c0cd2: x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
f5757154bb x86: tsc: Correct Silvermont reference clock values
Atom processors use a 19.2 MHz crystal oscillator.

Early processors generate 100 MHz via 19.2 MHz * 26 / 5 = 99.84 MHz.

Later processors generate 100 MHz via 19.2 MHz * 125 / 24 = 100 MHz.

Update the Silvermont-based tables accordingly, matching the Software
Developers Manual.

Also, correct a 166 MHz entry that should have been 116 MHz, and add
a missing 80 MHz entry for VLV2.

This keeps in sync with Linux kernel commit:
  05680e7: x86/tsc_msr: Correct Silvermont reference clock values

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
c636774848 x86: tsc: Update comments and expand definitions in freq_desc_tables[]
Some processor abbreviations in the comments of freq_desc_tables[]
are obscure. This updates part of these to mention processors
that are known to us. Also expand frequency definitions.

This keeps in sync with Linux kernel commit:
  9e0cae9: x86/tsc_msr: Update comments, expand definitions

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
fde1801eaa x86: tsc: Remove the fail handling in try_msr_calibrate_tsc()
If either ratio or freq is zero, the return value is zero. There
is no need to create a fail branch and return zero there.

This keeps in sync with Linux kernel commit:
  14bb4e3: x86/tsc_msr: Remove debugging messages

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
0b992e4932 x86: tsc: Identify Intel-specific code
try_msr_calibrate_tsc() is currently Intel-specific, and should not
execute on any other vendor's parts.

This keeps in sync with Linux kernel commit:
  ba82683: x86/tsc_msr: Identify Intel-specific code

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
d92e9c8d31 x86: tsc: Read all ratio bits from MSR_PLATFORM_INFO
Currently we read the tsc radio like this:

	ratio = (MSR_PLATFORM_INFO >> 8) & 0x1f;

Thus we get bit 8-12 of MSR_PLATFORM_INFO, however according to the
Intel manual, the ratio bits are bit 8-15.

Fix this problem by masking 0xff instead.

This keeps in sync with Linux kernel commit:
  886123f: x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
e719b6b0f8 x86: Enforce toolchain to generate 64-bit codes for 64-bit U-Boot
64-bit U-Boot image is a combination of 32-bit U-Boot (SPL) plus
64-bit U-Boot (proper). For the U-Boot proper, it has be compiled
to 64-bit object codes. Attempting to use a toolchain to compile
64-bit U-Boot for qemu-x86_64, like kernel.org 4.9 i386-linux-gcc,
fails with the following errors:

  arch/x86/cpu/intel_common/microcode.c:79:2: error: PIC register
  clobbered by 'ebx' in 'asm'

The issue is because toolchain is preconfigured to generate code
for the 32-bit architecture (i386), and currently '-m64' is missing
in the makefile fragment. Using kernel.org 4.9 x86_64-linux-gcc
works out of the box, since it is preconfigured to generate 64-bit
codes.

When compiling U-Boot SPL, '-m32' is passed to the toolchain, no
mater 32-bit (i386-linux-) or 64-bit (x86_64-linux) the toolchain
is preconfigured to generate.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
9a95f51ffe x86: Use default stack boundary alignment
At present U-Boot x86 build is using -mpreferred-stack-boundary=2
which is 4 bytes stack boundary alignment. With 64-bit U-Boot, the
minimal required stack boundary alignment is 16 bytes.

If -mpreferred-stack-boundary is not specified, the default is 4
(16 bytes). Switch to use the default one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Jean-Jacques Hiblot
5c970013a6 regulator: palmas: disable bypass when the LDO is enabled
Some LDOs have a bypass capability. Make sure that the bypass is disabled
when is the LDO is enabled (otherwise the voltage can't be changed).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-01 11:58:01 +09:00
Kishon Vijay Abraham I
9554a14df2 regulator: palmas: Add support for LDO1 regulator to provide 1.8V
Modify palmas_mmc1_poweron_ldo() API to set the voltage based on the
voltage parameter passed as argument instead of always setting it to
3.0V. This allows MMC1 to set the LDO1 regulator voltage to 3.3V or 1.8V.
1.8V is required to add support for UHS mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-01 11:58:01 +09:00
Simon Glass
3936514b82 dm: sunxi: Move Linksprite_pcDuino3 to use DM for MMC, SATA
Move this board over to driver model for MMC and SATA. This means that it
uses CONFIG_BLK as well. In SPL these options remain turned off since it
increases the code size. One option would be to use CONFIG_SPL_OF_PLATDATA
to avoid device-tree overhead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:01 +09:00
Simon Glass
cf7b2e10c9 dm: sata: sunxi: Add support for driver model
Adjust SATA setup to support driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
74daf94a23 dm: sunxi: sata: Don't build sata support into SPL
This is not used in SPL so we do not need to compile it. Make this change
before adding driver-model support to the driver, to avoid build errors.
With driver model we define a U_BOOT_DRIVER() which would otherwise be
present in SPL and not be garbage-collected when building.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
8620f38409 dm: sunxi: Linksprite_pcDuino3: Correct polarity of MMC card detect
This is shown as active high in the schematics[1], so fix it.

[1] https://patchwork.ozlabs.org/patch/777890/

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
dd27918c22 dm: mmc: sunxi: Add support for driver model
Add a driver-model version of this driver which mostly uses the existing
code. The old code can be removed once all boards are switched over.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:01 +09:00
Simon Glass
ec73d96090 dm: mmc: sunxi: Drop mmc_clk_io_on()
This function has #ifdefs in it which we want to avoid for driver model.
Instead we should use different compatible strings and the .data field.
It also uses the MMC device number which is not available in driver
model except through aliases.

Move the function's into its caller so that the driver-model version can
do things its own way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
034e226bc7 dm: mmc: sunxi: Pass private data around explicitly
At present the driver-private data is obtained in various functions by
various means. With driver model this is provided automatically. Without
driver model it comes from a C array declared at the top of the file.

Adjust internal functions so that they are passed the private data as
a parameter, allowing the caller to obtain it using either means.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
3f5af12a5d dm: mmc: sunxi: Rename mmchost to priv
Use the driver-model naming convention for this structure. It is data
private to the driver so the local variable should be called 'priv'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
e3c794e2fa dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv
Use the driver-model naming convention for this structure. It is data
private to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
bfc1c6b483 dm: ahci: Correct uclass private data
This is expected to be attached to the uclass and the code operates that
way, but the uclass has not been updated. Fix it to avoid using memory at
address 0.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 47fc61a (dm: ahci: Drop use of probe_ent)
2017-08-01 11:58:01 +09:00
Simon Glass
068a2fc1d5 dm: scsi: Drop duplicate SCSI and DM_SCSI options
When the SATA code was moved into drivers/ata these Kconfig options were
added to that directory. They already exist in drivers/scsi. Remove them
from drivers/ata to fix the duplication.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7f2b5f4 (sata: Move drivers into new drivers/ata directory)
2017-08-01 11:58:01 +09:00
Simon Glass
336a44877a fdt: Correct fdt_get_base_address()
This function appears to obtain the value of the 'ranges' property rather
than 'reg'. As such it does not behave as documented or expected.

In addition it picks up the second field of the property which is the size
(with prop += naddr) rather than the first which is the address.

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:00 +09:00
Simon Glass
c4d660d4d0 dm: mmc: Allow disabling driver model in SPL
At present if U-Boot proper uses driver model for MMC, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.

Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By
default these follow their non-SPL versions, but this can be changed by
boards which need it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:00 +09:00
Simon Glass
745a94f352 ahci: Support non-PCI controllers
At present the AHCI SCSI driver only supports PCI with driver model.
Rename the existing function to indicate this and add support for adding
a non-PCI controller .

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:00 +09:00
Tom Rini
6364a5d4bd Prepare v2017.09-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-31 20:37:25 -04:00
Tom Rini
eddc7dabe0 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-31 18:59:01 -04:00
Tom Rini
8f1a80e99e configs: Migrate CMD_NAND*
Migrate all remaining instances of CMD_NAND, CMD_NAND_TRIMFFS
CMD_NAND_LOCK_UNLOCK and CMD_NAND_TORTURE from the headers into the
defconfig files.

Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-31 12:21:40 -04:00
Simon Glass
7b3c4c3a53 dm: console: Check for serial devices properly
With driver model the serial device is often not called "serial". Mark
driver-model stdio devices so that they can be detected and we can look up
the uclass. This is a more reliable way of finding out whether the console
is connected to a serial device or not.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-31 12:21:40 -04:00
Simon Glass
42f9f915c2 console: Unify the check for a serial console
Put the check for whether a console is a serial device in a function so
that we can share the code in the two places that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-31 12:21:40 -04:00
Andrew F. Davis
ef3fc42ded arm: mach-omap2: Align image address before cache operations
The image address passed to secure_boot_verify_image() may not be
cacheline aligned, round the address down to the nearest cacheline.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-07-31 12:21:39 -04:00
Tom Rini
c826d17286 ti: Default to ENV_IS_IN_FAT if MMC_OMAP_HS
When we have MMC available we assume that we want to put the env as a
file on FAT.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-31 12:21:25 -04:00
Tom Rini
3c7be0c91a am335x_hs_evm: Disable CONFIG_SPL_ENV_SUPPORT
The main uses of CONFIG_SPL_ENV_SUPPORT are for network support and for
disabling "Falcon Mode" support at run-time.  As this build enables
neither, remove this feature.

Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-31 11:22:56 -04:00
Tom Rini
43ba3c59cb env: Migrate CONFIG_ENV_IS_IN_FAT options to Kconfig
We rename the various FAT_ENV_xxx options to CONFIG_ENV_FAT_xxx so that
they can be modified via Kconfig.  Migrate all existing users to the new
values.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-31 11:22:56 -04:00
Adam Ford
3158eebd21 Remove unused CONFIG_TWL4030_PWM
CONFIG_TWL4030_PWM is not being used by any source, so let's remove the #define
and the whitelist entry

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-31 11:22:55 -04:00
Patrice Chotard
84e9dcc120 serial: stm32x7: Convert CONFIG_STM32X7_SERIAL to Kconfig
Add CONFIG_STM32X7_SERIAL as a Kconfig option.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-07-31 11:22:54 -04:00
Philipp Tomsich
0fa0abecfc dm: Kconfig: fix typo in help for SPL_PINCTRL
Changes 'controlloers' to 'controllers' in the help-text for
SPL_PINCTRL.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-31 11:22:53 -04:00
Alexander Graf
c1ae1a1608 efi_loader: Fix warning in efi_gop
Commit ca9193d2b1 ("efi_loader: gop: fixes for CONFIG_DM_VIDEO without
CONFIG_LCD") dropped the explicit (void*) cast for fb_base in efi gop support
for CONFIG_LCD without DM. This patch adds it back, eliminating the now occuring
warning again

Fixes: ca9193d2b1 ("efi_loader: gop: fixes for CONFIG_DM_VIDEO without CONFIG_LCD")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2017-07-31 07:28:13 -04:00
Tom Rini
2218b32d88 Patch queue for efi - 2017-07-29
A lot of EFI greatness this time around. Thanks a lot to the
 two amazing new contributors
 
   Heinrich Schuchardt and
   Rob Clark
 
 we now gain
 
   - stable objects across multiple bootefi invocations
   - fixes for shim
   - fixes for ipxe
   - protocol installation
   - device path conversion to/from text
   - working "lsefi" support in grub
   - working notifiers
   - various bug fixes
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2017-07-29

A lot of EFI greatness this time around. Thanks a lot to the
two amazing new contributors

  Heinrich Schuchardt and
  Rob Clark

we now gain

  - stable objects across multiple bootefi invocations
  - fixes for shim
  - fixes for ipxe
  - protocol installation
  - device path conversion to/from text
  - working "lsefi" support in grub
  - working notifiers
  - various bug fixes
2017-07-31 07:27:45 -04:00
Bin Meng
55f228b07e x86: minnowmax: Remove CONFIG_SMSC_LPC47M
There is no SMSC LPC47M Super I/O chipset on the MinnowMax board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
382fabb297 x86: acpi: Don't touch hardware on HW reduced platforms
If ACPI HW reduced bit in FADT is set we should ignore any ACPI hardware
communications.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00