Commit graph

560 commits

Author SHA1 Message Date
Tom Rini
6acc7c3cbc Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-11-05 07:42:00 -07:00
Kim Phillips
7d2ab9ae4e drivers/mtd/nand: sparse fixes
nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static?
nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static?
nand_base.c:2854:1: error: directive in argument list
nand_base.c:2856:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-11-04 11:00:38 -07:00
Kim Phillips
11dc401079 drivers/mtd/cfi_flash.c: sparse fixes
cfi_flash.c:756:43: warning: Using plain integer as NULL pointer
cfi_flash.c:1150:52: warning: cast to non-scalar
cfi_flash.c:1433:46: warning: cast truncates bits from constant value (890089 becomes 89)
cfi_flash.c:1490:61: warning: cast truncates bits from constant value (1f001f becomes 1f)
cfi_flash.c:1508:61: warning: cast truncates bits from constant value (10001 becomes 1)
cfi_flash.c:1738:63: warning: cast truncates bits from constant value (10001 becomes 1)
cfi_flash.c:1857:6: warning: symbol '__flash_cmd_reset' was not declared. Should it be static?

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:38 -07:00
Kim Phillips
eef1cf2d5c include/linux/byteorder: import latest endian definitions from linux
u-boot's byteorder headers did not contain endianness attributions
for use with sparse, causing a lot of false positives.  Import the
kernel's latest definitions, and enable them by including compiler.h
and types.h.  They come with 'const' added for some swab functions, so
fix those up, too:

include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default]

Also, note: u-boot's historic __BYTE_ORDER definition has been
preserved (for the time being at least).

We also remove ad-hoc barrier() definitions, since we're including
compiler.h in files that hadn't in the past:

macb.c:54:0: warning: "barrier" redefined [enabled by default]

In addition, including compiler.h in byteorder changes the 'noinline'
definition to expand to __attribute__((noinline)).  This fixes
arch/powerpc/lib/bootm.c:

bootm.c:329:16: error: attribute '__attribute__': unknown attribute
bootm.c:329:16: error: expected ')' before '__attribute__'
bootm.c:329:25: error: expected identifier or '(' before ')' token

powerpc sparse builds yield:

include/common.h:356:22: error: marked inline, but without a definition

the unknown-reason inlining without a definition is considered obsolete
given it was part of the 2002 initial commit, and no arm version was
'fixed.'

also fixed:
ydirectenv.h:60:0: warning: "inline" redefined [enabled by default]

and:

Configuring for devconcenter - Board: intip, Options: DEVCONCENTER
make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1
make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
powerpc-fsl-linux-size: './u-boot': No such file
4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration':
include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available
4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here

and:

In file included from crc32.c:50:0:
crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration]
crc32table.h:4:1: error: initializer element is not constant
crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]')

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
[trini: Remove '#endif' in include/common.h around setenv portion]
Signed-off-by: Tom Rini <trini@ti.com>
2012-11-04 11:00:34 -07:00
Lucas Stach
a833b95039 tegra: nand: make ONFI detection work
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.

Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Lucas Stach
c0720afbb5 tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Wolfgang Denk
d923a5d59f MPC85xx: remove support for TQM85xx boards
Due to grown code sizes the TQM85xx boards don't build any more with
some older tool chains (like ELDK 4.2).  As these boards have long
reached EOL it seems a waste of effort trying to fix them.  The vendor
has agreed to drop support for them, too.  So let's get rid of them.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2012-10-05 11:07:42 -07:00
Albert ARIBAUD
1c27059a2f Merge remote-tracking branch 'u-boot/master' 2012-09-30 23:49:17 +02:00
Albert ARIBAUD
fa651cce4f Merge remote-tracking branch 'u-boot-atmel/master' 2012-09-29 08:34:09 +02:00
Tom Rini
a4cc1c4877 SPL: SPI: Enhance spi_spl_load to match the other load functions
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 11:20:27 -07:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Tom Rini
efa1f43b7d mxc nand: Fix warning on !MXC_NFC_V2_1
In board_nand_init() we only need the 'tmp' variable if MXC_NFC_V2_1 is
defined.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-18 09:24:22 -07:00
Benoît Thébaudeau
9c60e75e05 mxc nand: Homogenize IP revisions with Linux
Use the same IP revisions as in Linux in order to make the comparison more
clear.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
13927f0733 mtd mxc nand: Merge init functions
Merge mxc_setup_config1() into board_nand_init() in order to ease the addition
of i.MX5 support in the following patches.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
7c28a1cfdf mtd mxc nand: Fix ECC state after read_page_raw_syndrome()
mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC
errors left uncorrected after a call to this function.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
0e499b07ef mtd mxc nand: Use _mxc_nand_enable_hwecc()
Use _mxc_nand_enable_hwecc() instead of duplicating its code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
c1db8dd62b mxc nand: Access all ecc_status_result fields
On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2
consecutive 16-bit registers. This patch reads all the fields of this value,
which makes a difference for 4-kiB NF pages.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Benoît Thébaudeau
365b2c0761 mxc nand: cosmectic: Light cleanup
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Benoît Thébaudeau
80c8ab7b25 mxc nand: Merge mtd and spl register definitions
This patches fixes the TODO to use same register definitions in mtd mxc_nand and
nand_spl fsl nfc drivers.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Marek Vasut
9c790a748f mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
This is based on Linux kernel -next:

commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b
Author: Brian Norris <computersforpeace@gmail.com>
Date:   Fri Jul 13 09:28:24 2012 -0700

    mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver

    The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
    silently masks off at least one flag that might be set by the driver
    (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
    others.

    Really, as long as driver writers exercise a small amount of care with
    NAND_* options, this mask is not necessary at all; it was only here to
    prevent certain options from accidentally being set by the driver. But the
    original thought turns out to be a bad idea occasionally. Thus, kill it.

    Note, this patch fixes some major gpmi-nand breakage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 18:54:43 -05:00
Joe Hershberger
e70bfa2986 nand: Make NAND lock status compatible with Micron
Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not
the same as others.  Instead of bit 1 being lock, it is #lock_tight.
To make the driver support either format, ignore bit 1 and use only
bit 0 and bit 2.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:43 -05:00
Joe Hershberger
33b1d5cae3 nand: consolidate duplicated constants
NAND_CMD_ constants for lock/unlock should be in the header

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:42 -05:00
Joe Hershberger
e331ab2ee9 nand: Change ulong to loff_t and size_t
Missed in previous cleanup.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:42 -05:00
Joe Hershberger
eee623a504 nand: Add support for unlock.invert
NAND unlock command allows an invert bit to be set to unlock all but
the selected page range.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[scottwood@freescale.com: updated docs and added comment about invert bit]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:32:10 -05:00
Matthieu CASTET
d62e9caaaf mtd: support ONFI multi lun NAND
With onfi a flash is organized into one or more logical units (LUNs).
A logical unit (LUN) is the minimum unit that can independently execute
commands and report status.

Mtd does not exploit LUN, so make it see a big single flash where size is
lun_size * number_of_lun.

Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB.

Artem: split long line on 2 shorter ones.

This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux

Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
Acked-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by:  Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[scottwood@freescale.com: picked from Linux into U-Boot]
Reported-by: Rafael Beims <rafael.beims@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 16:17:28 -05:00
Bo Shen
83fd09a049 spiflash: at25: using common spi flash operation
Using common spi flash operation function to replace private operation
funtion

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-17 19:00:31 +02:00
Bo Shen
053a4d1f5d spi: add atmel at25df321 serial flash support
Add atmel at25df321 serial flash support

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-17 18:50:47 +02:00
Wu, Josh
b9c83c6815 atmel_nand: fix the U-Boot output information about nand flash with PMECC enable.
Before the patch, it looks like:
	|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06)
	|
	|CPU: AT91SAM9G35
	|Crystal frequency:       12 MHz
	|CPU clock        :      400 MHz
	|Master clock     :  133.333 MHz
	|DRAM:  128 MiB
	|WARNING: Caches not enabled
>	|NAND:  Initialize PMECC params, cap: 2, sector: 512
>	|256 MiB
	|MMC:   mci: 0
	|In:    serial
	|Out:   serial
	|Err:   serial
	|Net:   macb0
	|Hit any key to stop autoboot:  0

After the patch:
	|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11)
	|
	|CPU: AT91SAM9G35
	|Crystal frequency:       12 MHz
	|CPU clock        :      400 MHz
	|Master clock     :  133.333 MHz
	|DRAM:  128 MiB
	|WARNING: Caches not enabled
>	|NAND:  256 MiB
	|	... ...
	|Hit any key to stop autoboot:  0

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-13 14:28:13 +02:00
Tom Warren
651eb73224 NAND: MXS: include common.h first so cache.h is included in correct order
With Simon Glass's include/nand.h alignment changes, some mxs builds
were generating errors. Fix is to ensure asm/cache.h is included before
linux/mtd/nand.h. Moving common.h to top of include list does that.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-09-10 15:31:11 -07:00
Jim Lin
312693c3dd tegra: nand: Add Tegra NAND driver
A device tree is used to configure the NAND, including memory
timings and block/pages sizes.

If this node is not present or is disabled, then NAND will not
be initialized.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
b572595ee9 nand: Try to align the default buffers
The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-07 13:54:30 -07:00
Joe Hershberger
de15a06aad cfi: Make the flash erase and write operations abortable
Check for ctrlc() in operations that take time and loop over the flash
addresses.

In netconsole, tstc() is expensive.  Only check once in a while to not
slow down the operation significantly.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-03 11:24:27 +02:00
Joe Hershberger
6822a647b9 cfi: Check for blank before erase
Added an optional check in the CFI driver to evaluate if the sector is
already blank before issuing an erase command.  Improves erase time by
over a factor of 10 if already blank.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-03 11:24:27 +02:00
Wu, Josh
bdfd59aa0f at91: atmel_nand: Update driver to support Programmable Multibit ECC controller
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.

This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
ae79794e54 at91: atmel_nand: remove unused variables.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
fe2185ea80 at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Jeroen Hofstee
d43950463c arm: omap: Fix switching back to nandecc sw.
Orjan Friberg wrote at [1]:

"For the beagleboard, ecc.size is not explicitly set when doing 'nandecc
sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's
set to 256 bytes.

When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when
changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly
the format has changed."

No patch has been submitted and the issue was still present. This patch
adds the mentioned solution. Tested on a tam3517 board.

[1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html

cc: Orjan Friberg <of@flatfrog.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-09-01 14:58:19 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Wolfgang Denk
c51261e8db Merge branch 'sf' of git://git.denx.de/u-boot-blackfin
* 'sf' of git://git.denx.de/u-boot-blackfin:
  sf: spansion: Add support for S25FL256S
  sf: winbond: fix page_size
  sf: stmicro: add support for N25Q128A
  sf: stmicro: add support N25Q128 parts
  sf: stmicro: support JEDEC standard two-byte signature
  sf: winbond: add W25Q32
  cmd_spi: remove superfluous semicolon

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-09-01 12:22:31 +02:00
Michal Simek
4a4cb4e111 sf: spansion: Add support for S25FL256S
Add support for Spansion S25FL256S SPI flash.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-14 11:45:50 -04:00
Stephen Warren
c75942c7b7 sf: winbond: fix page_size
Commit a4ed3b6 "sf: inline data constants" modified winbond.c's page_size
from 256 to 4096. This prevents either/both of "sf write" writing the
correct data, or "sf read" from reading the correct data back.

This allows U-Boot running on Compulab Tegra to upgrade itself.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-14 11:34:30 -04:00
Holger Brunck
81316a902a mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashs
commit 54652991
Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips

fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads
to problems for smaller versions of this chip e.g. the 32Mbit version
with deviceid 0x16 on mgcoge. So move the code for this work around to
an own function and check previously manufacturer id and device id to
not break other flashes which don't need this work around.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Stefan Roese <sr@denx.de>
cc: Philippe De Muyter <phdm@macqel.be>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-13 14:34:44 +02:00
Anatolij Gustschin
66863b0538 cfi_flash: add support for Spansion flash PPB sector protection
Erasing flash sectors protected with persistent protection bit (PPB)
mechanism on Spansion flash chips doesn't work. Add sector protection
status checking and sector lock and unlock commands to fix this.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-13 14:34:35 +02:00
Michal Simek
d945ce9704 sf: stmicro: add support for N25Q128A
Add support for Numonyx N25Q128A SPI flash.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-10 11:31:04 -04:00
Stephan Linz
6ad6c6dc1e sf: stmicro: add support N25Q128 parts
Adds support for Numonyx's N25Q128 SPI flash. These devices
are used on (among others) Avnet Spartan-6 LX9 micro-evaluation
boards. Tested with "sf" commands and CONFIG_ENV_IS_IN_SPI_FLASH.

Signed-off-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09 20:41:54 -04:00
Stephan Linz
63ff6a66ae sf: stmicro: support JEDEC standard two-byte signature
There are more than the M25Pxx serial flashs that can be
used with the stmicro driver, for example: the M25PXxx or
N25Qxx serie. All these chips have burned in the original
stmicro manufacture id 0x20 together with a standard
two-byte signature.

In preperation to support all these chips the stmicro driver
have to decode the full two-byte signature.

Signed-off-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09 20:41:54 -04:00
Rajeshwari Shinde
c969abc470 sf: winbond: add W25Q32
SMDK EVT1  has a different Winbond part, added its part details
to the SPI flash table.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09 20:41:54 -04:00
Jérôme Carretero
b54d1f26ff sf: stmicro: add geometrical info for N25Q256 from Micron
Note: because 4-byte addressing is not supported yet,
at the moment only the first 16MiB of the device are available.

Signed-off-by: Jérôme Carretero <cJ@zougloub.eu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-08 10:55:55 +00:00