Use the common GSC driver.
This allows us to do some additional cleanup:
- use the GSC driver functions
- move waiting for the EEPROM to the SPL int (it will always be ready
after this)
- move eeprom functions into eeprom file and elimate GSC_I2C_BUS
- eliminate some redundant EEPROM reads (the EEPROM must be read in
SPL before relocation, in SPL after relocation, and in U-Boot init.
All subsequent uses can use the global structure)
- remove unnecessary header files and alphabatize includes
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
- increase post-reset time to 300ms per datasheet
- add tx-delay/rx-delay config
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add gpio hog support for board-specific gpio lines:
- put hogs in u-boot.dtsi so as to keep the regular dts files
in sync with the kernel. The hogs will not be put in the kernel
as that makes them un-usable by userspace as well as
re-initializes them to dt defaults overriding changes which may
have been done by bootloader commands.
- specify gpio names and initial config
- enable GPIO_HOG
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Use the common GSC driver.
This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Drop Apalis iMX8X platform as it never left sample state and is no
longer supported.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
HSIOMIX PD controller and missing USB PD properties. This is required
to bring up the DWC3 USB controller up.
This is based on linux next and patches which are still pending
review, but which are likely going to be part of Linux 5.19:
b2d67d7bdf74 ("arm64: dts: imx8mp: disable usb3_phy1")
290918c72a29 ("arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes")
https://www.spinics.net/lists/arm-kernel/msg958501.html
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The arch/arm/include/asm/arch-imx8m/power-domain.h is not included
anywhere except in drivers/power/domain/imx8m-power-domain.c, just
inline the content and drop the header. No functional change.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.
Fixes: 829e06bf41 ("imx8ulp: clock: Add MIPI DSI clock and DCNano clock")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Use this larger boundary to ensure that linker lists at least start on the
maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN
setting, but that is host-arch-specific, so it seems better to use the
largest value for every host architecture.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present fputc() is used before the console is available, then write()
is used. These are not compatible. Since fputc() buffers internally it is
better to use the write(), so that a partial line is immediately
displayed.
This has a slight effect on performance, but we are already using write()
for the vast majority of the output with no obvious impacts.
Signed-off-by: Simon Glass <sjg@chromium.org>
The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the include for rk3xxx-u-boot.dtsi to rk3188-u-boot.dtsi
to stay in line with U-boot dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the clock driver for the rk3066 platform.
Derived from the rk3288 and rk3188 driver it
supports only a bare minimum to bring up the system
to reduce the TPL size for:
SDRAM clock configuration.
The boot devices NAND, EMMC, SDMMC, SPI.
A UART for the debug messages (fixed) at 115200n8.
A SARADC for the recovery button.
A TIMER for the delays (fixed).
There's support for two possible frequencies,
the safe 600MHz which will work with default pmic settings and
will be set to get away from the 24MHz default and
the maximum of 1.416Ghz, which boards can set if they
were able to get pmic support for it.
After the clock tree is set during the TPL probe
there's no parent update support.
In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c
obtain the (fixed) clk_get_rate from the clock driver
instead of platdata.
The rk3066 cru node has a number of assigned-clocks properties
that call the .set_rate() function. Add them to the list so that
they return a 0 instead of -ENOENT.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
grf is needed by various drivers for rk3066 soc.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Not all Rockchip SoC models use the ARM arch timer.
Call the function timer_init() only when
CONFIG_SYS_ARCH_TIMER is available.
Use the call condition IS_ENABLED to increase
build coverage and make the code easier to read.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.
[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
It seems like there was some merge error when first cleaning up and
sharing this function. We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).
Fixes: 1befb38b86 ("x86: Move table csum into separate file")
Fixes: 2b445e4d31 ("x86: Move table csum into separate header")
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds a test to ensure that puts is equivalent to putc called in a
loop. We don't verify the contents of the message to avoid having to
record console output a second time (though that could be added in the
future). The globals are initialized to non-zero values to avoid a
warning; in particular, the character count is off-by-one (but we always
make relative measurements).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The M1 Ultra consists of two M1 Max dies. The second die's I/O is at
a consistent offset of 0x2000000000.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
The GW7903 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD socket with voltage select support
- Gateworks System Controller
- M.2 A-E Socket with USB2.0 and PCIe
- MiniPCIe Socket with PCIe, USB2.0, and SIM
- IMX8M FEC
- RS232/RS485/RS422 serial transceiver
- LIS2DE12 3-axis accelerometer
- front panel LED's
- off-board isolated digital I/O
- Wide range DC power input
- 802.3at PoE
- PMIC
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This is the only place where i.MX8M code does SMCCC call, remove it.
The output has little value as it prints some part of commit ID, and
worse, if there is no SMC handler installed, the code outright hangs
or crashes the system.
By removing this one instance of SMCCC call, U-Boot no longer depends
on SMC handlers and can boot without hanging in any case. If there is
a need to dump this commit ID, use CMD_SMC instead and do 'smc' call
from U-Boot shell or scripts instead of hard-coding SMCCC dependency
into architecture code. This particular code can be replaced by:
=> smc 0xc2000003 0 0 0 0 0 0
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable instruction cache early on to speed up the boot process on i.MX8M.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo.
The board is a compatible replacement for i.MX53 M53Menlo and features
USB, multiple UARTs, ethernet, LEDs, SD and eMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree
This patch move it in U-Boot as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
The FlexSPI NOR boot offset does not require any special handling,
the image_offset is correct in either case (0x1000 for FlexSPI NOR
and 0x8000 for SD/eMMC) and the offset of u-boot.itb from the start
of flash.bin is always 0x58000 on MX8MN/MX8MP, which matches the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000 in case
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300, which is always the
case on MX8MN/MX8MP.
The CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is really overloaded in
case of the MX8MN/MX8MP, but fixing that needs additional plumbing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The GW7902-C revision adds an ADC for the VDD_5P0 voltage rail.
Add register definitions for it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Add init_nand_clk to enable gpmi nand clock. Since i.MX8M not use CCF,
so we still use legacy mode to configure the clock.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
