Commit graph

82740 commits

Author SHA1 Message Date
Tom Rini
9244b2fda9 Convert CONFIG_SYS_I2C_INIT_BOARD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_INIT_BOARD

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:53 -05:00
Tom Rini
77b5cc2948 sandbox UCLASS_HOST
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Merge tag 'dm-pull-7nov22' of https://source.denx.de/u-boot/custodians/u-boot-dm

sandbox UCLASS_HOST
2022-11-08 09:45:10 -05:00
Michal Suchanek
168a0e45fc dm: blk: Add probe in blk_first_device/blk_next_device
The description claims that the device is probed but it isn't.

Add the device_probe() call.

Also consolidate the iteration into one function.

Fixes: 8a5cbc065d ("dm: blk: Use uclass_find_first/next_device() in blk_first/next_device()")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2022-11-07 16:24:30 -07:00
Simon Glass
499503e157 dm: Add tests for the sandbox host driver
Add some unit tests for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
2851cc94f3 dm: Add documentation for host command and implementation
Document the 'host' command and also the internals of how it is
implemented.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
952018117a dm: sandbox: Switch over to using the new host uclass
Update the sandbox implementation to use UCLASS_HOST and adjust all
the pieces to continue to work:

- Update the 'host' command to use the new API
- Replace various uses of UCLASS_ROOT with UCLASS_HOST
- Disable test_eficonfig since it doesn't work (this should have a unit
  test to allow this to be debugged)
- Update the blk test to use the new API
- Drop the old header file

Unfortunately it does not seem to be possible to split this change up
further.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
10aae1145c dm: sandbox: Create a block driver
Create a block driver for the new HOST uclass. This handles attaching and
detaching host files.

For now the uclass is not used but this will be plumbed in with future
patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
9bd1aa8af2 dm: sandbox: Create a new HOST uclass
Sandbox supports block devices which can access files on the host machine.
At present there is no uclass for this. The devices are attached to the
root devic. The block-device type is therefore set to UCLASS_ROOT which
is confusing.

Block devices should be attached to a 'media' device instead, something
which handles access to the actual media and provides the block driver
for the block device.

Create a new uclass to handle this. It supports two operations, to attach
and detach a file on the host machine.

For now this is not fully plumbed in.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
41e751091d dm: blk: Tidy up obtaining a block device from its parent
This function now finds its block-device child by looking for a child
device of the correct uclass (UCLASS_BLK). It cannot produce a device of
any other type, so drop the superfluous check.

Provide a version which does not probe the device, since that is often
needed when setting up the device's platdata.

Also fix up the function's comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
d1b4659570 test: Add a way to detect a test that breaks another
When running unit tests, some may have side effects which cause a
subsequent test to break. This can sometimes be seen when using 'ut dm'
or similar.

Add a new argument which allows a particular (failing) test to be run
immediately after a certain number of tests have run. This allows the
test causing the failure to be determined.

Update the documentation also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
6580b61830 test: Allow showing basic information about tests
Add a 'ut info' command to show the number of suites and tests. This is
useful to get a feel for the scale of the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
93e2673982 test: doc: Add documentation for ut command
Before adding more options, document this command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
cdd964e380 test: Tidy up help for ut command
Sort this and put the command summary at the top instead of the bottom.

Adjust it so that the newlines are at the start of the strings, so that
there is not a blank line at the end.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
f7a68d2284 test: Drop an unused parameter to ut_run_test_live_flat()
The select_name parameter is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
5ea894ac42 dm: test: Clear the block cache after running a test
Some tests access data in block devices and so cause the cache to fill
up. This results in memory being allocated.

Some tests check the malloc usage at the beginning and then again at the
end, to ensure there is no memory leak caused by the test. The block cache
makes this difficult, since the any test may cause entries to be allocated
or even freed, if the cache becomes full.

It is simpler to clear the block cache after each test. This ensures that
it will not introduce noise in tests which check malloc usage.

Add the logic to clear the cache, using the existing blkcache_invalidate()
function. Drop the duplicate code at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
fa1e420ab0 dm: test: Drop the special function for running DM tests
This is not needed since the flag takes care of all differences. Make use
of the common function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
7cbb57321e test: Correct pylint warnings in fs_helper
Tidy this up so that pylint is happy. Use hex for the 1MB size and make
sure it is not a floating-point value.

Add a little main program to allow the code to be tried out, since at
present is only called from a long-running test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
4349ba5977 test: Split out mk_fs function into a helper
This function is useful for other tests. Move it into common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
6ca4d5b96b sandbox: Add missing comments for os_alarm()
Add the documentation to avoid a warning with 'make htmldocs'.

Fixes: 10107efedd ("sandbox: add SIGALRM-based watchdog device")

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
ff1f0e414a dm: sandbox: Drop non-BLK code from host implementation
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Tom Rini
88bd8ee106 Prepare v2023.01-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-07 15:27:03 -05:00
Tom Rini
1bb3d8b201 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-07 11:58:57 -05:00
Tom Rini
6de63bd38b Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Support for 98DX25xx/98DX35xx (AlleyCat5) (Chris)
- Makefile: Rename u-boot-spl.kwb to u-boot-with-spl.kwb (Pali)
- armada: dts: Add clock to armada-ap80x uart1 (Hamish)
2022-11-07 07:56:07 -05:00
Chris Packham
6cc8b5db40 arm: mvebu: Add RD-AC5X board
The RD-AC5X-32G16HVG6HLG-A0 development board main components and
features include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
  * SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
  * SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1 pcs)
  * PCB co-layout with 4GB device to support 8GB (Dual CS) requirement
* 16GB eMMC (Samsung KLMAG1JETD-B041006)
* 16MB SPI NOR(GD25Q127C)
* 32 x 1000 Base-T interfaces
* 16 x 2500 Base-T interfaces
  * SR1: 88E2540*4
  * SR2: 88E2580*1+88E2540*2
* Six (6) x 25G Base-R SFP28 interfaces
* One (1) x RJ-45 console connector, interfacing to the on board UART
* One (1) x USB Type-A connector, interfacing to the USB 2.0 port (0)
* One (1) x USB Type-mini B connector, interfacing to the USB 2.0 port (1)
* One (1) x RJ-45 1G Base-T Management port, interfacing to the host
  port (shared with PCIe) Connected to 88E1512 Gigabit Ethernet Phy
* One (1) x Oculink port, interfacing to the PCIe port for external CPU
  connection
* POE 802.3AT support on Port 1 ~ Port 32, 802.3BT support on Port 33 ~
  Port 48 (Microsemi PD69208T4, PD69208M or TI TPS2388,TPS23881
  solution)
* POE total power budget 780W
* LED interfaces per network port/POE
* LED interfaces (common) showing system status
* PTP TC mode Supported (Reserved M.2 connector to support BC mode)

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2022-11-07 07:46:28 +01:00
Chris Packham
7d7bb99e22 arm: mvebu: Support for 98DX25xx/98DX35xx SoC
Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
an integrated CPU (referred to as the CnM block in Marvell's
documentation). These have dual ARMv8.2 CPUs (Cortex-A55). This support
has been ported from Marvell's SDK which is based on a much older
version of U-Boot.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2022-11-07 07:46:28 +01:00
Chris Packham
c249938214 pinctrl: mvebu: Add AlleyCat5 support
This uses the same IP block as the Armada-8K SoCs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:28 +01:00
Chris Packham
515fe1ee4e usb: ehci: ehci-marvell: Support for marvell,ac5-ehci
Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci
block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with
the fact that the ac5 does not have the mbus infrastructure the 32-bit
SoCs have and ensure USB_EHCI_IS_TDI is selected.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:28 +01:00
Chris Packham
aaee5720f2 net: mvneta: Add support for AlleyCat5
Add support for the AlleyCat5 SoC. This lacks the mbus from the other
users of the mvneta.c driver so a new compatible string is needed to
allow for a different window configuration.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:28 +01:00
Chris Packham
3988e6d6b1 arm: mvebu: Don't use CONFIG_TIMER on ARM64
The 64-bit mvebu SoCs don't have a suitable timer driver so add a !ARM64
condition to the select.

Fixes: 7b530bb19e ("arm: mvebu: Use CONFIG_TIMER on all MVEBU & KIRKWOOD platforms")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:12 +01:00
Pali Rohár
87ac4b4b4c Makefile: Rename u-boot-spl.kwb to u-boot-with-spl.kwb
File name with pattern u-boot-spl* is used on all places except in kwb
image for binary with SPL-only code. Combined binary with both SPL and
proper U-Boot in other places has file name pattern u-boot-with-spl*.

Make it consistent also for kwb image and rename u-boot-spl.kwb to
u-boot-with-spl.kwb as this image contains both SPL and proper U-Boot code.

Also update documentation about file name changes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:17:55 +01:00
Hamish Martin
497db3ad89 arm: armada: dts: Add clock to armada-ap80x uart1
The uart1 node was missing the 'clock-frequency' property. This meant
the driver for this device would fail at probe.
The clock for uart1 is fed from the same source as uart0 and is a fixed
200MHz clock. This is confirmed via documentation for the CN9130 SoC
and from the equivalent code in Linux at:
<linux>/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
where uart0 and uart1 share a common 'clocks' definition.

Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:17:55 +01:00
Tom Rini
d332cd59f7 Pull request for efi-2023-01-rc1-4
Documentation:
 
 * Provide a document about security issue handling.
 
 UEFI:
 
 * Let networking support depend on NETDEVICES.
 * Discover if no efi_system_partition is set.
 
 Other:
 
 * MAINTAINERS: add arch/arm/lib/*_efi.* to EFI_PAYLOAD.
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Merge tag 'efi-2023-01-rc1-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-01-rc1-4

Documentation:

* Provide a document about security issue handling.

UEFI:

* Let networking support depend on NETDEVICES.
* Discover if no efi_system_partition is set.

Other:

* MAINTAINERS: add arch/arm/lib/*_efi.* to EFI_PAYLOAD.
2022-11-06 07:51:44 -05:00
Heinrich Schuchardt
53def68df5 efi_loader: AllocateAddress requires page address
AllocatePages() can be called with Type=AllocateAddress. Such a call can
only succeed if *Memory points to the address of an unallocated page range.

A call with *Memory being an address that is not page aligned must not
succeed. The UEFI specification requires returning EFI_OUT_OF_RESOURCES
if the requested pages cannot be allocated.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-06 10:50:04 +01:00
Masahisa Kojima
0b4cbeba59 test/py: efi_secboot: Remove unnecessary cert-to-efi-hash-list option
'cert-to-efi-hash-list -t 0' does not work as expected, it produces
indeterminate timestamp.

  $ cert-to-efi-hash-list -t 0 -s 256 db.crt dbx_hash.crl
  TimeOfRevocation is 0-113-0 00:00:255

If we need the CRL revoked for all the time, just don't specify
'-t' option.

  $ cert-to-efi-hash-list -s 256 db.crt dbx_hash.crl
  TimeOfRevocation is 0-0-0 00:00:00

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-11-06 10:50:04 +01:00
Heinrich Schuchardt
2b55ad304d efi_loader: discover if no efi_system_partition is set
Variable efi_system_partition holds the efi_system_partition. Currently it
is initialized as:

    {
      .uclass_id = 0 = UCLASS_ROOT,
      .denum = 0,
      .part = 0,
    }

This indicates that host 0:0 is the efi_system_partition and we see output
like:

    => bootefi hello
    ** Bad device specification host 0 **
    Couldn't find partition host 0:0

To identify that no EFI system partition has been set use UCLASS_INVALID.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-11-06 10:50:04 +01:00
AKASHI Takahiro
023d9c9393 efi_loader: remove CONFIG_EFI_SETUP_EARLY
Since the commit a9bf024b29 ("efi_loader: disk: a helper function to
create efi_disk objects from udevice"), CONFIG_EFI_SETUP_EARLY option is
by default on and will never be turned off.

So just remove this option.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-11-06 10:50:04 +01:00
Jan Kiszka
77b5c4a5b1 efi_loader: Let networking support depend on NETDEVICES
CONFIG_NET does not imply that there are actually network devices
available, only CONFIG_NETDEVICES does. Changing to this dependency
obsoletes the check in Kconfig because NETDEVICES means DM_ETH.

Fixes: 0efe1bcf5c ("efi_loader: Add network access support")
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-11-06 10:50:04 +01:00
Heinrich Schuchardt
607566d010 MAINTAINERS: add arch/arm/lib/*_efi.* to EFI_PAYLOAD
The files arch/arm/lib/*_efi.* are only relevant for the UEFI sub-system.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-06 10:50:04 +01:00
Tom Rini
541e68d0ee docs: Add a basic security document
Based loosely on the Linux kernel
Documentation/admin-guide/security-bugs.rst file, create a basic
security document for U-Boot.  In sum, security issues should be
disclosed in public on the mailing list if at all possible as an initial
position.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-06 10:50:04 +01:00
Heinrich Schuchardt
f67cc2f056 doc: update sbi command example
The output of the sbi command has been changed since the last release of
the man-page. Update the example.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-06 10:50:04 +01:00
Tom Rini
898bd53e6a Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- 3 important fixes
2022-11-04 11:19:58 -04:00
Janne Grunau
04448899de usb: storage: continue probe on "Invalid device"
Fixes a crash during probing of sd card readers without medium present.
Seen with the device below but reported for many other devices.

  idVendor           0x0bda Realtek Semiconductor Corp.
  idProduct          0x0326 Card reader
  bcdDevice           11.24
  iManufacturer           1 Realtek
  iProduct                2 USB3.0 Card Reader
  iSerial                 3 201404081410

Link: https://github.com/AsahiLinux/linux/issues/44
Link: https://lists.denx.de/pipermail/u-boot/2022-July/489717.html

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-11-04 12:22:45 +01:00
Tom Rini
45fc699cc5 - MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig
- MIPS: mtmips: fix incorrectly converted default value for CONFIG_SPL_PAD_TO
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Merge tag 'mips-pull-2022-11-03' of https://source.denx.de/u-boot/custodians/u-boot-mips

- MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig
- MIPS: mtmips: fix incorrectly converted default value for CONFIG_SPL_PAD_TO
2022-11-03 20:23:27 -04:00
Marek Vasut
3406e9d8af usb: Add 1ms delay after first Get Descriptor request
Logitech Unifying Receiver 046d:c52b bcdDevice 12.10 seems
sensitive about the first Get Descriptor request. If there
are any other requests in the same microframe, the device
reports bogus data, first of the descriptor parts is not
sent to the host. Wait over one microframe duration before
issuing subsequent requests to avoid probe failure with
this device, since it can be used to connect USB keyboards.

Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Janne Grunau <j@jannau.net>
2022-11-03 23:36:48 +01:00
Samuel Holland
f4917b4933 usb: ohci: Use a flexible array member for portstatus
The struct is only used to overlay the MMIO region, so the behavior is
the same. This obsoletes the Kconfig option for the number of ports.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-11-03 23:24:09 +01:00
Tom Rini
36bc9b6113 Merge branch '2022-11-02-assorted-updates'
- Improve arm semihosting, NPCM8xx pinctrl driver, SP804 uclass timer
  driver (and enable on relevant platforms), pvblock cleanup, eeprom cmd
  bugfix, add RTI watchdog nodes to k3-am64-main, evb-ast2500 config
  updates.
2022-11-03 08:29:10 -04:00
Tom Rini
c07babda65 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-11-03 08:27:44 -04:00
Padmarao Begari
7321bad25f riscv: Update Microchip MPFS Icicle Kit support
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip QSPI driver and a small 4MB reservation is
made at the end of 32-bit DDR to provide some memory for
the HSS to use.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-11-03 13:27:56 +08:00
Padmarao Begari
eac3bbe5d8 spi: Add Microchip PolarFire SoC QSPI driver
Add QSPI driver code for the Microchip PolarFire SoC.
This driver supports the QSPI standard, dual and quad
mode interfaces.

Co-developed-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-03 13:27:56 +08:00
Padmarao Begari
0b8e6f8411 riscv: dts: Add QSPI NAND device node
Add QSPI NAND device node to the Microchip PolarFire SoC
Icicle kit device tree.

The Winbond NAND flash memory can be connected to the
Icicle Kit by using the Mikroe Flash 5 click board and
the Pi 3 Click shield.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-11-03 13:27:56 +08:00