Commit graph

11 commits

Author SHA1 Message Date
Masahiro Yamada
b75d8dc564 treewide: convert bd_t to struct bd_info by coccinelle
The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:

  It's a **mistake** to use typedef for structures and pointers.

Besides, using typedef for structures is annoying when you try to make
headers self-contained.

Let's say you have the following function declaration in a header:

  void foo(bd_t *bd);

This is not self-contained since bd_t is not defined.

To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>

  #include <asm/u-boot.h>
  void foo(bd_t *bd);

Then, the include direcective pulls in more bloat needlessly.

If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:

  struct bd_info;
  void foo(struct bd_info *bd);

Right, typedef'ing bd_t is a mistake.

I used coccinelle to generate this commit.

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  typedef bd_t;
  @@
  -bd_t
  +struct bd_info
  </smpl>

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17 09:30:13 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
9b4a205f45 common: Move RAM-sizing functions to init.h
These functions relate to memory init so move them into the init
header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:35 -05:00
Parthiban Nallathambi
d98929d636 imx: sync with kernel device tree for Phycore SoM
Sync the Linux Kernel 5.4-rc6 device tree for Phytec Phycore
SoM and Segin board based on imx6UL and imx6ULL.

Changes includes Phytec naming convention for the devicetree files.

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-01-07 10:26:56 +01:00
Parthiban Nallathambi
921bb8641d imx: initialize fec only when enabled
board early initialize fec ethernet controller pinmux
only when FEC is enabled

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Parthiban Nallathambi
84d5e72ffb imx: remove board specific boot order from spl
boot order was added to handle both SD and eMMC. But commit
14d319b1 introduced to handle both eMMC and SD globally.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Parthiban Nallathambi
a919b6ba37 imx: pcl063: add nand boot support
Booting from NAND needs nandbcb and nand boot device selection

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Yangbo Lu
e37ac717d7 Convert to use fsl_esdhc_imx for i.MX platforms
Converted to use fsl_esdhc_imx for i.MX platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
2019-06-23 14:18:34 +08:00
Parthiban Nallathambi
d2d1191843 imx: Extend PCL063 support for phyCORE-i.MX6ULL SOM
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063)
with eMMC on SoM.

CPU:   Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 38C
Reset cause: POR
Model: Phytec phyBOARD-i.MX6ULL-Segin SBC
Board: PHYTEC phyCORE-i.MX6ULL
DRAM:  256 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial@02020000
Out:   serial@02020000
Err:   serial@02020000
Net:   FEC0

Working:
 - Eth0
 - i2C
 - MMC/SD
 - eMMC
 - UART (1 & 5)
 - USB (host & otg)

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11 10:42:48 +02:00
Parthiban Nallathambi
a443c8212c ARM: dts: i.MX6ULL: U-Boot specific dts for u-boot, dm-spl
u-boot,dm-spl property is specific to U-Boot, so created one
for i.MX6ULL platforms.

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11 10:42:48 +02:00
Martyn Welch
0963060c99 imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on
the PHYTEC phyCORE-i.MX6UL SOM (PCL063).

CPU:   Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 44C
Reset cause: POR
Board: PHYTEC phyCORE-i.MX6UL
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   FEC0

Working:
 - Eth0
 - i2C
 - MMC/SD
 - NAND
 - UART (1 & 5)
 - USB (host & otg)

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-01-28 12:47:27 +01:00