Commit graph

26 commits

Author SHA1 Message Date
Graeme Russ
950eaf6230 arm: mxs: Add debug outputs and comments to mxs SPL source files
It is difficult to track down fail to boot issues in the mxs SPL.
Implement the following to make it easier:
 - Add debug outputs to allow tracing of SPL progress in order to track
where failure to boot occurs. DEUBUG and CONFIG_SPL_SERIAL_SUPPORT must
be defined to enable debug output in SPL
 - Add TODO comments where it is not clear if the code is doing what it
is meant to be doing, even tough the board boots properly (these comments
refer to existing code, not to any code added by this patch)

Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
2015-02-10 12:48:49 +01:00
Marek Vasut
7c604e98c2 arm: mxs: Wait for DRAM to start
Instead of waiting for a fixed period of time and hoping for the best
that the DRAM will start, read back an EMI status register which tells
us exactly when the DRAM started.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-09-29 09:02:16 +02:00
Marek Vasut
be0ecdbed5 arm: mxs: Wait when disabling VDDMEM current limiter
According to i.MX23 datasheet Table 32-17, we must wait for the supply
to settle before disabling the current limiter. Indeed, not waiting a
little here causes the system to crash at times.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-09-29 09:02:16 +02:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Marek Vasut
dd3ecf020e arm: mx23: Fix VDDMEM misconfiguration
The VDDMEM ramped up in very weird way as it was horribly misconfigured.
Instead of setting up VDDMEM in one swipe, let it rise slowly the same
way as VDDD and VDDA in spl_power_init.c and then only clear ILIMIT before
memory gets inited. This makes sure the VDDMEM rises sanely, not jumps up
and down as it did till now.

The VDDMEM prior to this change did this:
     2V0____   .--------2V5
       |    `--'
 0V____|

The VDDMEM now does this:
    2V0_____,-----------2V5
      /
 0V__|

Moreover, VDDIO on MX23 uses 25mV steps while MX28 uses 50mV steps,
fix this difference too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-05-06 10:20:33 +02:00
Fabio Estevam
286a88cf34 mxs: Explain why some mx23 DDR registers are not configured
Put an explanation in the source code as to why some DDR registers do not
need to be configured.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-06 09:55:52 +02:00
Fabio Estevam
26be20fac0 mx23: Operate DDR voltage supply at 2.5V
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage
at the recommended 2.5V voltage level again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-06 09:55:51 +02:00
Fabio Estevam
fb7383a7a2 mxs: spl_mem_init: Change EMI port priority
FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL
as 0x2, which means:

PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-05 17:08:47 +02:00
Fabio Estevam
39a538d992 mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registers
HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per
FSL bootlets code.

mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".

HW_DRAM_CTL8 is setup as the last element.

So skip the initialization of these DRAM_CTL registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-05 17:08:46 +02:00
Fabio Estevam
b0d4bf9f0c mxs: spl_mem_init: Remove erroneous DDR setting
On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18.

Remove this erroneous setting.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-05 17:08:46 +02:00
Fabio Estevam
8a47c997c5 mxs: spl_mem_init: Fix comment about start bit
Start bit is part of HW_DRAM_CTL8 register, so  fix the comment.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-05 17:08:46 +02:00
Fabio Estevam
cdc203682f mx23: Put back RAM voltage level to its original value
commit 5c2f444c9 (mxs: Reset the EMI block on mx23) changed the DDR voltage
level, which causes mx23evk to fail to load a kernel.

Put back the original values, so that mx23evk can boot a kernel again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
2013-04-28 11:06:27 +02:00
Fabio Estevam
b33426caf6 mxs: spl_mem_init: Align DDR2 init with FSL bootlets source
Currently the following kernel hang happens when loading a 2.6.35 kernel from
Freeescale on a mx28evk board:

RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Bus freq driver module loaded
IMX usb wakeup probe
usb h1 wakeup device is registered
mxs_cpu_init: cpufreq init finished
...

Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01
package, the hang does not occur.

Comparing the DDR2 initialization from the bootlets code against the U-boot
one, we can notice some mismatches, and after applying the same initialization
into U-boot the 2.6.35 kernel can boot normally.

Also tested with 'mtest' command, which runs succesfully.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Marek Vasut <marex@denx.de>
2013-03-20 11:05:32 +01:00
Otavio Salvador
89075d3f4f mx23: Document the tRAS lockout setting in memory initialization
Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to
enable the 'Fast Auto Pre-Charge' found in the memory chip. The
setting is applied after memory initialization and it is worth
document it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-03-07 17:22:57 +01:00
Marek Vasut
5c2f444c9b mxs: Reset the EMI block on mx23
The real reason for memory instability was the fact that the EMI block
was gated and not reset throughout the boards' operation. This patch
resets the EMI block properly while also reverts the memory voltage bump.
The memory stability issues were caused by the EMI not being reset properly
and thus there is no longer need to run the memory at higher voltage than
it ought to run at.

This partly reverts 8303ed128a .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-03-07 17:22:56 +01:00
Fabio Estevam
f093088214 mxs: Use __weak annotation to simplify code
Using the __weak annotation can make the code cleaner.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2013-01-28 06:54:19 +01:00
Marek Vasut
8303ed128a mxs: Boost the memory power supply
The memory power supply on MX23 didn't pump out enough juice into
the DRAM chip, thus caused occasional memory corruption. Fix this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-01-28 06:40:38 +01:00
Otavio Salvador
30af6c0bca mxs: Fix the memory init for MX23
The memory init is slightly different on MX23, thus split the memory
init for mx23 and mx28 into different functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:22 +01:00
Otavio Salvador
1ddf386e23 mx23: SPL: Initialize DDR at 133MHz
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:21 +01:00
Otavio Salvador
393ff47ba3 mxs: SPL: Generalize memory initialization
Use a generic 'dram_vals[]' array that has the full initialization
sequence and rename the initialization method so it doesn't has a
frequency on its name.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-07 14:50:02 +01:00
Marek Vasut
a918a53c36 mxs: Staticize SPL functions
The MXS SPL didn't mark local functions "static". Fix it. This also makes the
SPL smaller by roughly 300 bytes.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:29:11 +01:00
Marek Vasut
1230e7bc2d mxs: Properly setup VDDD in power supply setup code
The memory setup code adjusted the VDDD voltage. Remove this adjustment
and configure the VDDD voltage correctly in the power supply setup code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:27:21 +01:00
Otavio Salvador
d7d8a3a150 mxs: Remove not required include of iomux-mx28.h
The iomux-mx28.h include is not required on spl_mem_init.c so it has
been droped.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Otavio Salvador
1e0cf5c34b mxs: Reowork SPL to use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Otavio Salvador
3a0398d7b9 mxs: reorganize source directory for easy sharing of code in i.MXS SoCs
Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to share code
among them.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:17 +02:00
Renamed from arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c (Browse further)