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mxs: spl_mem_init: Change EMI port priority

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FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL
as 0x2, which means:

PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2013-05-03 04:37:13 +00:00 committed by Stefano Babic
parent 39a538d992
commit fb7383a7a2
1 changed files with 1 additions and 1 deletions
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2
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
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@ -287,7 +287,7 @@ static void mx23_mem_init(void)
early_delay(20000);
/* Adjust EMI port priority. */
clrsetbits_le32(0x80020000, 0x1f << 16, 0x8);
clrsetbits_le32(0x80020000, 0x1f << 16, 0x2);
early_delay(20000);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);