Commit graph

5515 commits

Author SHA1 Message Date
Wolfgang Denk
8ae86b76c6 Make STANDALONE_LOAD_ADDR configurable per board
Rename STANDALONE_LOAD_ADDR into CONFIG_STANDALONE_LOAD_ADDR
and allow that the architecture-specific default value gets
overwritten by defining the value in the board header file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Tsi Chung Liew <tsi-chung.liew@freescale.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-04-12 22:58:32 +02:00
Aaron Williams
1472af34c1 Fix min/max macros in include/common.h
There is a bug in the min and max macros in common.h which occurs if
Y is a larger type than X. For example, if Y is a 64-bit value and X
is a 32-bit value then Y will be truncated to 32-bits.  This fix
matches what is done in the Linux kernel but without the additional
type checking present in the kernel version.

Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
2011-04-12 22:58:30 +02:00
Eric Bénard
ee986e2a7d mp2usb: remove board support
this board was cancelled long time ago so remove it as it won't
be maintained anymore

Signed-off-by: Eric Bnard <eric@eukrea.com>
2011-04-11 22:44:02 +02:00
Andreas Huber
91a3c14cd0 ppc, mgcoge: add DIP switch detection
This reads the DIP switch on mgcoge. The DIP switch is connected to
the BFTICU (0x40000089) FPGA. If the DIP switch is set the environment
variable 'actual_bank' is set to 0 and starts the SW in bank0.

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2011-04-11 22:41:37 +02:00
Roy Zang
2c2668f971 Net: Add Intel E1000 82574L PCIe card support
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-11 22:20:13 +02:00
Wolfgang Denk
17e967b3df Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-04-10 21:24:40 +02:00
Wolfgang Denk
a8708a8634 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2011-04-10 21:06:27 +02:00
Priyanka Jain
32c8cfb23c fsl_esdhc: Deal with watermark level register related changes
P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:

9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Shaohui Xie
2a9fab82b7 powerpc/85xx: Add PBL boot from SPI flash support on P4080DS
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.

Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
f378017ffa powerpc/85xx: Update default hwconfig on P1022DS
Set default configuration to have SDHC controller enabled,
AUDIO enabled(codec clock sources is 12MHz) and disable TDM.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
218a758fb9 powerpc/85xx: Enable support for ATI graphics cards on P1022DS
Make the support for ATI graphics cards mutually exclusive with DIU.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Kumar Gala
15321c9c39 powerpc/85xx: Drop CONFIG_VIDEO support on corenet_ds boards
We don't really ever use Video cards on corenet_ds style boards and its
bloating our image which is close the its max size.  Drop support and
also kill some defines for non-PNP PCI which we never use.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-09 12:36:09 -05:00
Matthew McClintock
a3055c587d powerpc/85xx: rename NAND prefixes to CONFIG_SYS
renaming 85xx define CONFIG_NAND_OR_PRELIM to CONFIG_SYS_NAND_OR_PRELIM
and CONFIG_NAND_BR_PRELIM to CONFIG_SYS_NAND_BR_PRELIM to use the more
appropriate CONFIG_SYS prefix as well as be consistent with 83xx.

Signed-off-by: Matthew McClintock <msm@freescale.com>
cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-08 02:50:57 -05:00
Mike Frysinger
d413dbc990 Blackfin: bf548-ezkit: move env sector
U-Boot itself takes up more than 0x40000 bytes, so we can't use that
sector for the environment.  Move it down a page.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
a91eb2c56a Blackfin: adi boards: enable CONFIG_MONITOR_IS_IN_RAM
Our monitor is always in RAM, so enable this define for the CFI layer.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
d633b2dbe4 Blackfin: adi boards: enable ldrinfo
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
dba8cf1b2e Blackfin: adi boards: drop old ELF define
This define isn't used anywhere anymore, so punt it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:27 -04:00
Mike Frysinger
7577aab8a6 Blackfin: bf506f-ezkit: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
d2ab733c05 Blackfin: bf561-ezkit/ibf-dsp561: invert env offset/addr logic
Have CONFIG_ENV_ADDR be based on CONFIG_ENV_OFFSET rather than the other
way around so that we can use CONFIG_ENV_OFFSET during build.  It also
avoids a little address duplication.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
42246c3f21 Blackfin: bf537-minotaur/bf537-srv1: undefine nfs when net is disabled
Fixes a build error due to new partial linking logic.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Chong Huang
dbb6d366e3 Blackfin: bf525-ucr2: new board port
Signed-off-by: Chong Huang <chuang@ucrobotics.com>
Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Andreas Schallenberg
2fc32deab5 Blackfin: dnp5370: new board port
Info about the hardware can be found here:
	http://www.dilnetpc.com/dnp0086.htm

Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
fbcf8e8c75 Blackfin: move CONFIG_BFIN_CPU back to board config.h
This is a revert of 821ad16fa9 as Wolfgang doesn't like the new code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Heiko Schocher
6ee1416e81 mtd, cfi: introduce void flash_protect_default(void)
collect code which protects default sectors in a function, called
flash_protect_default. So boardspecific code can call it too.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:20:22 +02:00
Wolfgang Denk
4db2fa7f94 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Conflicts:
	drivers/usb/host/ehci-pci.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-04-05 12:24:20 +02:00
Timur Tabi
7d3053fbf1 powerpc: clean up DIU macro definitions for Freescale reference boards
Clean up the macro defintions used to enable DIU (video) support on the
MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS,
which is newer.  Add software cursor support to all three boards.

Also document the CONFIG_FSL_DIU_FB in the README.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:32:18 -05:00
Jerry Huang
1ac63e4094 powerpc/85xx: Enable eSDHC boot support on P2020 DS
We implement our own mmc_get_env_addr since the environment variables are
written to just after the u-boot image on SDCard, so we must read the MBR
to get the start address and code length of the u-boot image, then
calculate the address of the env.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:26:32 -05:00
Kyle Moffett
c7fd27ccfb mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements
The numeric constants in the switch statements are replaced by #defines
added to the common ddr_spd.h header.  This dramatically improves the
readability of the switch statments.

In addition, a few of the longer lines were cleaned up, and the DDR2
type for an SO-RDIMM module was added to the DDR2 switch statement.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Jiang Yutang
9899ac1951 powerpc/85xx: Add 36-bit address map support to P1022DS
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Zhao Chenhui
863a3eac23 powerpc/85xx: Add support for ULI1575 PCI EHCI module on MPC8572DS
MPC8572DS provides 2 USB ports with ULI1575. We enable USB storage
device support using PCI EHCI module.

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Zhao Chenhui
5103d7aa23 powerpc/85xx: Disable ECC in considering performance on MPC8572DS
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Zhao Chenhui
1a66f28916 powerpc/85xx: Replace memctl_intlv_ctl with hwconfig on MPC8572DS
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
e0082f7cb4 powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
0c871e952e powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
09f9ee1695 powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Haiying Wang
24995d829a powerpc/85xx: Refactor Qman/Portal support to be shared between SoCs
There are some differences between CoreNet (P2040, P3041, P5020, P4080)
and and non-CoreNet (P1017, P1023) based SoCs in what features exist and
the memory maps.

* Rename various immap defines to remove _CORENET_ if they are shared
* Added P1023/P1017 specific memory offsets
* Only setup LIODNs or LIODN related code on CORENET based SoCs
  (features doesn't exist on P1023/P1017)

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
c39f44dc6f powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board
Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
5df4b0ad0d powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
00203c6464 powerpc/85xx: Remove config.mk for nand linker script
Move the include of mpc85xx/u-boot-nand.lds to utilize
CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Li Yang
ccc4a8d89f powerpc/85xx: Update P2020DS default env settings
Read MAC address from EEPROM. Add hwconfig settings.

Modified the default othbootargs to include the cache-sram-size
parameter. This parameter is needed as the L2 as SRAM is ON by
default in the P2020RDB kernel and used by the Gianfar driver.

Also cleanup some of the boot commands.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Jerry Huang
9c4d8767ed powerpc/85xx: Add eSDHC support on P2020DS
We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9
respectively).

We enable EXT2, FAT, and parition support for both MMC & USB configs.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Daniel Schwierzeck
b38a569901 MIPS: Purple: Remove Purple support
The Purple SoC and eval board are not actively maintained since years.
This patch removes the support completely as aggreed with Wolfgang Denk.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Florian Fainelli
0272c718ba NAND: add support for reading ONFI page table
This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.

This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Prabhakar Kushwaha
b03a466d6c powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe.  Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-29 07:41:37 -05:00
Jiang Yutang
2d7534a344 powerpc/85xx: Enable various errata on P1022/P1013 SoCs
Enable workaround for errata ELBC A001, ESDHC 111 & SATA A001 on
P1022/P1013 SoCs.

Also updated P1022DS config to properly enable CONFIG_FSL_SATA_V2.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-28 09:04:26 -05:00
Wolfgang Denk
c04bf5e9a4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-03-27 21:20:29 +02:00
Tom Warren
05858736f5 arm: Tegra2: Change mach-type to MACH_TYPE_SEABOARD due to mach-types.h update
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-03-27 19:20:30 +02:00
Minkyu Kang
aa44a45f73 S5P: universal: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:08 +02:00
Minkyu Kang
96caf02f60 S5P: goni: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:06 +02:00