Commit graph

72545 commits

Author SHA1 Message Date
Heinrich Schuchardt
41ad972426 doc: imx: psb: fix footnotes
In reStructured text footnotes are referenced like [1]_.

Add missing underscores.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Vasut <marex@denx.de>
2021-04-17 20:01:31 +02:00
Heinrich Schuchardt
b0f569ea4d board: toradex: apalis-imx8x: fix build warning
The length of an underline must match the length of the header.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2021-04-17 20:01:31 +02:00
Patrick Delaunay
ecf1544232 env: sf: remove the static env_flash variable
As the the SPI flash is probed and is released in each ENV sf function
the env_flash no more need to be static.

This patch move this device handle as local variable of each function and
simplify the associated code (env_flash is never == NULL when
setup_flash_device is called).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-16 17:33:33 -04:00
Patrick Delaunay
c2d00364c1 env: sf: add missing spi_flash_free
Free the SPI resources by calling spi_flash_free() in each env sf
function to avoid issue for other SPI users.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-16 17:33:09 -04:00
Patrick Delaunay
25d90ad45a env: sf: add support of command env erase
Add support of opts erase for env in SPI flash;
this opts is used by command 'env erase'.

This command only fills the env offset by 0x0 (bit flip to 0) and
the saved environment becomes invalid (with bad CRC).

It doesn't erase the sector here to avoid issue when the sector
is larger than the env (i.e. embedded when
CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE).

The needed sector erase will be managed in the next "env save" command,
using the opt ".save", before to update the environment in SPI flash.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-16 17:32:52 -04:00
Patrick Delaunay
e41f55b32e env: sf: update the use of macro ENV_SAVE_PTR
Remove CONFIG_IS_ENABLED(SAVEENV) as it is already tested in
the ENV_SAVE_PTR macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-16 17:32:34 -04:00
Patrick Delaunay
1af031ac3e env: add ENV_ERASE_PTR macro
Add ENV_ERASE_PTR macro to handle erase opts and remove the associated
ifdef.

This patch is a extension of previous commit 82b2f41357 ("env_internal.h:
add alternative ENV_SAVE_PTR macro").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-16 17:32:34 -04:00
Marek Vasut
5557eec01c env: Fix invalid env handling in env_init()
This fixes the case where there are multiple environment drivers, one of
them is the default environment one, and it is followed by an environment
driver which does not implement .init() callback. The default environment
driver sets gd->env_valid to ENV_INVALID and returns 0 from its .init()
callback implementation, which is valid behavior for default environment.

Since the subsequent environment driver does not implement .init(), it
also does not modify the $ret variable in the loop. Therefore, the loop
is exited with gd->env_valid=ENV_INVALID and ret=0, which means that the
code further down in env_init() will not reset the environment to the
default one, which is incorrect.

This patch sets the $ret variable back to -ENOENT in case the env_valid
is set to ENV_INVALID by an environment driver, so that the environment
would be correctly reset back to default one, unless a subsequent driver
loads a valid environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
2021-04-16 13:37:07 -04:00
Brandon Maier
2339f01af6 env/fat.c: support redund environment
Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Wolfgang Denk <wd@denx.de>
2021-04-16 13:37:06 -04:00
Martin Fuzzey
9636bf8b2e env: Fix warning when forcing environment without ENV_ACCESS_IGNORE_FORCE
Since commit 0f036bf4b8 ("env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set")
a warning message is displayed when setenv -f is used WITHOUT
CONFIG_ENV_ACCESS_IGNORE_FORCE, but the variable is set anyway, resulting
in lots of log pollution.

env_flags_validate() returns 0 if the access is accepted, or non zero
if it is refused.

So the original code
	#ifndef CONFIG_ENV_ACCESS_IGNORE_FORCE
		if (flag & H_FORCE)
			return 0;
	#endif

was correct, it returns 0 (accepts the modification) if forced UNLESS
IGNORE_FORCE is set (in which case access checks in the following code
are applied). The broken patch just added a printf to the force accepted
case.

To obtain the intent of the patch we need this:
	if (flag & H_FORCE) {
	#ifdef CONFIG_ENV_ACCESS_IGNORE_FORCE
		printf("## Error: Can't force access to \"%s\"\n", name);
	#else
		return 0;
	#endif
	}

Fixes: 0f036bf4b8 ("env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set")

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2021-04-16 11:55:55 -04:00
Brandon Maier
b9c3052fbb env: increment redund flag on read fail
If one of the reads fails when importing redundant environments (a
single read failure), the env_flags wouldn't get initialized in
env_import_redund(). If a user then calls saveenv, the new environment
will have the wrong flags value. So on the next load the new environment
will be ignored.

While debugging this, I also noticed that env/sf.c was not correctly
handling a single read failure, as it would not check the crc before
assigning it to gd->env_addr.

Having a special error path for when there is a single read failure
seems unnecessary and may lead to future bugs. Instead collapse the
'single read failure' error to be the same as a 'single crc failure'.
That way env_check_redund() either passes or fails, and if it passes we
are guaranteed to have checked the CRC.

Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-04-16 11:55:55 -04:00
Rasmus Villemoes
bcb44f62b2 env: add CONFIG_ENV_SECT_SIZE_AUTO
This is roughly the U-Boot side equivalent to commit
e282c422e0 (tools: fw_env: use erasesize from MEMGETINFO ioctl). The
motivation is the case where one has a board with several revisions,
where the SPI flashes have different erase sizes.

In our case, we have an 8K environment, and the flashes have erase
sizes of 4K (newer boards) and 64K (older boards). Currently, we must
set CONFIG_ENV_SECT_SIZE to 64K to make the code work on the older
boards, but for the newer ones, that ends up wasting quite a bit of
time reading/erasing/restoring the last 56K.

At first, I wanted to allow setting CONFIG_ENV_SECT_SIZE to 0 to mean
"use the erase size the chip reports", but that config
option is used in a number of preprocessor conditionals, and shared
between ENV_IS_IN_FLASH and ENV_IS_IN_SPI_FLASH.

So instead, introduce a new boolean config option, which for now can
only be used with ENV_IS_IN_SPI_FLASH. If left off, there's no change
in behaviour.

The only slightly annoying detail is that, when selected, the compiler
is apparently not smart enough to see that the the saved_size and
saved_offset variables are only used under the same "if (sect_size >
CONFIG_ENV_SIZE)" condition as where they are computed, so we need to
initialize them to 0 to avoid "may be used uninitialized" warnings.

On our newer boards with the 4K erase size, saving the environment now
takes 0.080 seconds instead of 0.53 seconds, which directly translates
to that much faster boot time since our logic always causes the
environment to be written during boot.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-04-16 11:55:55 -04:00
Rasmus Villemoes
4da7347d85 env/sf.c: use a variable to hold the sector size
As preparation for the next patch, use a local variable to represent
the sector size. No functional change.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-04-16 11:55:55 -04:00
Aswath Govindraju
e64665fa72 arm: dts: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.

Also, update the itap delay values for all the MMCSD subsystems according
the latest J721e data sheet[2]

[1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
[2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf

Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-04-16 19:09:24 +05:30
Tom Rini
7cb977fd51 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
This adds support for devices with R40 dual rank DRAM, and asymmetric
A64 DRAM devices like the Pinephone/3GB.
Also we enable automatic gzipped kernel support, and allow scripted
DT overlay support. The rest of the patches are cleanups, but also
some sunxi-specific preparatory patches for USB3.0 and improved HDMI
support. The bulk of those changes will go through other trees, though.

Build-tested for all 156 sunxi boards, and boot tested on a A64, A20, R40,
H5, H6 and H616 board. USB, SD card, eMMC, HDMI and Ethernet all work
there (where applicable), with the exception of Ethernet on the H5. Since
this is already broken in v2021.04, I will send a separate fix.
2021-04-16 08:30:25 -04:00
Jernej Skrabec
599177ed51 sunxi: video: select dw-hdmi in Kconfig, not Makefile
Currently sunxi Makefile manually specifies full path to dw-hdmi common
code. However, that is not needed because it can be selected in Kconfig
instead.

Select proper symbol in Kconfig and drop path from Makefile.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Arnaud Ferraris
747c2421c6 sunxi: arm64: Add addresses for compressed kernel load
The "booti" command to load arm64 Linux kernels supports automatic
decompression of zipped kernel images, but relies on some environment
variables to point to usable buffer RAM.

Add those variables and let them point to some default values, that
should cover most use-cases.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Samuel Holland
925cd8d77e sunxi: binman: Do not hardcode U-Boot load address
The FIT description has access to the configuration variables. Use the
appropriate variable instead of hardcoding the address.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Samuel Holland
ed4bc13f3d sunxi: binman: Respect the default FIT configuration
binman can fill in the default FIT configuration index as selected by
the "default-dt" argument, which is set to CONFIG_DEFAULT_DEVICE_TREE.
Let's respect the user's configuration by taking advantage of this
feature, instead of always defaulting to the first device tree in
CONFIG_OF_LIST.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Samuel Holland
fa7eabf650 clk: sunxi: h6: Add XHCI clocks
The XHCI controller has its own clock and reset. Add them.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Samuel Holland
9078b67f3c clk: sunxi: Add a dummy clock driver for the RTC
The 32kHz clock ("LOSC") on sunxi SoCs is provided by the RTC. It is
used, among other things, by the XHCI controller in the H6. To be able
to call clk_get_bulk() on the XHCI controller, some device needs to
provide all referenced clocks.

Since LOSC is a fixed-rate always-on clock, implementation is trivial.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Icenowy Zheng
a5ff6f5c72 sunxi: enable dual rank memory on R40
Previously we do not have proper dual rank memory detection on R40
(because we omitted PIR_QSGATE, which does not work on R40 with our
configuration), and dual rank memory is just simply disabled as early
R40 boards available (Banana Pi M2 Ultra and Berry) have single rank
memory.

As a board with dual rank memory (Forlinx OKA40i-C) is now known to us,
we need to have a way to do memory rank detection to support that board.

Add some routine to detect memory rank by trying to access the memory
in rank 1 and check for error status of the memory controller, and then
enable dual rank memory on R40.

Similar routine can be used to detect half DQ width (which is also
detected by PIR_QSGATE on other SoCs), but it's left unimplemented
because there's no known R40 board with half DQ width now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: Move R40 detect code call into sunxi_dram_init()]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:58 +01:00
Icenowy Zheng
e9dfd8e960 sunxi: support asymmetric dual rank DRAM on A64/R40
Previously we have known that R40 has a configuration register for its
rank 1, which allows different configuration than rank 0. Reverse
engineering of newest libdram of A64 from Allwinner shows that A64 has
this register too. It's bit 0 (which enables dual rank in rank 0
configuration register) means a dedicated rank size setup is used for
rank 1.

Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB
rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank
DRAM support necessary.

Add this support. The code could support both A64 and R40, but because
dual rank detection is broken on R40 now, we cannot really use it on R40
currently.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:58 +01:00
Jernej Skrabec
17d6eceab5 sunxi: add fdtoverlay_addr_r environment variable
Commit 69076dff22 ("cmd: pxe: add support for FDT overlays") added
support for loading DT overlay files to PXE boot. However, it needs
additional environment variable which points to memory location which
can be used to temporary store overlay data.

Add it and in the process unify alignment using spaces and fix comment.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:58 +01:00
Tom Rini
a6232e065d Merge branch '2021-04-14-assorted-vboot-improvements'
- Add ECDSA support to FIT images
- Improve FIT image loadables (incl fpga) support
- Further FIT improvements with SPL
2021-04-15 17:10:25 -04:00
Tom Rini
45b3cf88da Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
update ls1028aqds networking protocol, config in ls1021atwr, env in ls1012a
Add seli3 board support, booke watchdog, update eTSEC support in ppc-qemu
Add DM_SERIAL and lpuart in sl28, add DM_ETH support for some of powerpc platforms

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 13:11:19 -04:00
Tom Rini
b86772eda6 Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Minor fix to Apollo Lake devicetree bindings for FSP
- Refactor Designware PCIe drivers to core and SoC parts
- Add Amlogic Meson Designware PCIe controller driver
2021-04-15 09:19:31 -04:00
Camelia Groza
20830d0c01 configs: T1042D4RDB: enable DM_ETH
Enable DM_ETH and DM_MDIO for the T1042D4RDB.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:27:44 +05:30
Camelia Groza
d640abf9c8 powerpc: dts: t1042d4rdb: add FMan v3 nodes
Add the FMan v3 nodes for the T1042D4RDB. The nodes are copied over with
little modification from the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:27:29 +05:30
Camelia Groza
19d65d1aac powerpc: dts: t1042: add QorIQ DPAA 1 FMan v3 nodes
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T1042 SoC.
The device tree nodes are copied over with little modification
from the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:27:20 +05:30
Camelia Groza
143a5e0dfc configs: T4240RDB: enable DM_ETH
Enable DM_ETH and DM_MDIO for the T4240RDB.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:27:12 +05:30
Camelia Groza
3a25db1753 powerpc: dts: qoriq: update the mdio offsets under the second FMan v3
When two FMan's are present on a board, the MDIO nodes are found at the
same offsets inside each FMan. This causes "non unique device name"
errors when registering the MDIO nodes under the second FMan. Fix this
by updating the offsets of the MDIO nodes to include the parent FMan's
offset.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:26:56 +05:30
Camelia Groza
6aa01e26a2 powerpc: dts: t4240rdb: add FMan v3 nodes
Add the FMan v3 nodes for the T4240RDB. The nodes are copied over with
little modification from the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:26:46 +05:30
Camelia Groza
e9322f6e1d powerpc: dts: t4240: add QorIQ DPAA 1 FMan v3 nodes
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T4240 SoC.
The device tree nodes are copied over with little modification
from the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:26:37 +05:30
Camelia Groza
a24990b6d2 configs: T2080RDB: enable DM_ETH
Enable DM_ETH and DM_MDIO for the T2080RDB.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:26:30 +05:30
Camelia Groza
8092e9d0e0 board: freescale: t208xrdb: fdt fixups under DM_ETH
Disable the FMan mEMAC 5 and 6 nodes from the fdt since they are not
available under the supported RCW. Also disable the associated
"fsl,dpa-ethernet" nodes that reference them.

This is a simplified version of the fdt_fixup_fman_ethernet call for
use under DM_ETH.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:26:21 +05:30
Camelia Groza
20070909fa powerpc: dts: t2080rdb: add FMan v3 nodes
Add the FMan v3 nodes for the T2080RDB. The nodes are copied over with
little modification from the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:26:00 +05:30
Camelia Groza
aec12289af powerpc: dts: t2080: add QorIQ DPAA 1 FMan v3 nodes
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T2080 SoC.
The device tree nodes are copied over with little modification from
the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:25:22 +05:30
Mian Yousaf Kaukab
a98550236f ls1012a: use default scan_dev_for_boot
scan_dev_for_efi is supposed to be called from scan_dev_for_boot.
However, this call is missing for ls1012a boards. As a result EFI
boot doesn’t work. Fix this issue by removing custom definition of
scan_dev_for_boot and use the default definition instead.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
9b3843f8f7 board: sl28: add config to enable console output on SER0
Sometimes it is desireable to have the console output on the first
serial line. Introduce a configuration option for it (in the board
scope).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
6d1ab4a10e board: sl28: enable DM_SERIAL
With all preparations in place, switch over to DM_SERIAL.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
356a3384d0 board: sl28: move DM_* configs to Kconfig
Move the CONFIG_DM_* from the defconfig to the TARGET_SL28 config.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
918c72f3f2 armv8: fsl-layerscape: spl: call spl_early_init()
DM_SERIAL needs both the device tree as well as an early heap. Thus, we
have to call spl_early_init() to initialize the memory allocator and the
setup the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
019438e4fd armv8: fsl-layerscape: spl: add debug UART support
To use the debug UART we have to call debug_uart_init() in the SPL. Do
so as soon as possible.

As an example, here is how you can use it on a LS1028A SoC:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0x21c0500
CONFIG_DEBUG_UART_CLOCK=200000000

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Simon Glass
8ff123a685 freescale: ls1021atwr: Drop use of CONFIG_RESET
It is not recommended to use CONFIG_xxx defines for things which are not
Kconfig options. Rename this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Bin Meng
5b5dd690dd doc: board: qemu-ppce500: Document eTSEC usage
Document how to launch a QEMU session with eTSEC as a network device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Bin Meng
f6e95afc0d ppc: qemu: Enable eTSEC support
QEMU ppce500 target can dynamically instantiate an eTSEC device
if "-device eTSEC" is given to QEMU. This commit enables eTSEC
driver and the required fixed PHY driver to create a usable
network configuration using eTSEC.

Unlike a real world 85xx board that usually stores the eTSEC MAC
address in an EEPROM, CONFIG_NET_RANDOM_ETHADDR is required for
QEMU otherwise U-Boot ethernet initialization complains no valid
ethernet address is set.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Bin Meng
b3398993ba ppc: qemu: Create a virtual memory mapping of the platform bus
QEMU ppce500 target can dynamically instantiate an eTSEC device on
a platform bus if "-device eTSEC" is given to QEMU. It is presented
as a "simple-bus" in the device tree, with an additional compatible
string "qemu,platform".

Let's create a virtual memory mapping for it in misc_init_r(), in
preparation to adding eTSEC support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Bin Meng
ea8971cdde test: dm: Add a test case for simple-bus <ranges>
This adds a test case to verify reading <ranges> of a simple-bus is
working as expected.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Bin Meng
80279fa129 dm: core: Correctly read <ranges> of simple-bus
At present we decode simple bus <ranges> using the following assumption:

- parent #address-cells 1
- child #address-cells 1
- child #size-cells 1

However this might not always be the case.

Update to use fdt_addr_t and fdt_size_t in 'struct simple_bus_plat', and
use fdt_read_ranges() to correctly decode it according to the actual
parent and child #address-cells / #size-cells under a Kconfig option
CONFIG_SIMPLE_BUS_CORRECT_RANGE which can be turned on for any board
that needs it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30