Commit graph

88155 commits

Author SHA1 Message Date
Christian Taedcke
473e5206f0 binman: Add support for externally encrypted blobs
This adds a new etype encrypted.

It creates a new cipher node in the related image similar to the
cipher node used by u-boot, see boot/image-cipher.c.

Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-24 09:34:10 -06:00
Simon Glass
df11aa7d74 binman: Add missing ssl documentation
Rerun 'binman bintool-docs' to regenerate bintools.rst

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-24 09:33:55 -06:00
Simon Glass
a6b44acaf5 binman: Renumber 277...289 TI test files
These have ended up with the same numbers as earlier files. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-24 09:33:55 -06:00
Simon Glass
176f1f68fa binman: Renumber 277_rockchip and 278_mkimage test files
These have ended up with the same numbers as earlier files. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-24 09:33:55 -06:00
Simon Glass
efda8ab201 binman: Tidy up tests for pre-load entry type
Drop the use of a numbered key file since numbering is just for the test
devicetree files. Also adjust the tests to avoid putting a hard-coded
path to binman in the file, using the entry arg instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-24 09:33:55 -06:00
Tom Rini
7177259893 First set of u-boot-atmel fixes for the 2023.07 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmS+Xv0cHGV1Z2VuLmhy
 aXN0ZXZAY29sbGFib3JhLmNvbQAKCRAesx4CDqwvyMgxB/9BTjFfVaglu5+m/kiw
 XEVSJSwe1H3sc5vFlMUYTSAOSF/mzdZIZHXC6THkCU1yfzu9AZXhp4mfRUiNTwth
 w8bvYXm4ZjSxcGPVxVqfThN8iT/SWLpaUC8j7TosP1VKYwzpGmqLyO+ZLu7IwdH+
 /wyXFuYtVQVxmSC6SMNAD5eNtS4O6pufat5e5EkhR2atZ/rhhAYmb9zv3RFuCuSM
 bxqM+4/FqpENaIdMOPk7EbB3S1C5MsJS2b+s1oIRRLfItlLjpQG4nZnuJGRlL/Bg
 mcqYYgHrAnFbLXVOEe5WxMKR1E2fMbtKSlJGpoYO9rSdQRzxGuyRrDm9M77GH2pJ
 0Q/F
 =DT1v
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-fixes-2023.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-atmel fixes for the 2023.07 cycle:

This small fixes set includes the LTO configs for the boards that had
the SPL size up to the limit (sama5d2-based), such that more code can be
added.  It also includes a fix for mmc non-removable.
2023-07-24 10:58:25 -04:00
Tom Rini
590a6cff97 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Set up per-hart stack before any function call
- Sync visionfive2 board DTS with Linux
- Define cache line size for USB 3.0 driver for RISC-V CPU
2023-07-24 10:58:07 -04:00
Zixun LI
e83b6f99fc atmel_sdhci: Force card-detect if MMC_CAP_NONREMOVABLE.
If the device attached to the MMC bus is not removable, set force card-detect
bit to bypass card detection procedure, so card detection pin can be used for
other purposes.

It's also a workaround for SAMA5D2 who doesn't drive CMD if using GPIO for card
detection.

Signed-off-by: Zixun LI <zli@ogga.fr>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-07-24 14:21:00 +03:00
Eugen Hristev
f5b9587449 configs: sama5d2: enable CONFIG_LTO
arm-none-linux-gnueabihf-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram'
arm-none-linux-gnueabihf-ld.bfd: region `.sram' overflowed by 100 bytes

SPL is at limit so to stop seeing above error in built, enable
link time optimizations CONFIG_LTO.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Tested-by: Mihai Sain <mihai.sain@microchip.com>
2023-07-24 14:19:33 +03:00
Stefan Roese
2ac1f5982e configs: at91: sama5d2_icp_mmc: Enable CONFIG_LTO
Adding just a tiny bit more code for sama5d2_icp_mmc leads to a SRAM
image overflow. Fix this by enabling LTO for this board, so that such
changes still can be made to the common U-Boot code.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Tested-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: restrict patch just to CONFIG_LTO]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-07-24 14:18:03 +03:00
Heinrich Schuchardt
6aabe229f8 riscv: define a cache line size for the generic CPU
The USB 3.0 driver xhci-mem.c requires CONFIG_SYS_CACHELINE_SIZE to be set.

Define the cache line size for QEMU on RISC-V to be 64 bytes.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
2023-07-24 13:22:24 +08:00
Chanho Park
9070496794 doc: visionfive2: apply a trailing space to the prompt
Apply the trailing space changes in the guide document.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:22:02 +08:00
Chanho Park
43cefb4934 configs: visionfive2: add a trailing space to prompt
Adds a trailing space to SYS_PROMPT to make it easier to distinguish
between commands and the prompt.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:22:02 +08:00
Xingyu Wu
9adf1cf609 clk: starfive: jh7110: Add of_xlate ops and macros for clock id conversion
Modify the drivers to add of_xlate ops and transform clock id.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:21:16 +08:00
Xingyu Wu
9a12e304dd dt-bindings: clock: jh7110: Modify clock id to be same with Linux
The clock id needs to be changed to be consistent with Linux.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:21:11 +08:00
Xingyu Wu
6c4b50e6de riscv: dts: jh7110: Add clock source from PLL
Change the PLL clock source from syscrg to sys_syscon child node.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:21:06 +08:00
Xingyu Wu
005f9627d0 riscv: dts: jh7110: Add PLL clock controller node
Add child node about PLL clock controller in sys_syscon node.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:21:01 +08:00
Xingyu Wu
2d7a578791 clk: starfive: jh7110: Separate the PLL driver
Drop the PLL part in SYSCRG driver and separate to be a single
PLL driver of which the compatible is "starfive,jh7110-pll".

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:20:44 +08:00
Bo Gan
28ff3f16c4 riscv: setup per-hart stack earlier
Harts need to use per-hart stack before any function call, even if that
function is a simple one. When the callee uses stack for register save/
restore, especially RA, if nested call, concurrent access by multiple
harts on the same stack will cause data-race.

This patch sets up SP before `board_init_f_alloc_reserve`. A side effect
of this is that the memory layout has changed as the following:

+----------------+        +----------------+ <----- SPL_STACK/
|  ......        |        |  hart 0 stack  |        SYS_INIT_SP_ADDR
|  malloc_base   |        +----------------+
+----------------+        |  hart 1 stack  |
|  GD            |        +----------------+ If not SMP, N=1
+----------------+        |  ......        |
|  hart 0 stack  |        +----------------+
+----------------+   ==>  |  hart N-1 stack|
|  hart 1 stack  |        +----------------+
+----------------+        |  ......        |
|  ......        |        |  malloc_base   |
+----------------+        +----------------+
|  hart N-1 stack|        |  GD            |
+----------------+        +----------------+
|                |        |                |

Signed-off-by: Bo Gan <ganboing@gmail.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Leo <ycliang@andestech.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:17:26 +08:00
Tom Rini
be71a05a41 Merge branch '2023-07-22-TI-binman-and-K3-improvements'
- Migrate TI K3 platforms to using binman to generate all images, and
  then improve the platform slightly.
2023-07-23 21:46:05 -04:00
Kamlesh Gurudasani
e5031cc07e configs: am64: Fix booting of fitImage on AM64x
Do not limit the maximum size of the buffer that is used to decompress
the OS image in to, this causes issue while inflating the image, if image
size is greater than the buffer.
Remove CONFIG_SYS_BOOTM_LEN

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 22:07:46 -04:00
Manorit Chawdhry
86fab11024 Kconfig: Enable FIT_SIGNATURE if ARM64
Enabling FIT_SIGNATURE required the old authentication method to be
disabled so disable this for K3 SOCs and enable FIT_SIGNATURE for K3
Platforms.

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
[ cleanup the patch ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 22:07:46 -04:00
Manorit Chawdhry
dfe00b34ce lib: Kconfig: k3: Enable SHA512 for fit signature
We are using our custMpk for signing that is a 4096 bit key, 4096 bit
rsa key requires a SHA512 hashing algorithm to be enabled as per the
source. Even though it is not mandated but this is how it works and is
tested.

Enables SHA512 if fit signature is enabled on K3 platforms.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 22:07:46 -04:00
Manorit Chawdhry
175535758a k3-*-binman: dts: Pack u-boot.dtb instead of soc specific dtb
FIT signature requires the updates to u-boot.dtb and the DTB that we
pack don't get updates with the changes of the signature node.

Pack u-boot.dtb as the default DTB so that the signature node changes
can be reflected in them.

(Note, this is only packaging the primary platform and the secondary
 platform will require manual changes for the FIT signature enablement)

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[ add additional boards that were missing ]
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-21 22:07:46 -04:00
Manorit Chawdhry
d5b1ef30d7 board: ti: keys: add .key and .crt for fit signature signing
Fit signature mechanism through the standards require the presence of
.key and .crt in the folder with the same name, since we are using our
custMpk only for the signing, update the format to that of standards to
be compatible for packaging easily.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 22:07:46 -04:00
Kamlesh Gurudasani
14439cd71c configs: k3: make consistent bootcmd across all k3 socs
Default to common bootcmd that is set across all k3 devices.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-07-21 22:07:45 -04:00
Manorit Chawdhry
53873974a4 include: armv7: Enable distroboot across all configs
Since K3 devices are moving towards distroboot, remove duplicates and
add it in common file to import from.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[trini: Add am65x_evm to this patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-21 22:07:45 -04:00
Manorit Chawdhry
4ae1a2470c env: Make common bootcmd across all k3 devices
This is helpful to go forward with distro_bootcmd as default boot.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:50 -04:00
Andrew Davis
913cea388d arm: k3: Add regex/gsub command handling
The 'gsub' setexpr sub command is using when creating the FIT image
configuration string on K3 devices. Enable this for K3.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:50 -04:00
Andrew Davis
052ad4ad6a configs: Enable setexpr command on TI devices
This is used when building the FIT image configuration string. Enable
it for all FIT using TI platforms.

Signed-off-by: Andrew Davis <afd@ti.com>
[ extend to other k3 boards ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:50 -04:00
Andrew Davis
014e013e78 environment: ti: Make get_fdt_mmc common
Since get_fdt_mmc is common, factor it out into mmc.env and remove
it from each platform env file along with changing the directory path to
reflect the standards. Use it in mmcloados but keep loadfdt
defined in case it is still used by some external uEnv.txt script.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:50 -04:00
Andrew Davis
d8ea68da6b environment: ti: Prefix ARM64 DTB names with directory
In Linux the ARM64 DTSs are stored in vendor directories to help organize
the files and prevent naming collisions. The deployed DTBs will mirror
this and so the vendor prefix should be added to the variable used to
locate these files.

Suggested-by: Ryan Eatmon <reatmon@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21 20:35:50 -04:00
Manorit Chawdhry
a5e8678e0a configs: k3: Remove saved environments
Having saved environments usually causes inconsistencies while in
development workflow. The saved environments conflict with the
default ones that U-boot should be updating during development
but that doesn't happen and the saved environments need to be
reset during bootups to test the changes causing extra debugs.

Remove the saved environments as a default. Environments can always
be re-enabled locally if one does like them or needs them for
some production environment. Optionally, Uenv.txt can also be used on
some of the boot media.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:48 -04:00
Manorit Chawdhry
4ff151b4d4 include: j7*_evm.h: Cleanups to be done
Some miscellaneous cleanups for boards.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 19:37:58 -04:00
Manorit Chawdhry
2bfd63d57b mach-k3: common: correct the calculations for determining firewalls
The background firewall calculations were wrong, fix that to determine
both the background and foreground correctly.

Fixes: 8bfce2f998 ("arm: mach-k3: common: reorder removal of firewalls")

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 19:37:58 -04:00
Kamlesh Gurudasani
40e09b6afb board: ti: am64x: am64x.env: set fdtfile env variable
Set fdtfile env variable similar to other k3 socs.

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21 19:37:57 -04:00
Manorit Chawdhry
0eef2bf36e Kconfig: j721s2: Fix the scratchpad base
Fix the regression that occurred during the alignment of binman series
merges along with these HS fixes that caused silent regression in this.

Fixes: 30a7ee87fd ("Kconfig: j721s2: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region")

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 19:37:57 -04:00
Manorit Chawdhry
44dab78580 arch: mach-k3: security: fix the check for authentication
Fix regression occurred during refactoring for the mentioned commit.

Fixes: bd6a247593 ("arm: mach-k3: security: separate out validating binary logic")

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 19:37:57 -04:00
Tom Rini
f586cdaef9 CI: Make use of buildman requirements.txt
Now that buildman has a requirements.txt file we need to make use of it.

Reviewed-by: Simon Glass <sjg@chromium.org>
[n-francis@ti.com: Adding missing command from .azure-pipelines.yml]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-21 19:36:59 -04:00
Tom Rini
e381b12210 buildman: Create a requirements.txt file
At this point, buildman requires a few different modules and so we need
a requirements.txt to track what modules are needed.

Cc: Simon Glass <sjg@chromium.org>
Cc: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-21 19:36:59 -04:00
Andrew Davis
15432ea611 binman: Overwrite symlink if it already exists
Without this re-building will fail with an error when trying to create
the symlink for the second time with an already exists error.

Signed-off-by: Andrew Davis <afd@ti.com>
[n-francis@ti.com: Added support for test output dir and testcase]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
1ee652ab2f doc: board: ti: Update documentation for binman flow
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and core-secdev-k3. Modify
this to using the binman flow so that user understands how to build the
final boot images.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
8db194d046 k3: tools: config.mk: Update makefile and remove scripts
Since binman is used to package bootloader images for all K3 devices, we
do not have to rely on the earlier methods to package them.

Scripts that were used to generate x509 certificate for tiboot3.bin and
generate tispl.bin, u-boot.img have been removed.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
9da80e7917 arm: k3-am65x-iot2050: Use binman for tispl.bin for iot2050
Move to using binman to generate tispl.bin which is used to generate the
final flash.bin bootloader for iot2050 boards.

Cc: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
6d6228ab8f am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
Support added for HS-SE, HS-FS and GP boot binaries for AM62ax.

HS-SE:
    * tiboot3-am62ax-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am62ax-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am62ax-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by AM62ax requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
01e0127753 am62a: yaml: Add board configs for AM62ax
Added YAML configs for AM62ax

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
ce46f51990 am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
Support added for HS-SE, HS-FS and GP boot binaries for AM62.

HS-SE:
    * tiboot3-am62x-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am62x-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am62x-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by AM62 requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
0eba798b41 am62: yaml: Add board configs for AM62
Added YAML configs for AM62

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
106589aae7 j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
Support has been added for both HS-SE, HS-FS  and GP images.

HS-SE:
    * tiboot3-j721s2-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-j721s2-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-j721s2-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by J721S2 requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
267a4845c9 j721s2: yaml: Add board configs for J721S2
Added YAML configs for J721S2

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00