device tree overlay support requires fdtoverlay_addr_r to be set
before
~~~~~~
Invalid fdtoverlay_addr_r for loading overlays
after
~~~~~
Retrieving file: /boot/overlay/rtc-ds3231.dtbo
Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
On 32-core platform, hart31 gets stuck at secondary_hart_loop
as the corresponding enable bit is not set in enable_ipi().
We should program the next word (0x2f84) which is assigned
as the enable register of hart31. It should be done in the same
way when we invoke riscv_send_ipi() to trigger software interrupt
on hart31.
The following diagram shows the enable bits of the fixed PLICSW
scheme.
Pending regs: 0x1000 x---0---0---0---0------0---0
Pending hart ID: 0 1 2 3 ... 30 31
Interrupt ID: 0 1 2 3 4 ... 31 32
| | | | | | |
Enable regs: 0x2000 x---1---0---0---0-...--0---0---> hart0
| | | | | | |
0x2080 x---0---1---0---0-...--0---0---> hart1
| | | | | | |
0x2100 x---0---0---1---0-...--0---0---> hart2
| | | | | | |
0x2180 x---0---0---0---1-...--0---0---> hart3
. . . . . . .
. . . . . . .
. . . . . . .
0x2f00 x---0---0---0---0-...--1---0---> hart30
| | | | | | |
0x2f80 x---0---0---0---0-...--0---1---> hart31
<-------- word 0 -------><--- word 1 --->
This patch includes some cleanups to macros/functions.
Fixes: ebf11273220a ("riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Randolph <randolph@andestech.com>
CONFIG_NVME=y without CONFIG_NVME_PCI=y does not provide working NVMe
support. Instead of implying CONFIG_NVME we must imply CONFIG_NVME_PCI
which will select CONFIG_NVME.
Fixes: e64db0d92e ("riscv: qemu: Enable e1000 and nvme support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Add to support StarFive watchdog driver. The driver is imported from
linux kernel's drivers/watchdog/starfive-wdt.c without jh7100 support
because there is no support of jh7100 SoC in u-boot yet.
Howver, this patch has been kept the variant coding style because JH7100
can be added later and have a consistency with the linux driver.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
watchdog device.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
commit 239d59a65e ("efi_loader: reconnect drivers on failure")
tried to fix the UninstallProtocol interface which must reconnect
any controllers it disconnected by calling ConnectController()
in case of failure. However, the reconnect functionality was wired in
efi_disconnect_all_drivers() instead of efi_uninstall_protocol().
As a result some SCT tests started failing.
Specifically, BBTestOpenProtocolInterfaceTest333CheckPoint3() test
- Calls ConnectController for DriverImageHandle1
- Calls DisconnectController for DriverImageHandle1 which will
disconnect everything apart from TestProtocol4. That will remain
open on purpose.
- Calls ConnectController for DriverImageHandle2. TestProtocol4
which was explicitly preserved was installed wth BY_DRIVER attributes.
The new protocol will call DisconnectController since its attributes
are BY_DRIVER|EXCLUSIVE, but TestProtocol4 will not be removed. The
test expects EFI_ACCESS_DENIED which works fine.
The problem is that DisconnectController, will eventually call
EFI_DRIVER_BINDING_PROTOCOL.Stop(). But on the aforementioned test
this will call CloseProtocol -- the binding protocol is defined in
'DBindingDriver3.c' and the .Stop function uses CloseProtocol.
If that close protocol call fails with EFI_NOT_FOUND, the current code
will try to mistakenly reconnect all drivers and the subsequent tests
that rely on the device being disconnected will fail.
Move the reconnection in efi_uninstall_protocol() were it belongs.
Fixes: commit 239d59a65e ("efi_loader: reconnect drivers on failure")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
ACPI tables cannot convey memory reservations for ARM and RISC-V.
x86 uses the BIOS E820 table for this purpose. We cannot simply ignore the
device-tree when booting via ACPI. We have to assign EfiReservedMemory
according to the prior stage device-tree ($fdtaddr) or as fallback the
control device-tree ($fdtcontroladdr).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The printf() %pU option decodes GUIDs so it is not necessary to do this
first. Drop the incorrect code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Locate these so that they can be displayed using the 'acpi' command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The current build system embeds the EFI Signature List(ESL)
into the dtb to be used in the EFI capsule authentication.
This ESL file is specified through the CONFIG_EFI_CAPSULE_ESL_FILE
Kconfig option. If CONFIG_EFI_CAPSULE_ESL_FILE is not specified,
U-boot build ends up with failure but the cause of failure is not
easily understandable. Current error message is as follows.
FATAL ERROR: Error reading file into data: Is a directoryCheck /home/ubuntu/src/ledge/u-boot/arch/arm/dts/.synquacer-sc2a11-developerbox.dtb.pre.tmp for errors
make[2]: *** [scripts/Makefile.lib:355: arch/arm/dts/synquacer-sc2a11-developerbox.dtb] Error 1
make[1]: *** [dts/Makefile:44: arch-dtbs] Error 2
make: *** [Makefile:1165: dts/dt.dtb] Error 2
make: *** Waiting for unfinished jobs....
This commit shows the error message that CONFIG_EFI_CAPSULE_ESL_FILE
must be specified when the EFI capsule authentication is enabled, then
terminate the build with error.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Weizhao Ouyang <o451686892@gmail.com>
This is a common typo listed in scripts/spelling.txt. Fix it to match the
patchwork status, which is superseded.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At this point, clang can be used on both 32bit and 64bit targets without
issue. Make note of logic we have that will inform clang of the
architecture to build for.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fix the devicetree used with sandbox. This is needed because the
default (full) devicetree must be used by all phases of boot, with
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We currently use an outdated format 32-bit format for SMBIOS tables.
So we must allocate SMBIOS tables below 4 GiB.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The wdt_start function takes timeout_ms as a parameter and starts the
watchdog with this value. However, when you output the message, it shows
the default timeout value for the watchdog device.
So this patch fixes that part to output the correct timeout value.
Before -->
StarFive # wdt start 3000
WDT: Started watchdog@13070000 without servicing (60s timeout)
After -->
StarFive # wdt start 3000
WDT: Started watchdog@13070000 without servicing (3s timeout)
Fixes: c2fd0ca1a8 ("watchdog: Integrate watchdog triggering into the cyclic framework")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Stefan Roese <sr@denx.de>
As requirement of CR side, QSPI Flash usage via RPC driver shall
be disabled and leaving the control of this module to CR side.
Perform DT modification to disable the RPC SPI.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Do not modify defconfig, modify the DT instead, this way
the RPC SPI can be enabled without recompiling the U-Boot
itself. Update commit message accordingly.]
Use the phandle reference to &rpc node in arch/arm/dts/r8a779g0.dtsi
and remove properties which are already in arch/arm/dts/r8a779g0.dtsi.
No functional change and no resulting DT change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Compiling with CONFIG_USB_XHCI_PCI and CONFIG_PCI=n results in
usb/host/xhci-pci.c:48:(.text.xhci_pci_probe+0x44):
undefined reference to `dm_pci_write_config32
Add the missing Kconfig dependency.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Like Rockchip RK3328 and RK3568, the RK3588 also have a single node to
represent the glue and ctrl for USB 3.0.
Use rk_ops as driver data to select correct ctrl node for RK3588 DWC3.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
USB UFI uses fixed 12-byte commands (as does RBC, which is not
supported), but SCSI does not have this limitation. Use the correct
command block lengths depending on the subclass.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
Some devices like YubiKeys need more time before SET_ADDRESS. The spec
says we need to wait 10ms.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
We need to get the DMA address before incrementing the pointer, as that
might move us onto another segment.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
Now that we always check the return value, just return NULL on timeouts.
We can still log the error since this is a problem, but it's not reason
to panic.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
This isn't going to work, don't pretend it will and then end up timing
out.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
There is currently no codepath to recover from this case. In principle
we could require that the upper layer do this explicitly, but let's just
do it in xHCI when the next bulk transfer is started, since that
reasonably implies whatever caused the problem has been dealt with.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
There is a race where an endpoint may halt by itself while we are trying
to halt it, which results in a context state error. See xHCI 4.6.9 which
mentions this case.
This also avoids BUGging when we attempt to stop an endpoint which was
already stopped to begin with, which is probably a bug elsewhere but
not a good reason to crash.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
If the xHC has a problem with our STOP ENDPOINT command, it is likely to
return a completion directly instead of first a transfer event for the
in-progress transfer. Handle that more gracefully.
We still BUG() on the error code, but at least we don't end up timing
out on the event and ending up with unexpected event errors.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
xhci_wait_for_event returns NULL on timeout, so the caller always has to
check for that. This addresses immediate explosions in this part
of the code when timeouts happen, but not the root cause for the
timeout.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
Update maintainers for Tegra SoC platform. Include device trees
and drivers which contain tegra in the name.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The "i2cbcdev" sneaked in when implementing this function for the
bootcounter use case. Obviously the intention was to use prop_name
instead.
Fixes: b483552773 (i2c: Implement i2c_get_chip_by_phandle())
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
As correct default SYS_CONFIG_NAME value is now set in
board/samsung/axy17lte/Kconfig (in commit "board: samsung: Fix
SYS_CONFIG_NAME configs in axy17lte Kconfig"), the SYS_CONFIG_NAME
option can be safely removed from all a*y17lte defconfigs. That removal
doesn't change resulting .config files.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
There is a couple of issues related to SYS_CONFIG_NAME config in
axy17lte Kconfig.
1. The global SYS_CONFIG_NAME in axy17lte Kconfig overrides
SYS_CONFIG_NAME for all boards specified after this line in
arch/arm/mach-exynos/Kconfig:
source "board/samsung/axy17lte/Kconfig"
Right now it's the last 'source' line there, so the issue is not
reproducible. But once some board is moved or added after this line
the next build error will happen:
GEN include/autoconf.mk.dep
In file included from ./include/common.h:16:
include/config.h:3:10: fatal error: configs/exynos78x0-common.h.h:
No such file or directory
3 | #include <configs/exynos78x0-common.h.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
That's happening because axy17lte Kconfig defines SYS_CONFIG_NAME
option in global namespace (not guarded with any "if TARGET_..."), so
it basically rewrites the correct SYS_CONFIG_NAME defined in the
hypothetical boards which might appear after axy17lte in mach-exynos
Kconfig.
2. Another side of the issue is that SYS_CONFIG_NAME is defined
incorrectly in axy17lte Kconfig:
config SYS_CONFIG_NAME
default "exynos78x0-common.h"
The .h extension should not have been specified there. It's leading
to a build error, as the generated include file has a double '.h'
extension.
3. Each target in axy17lte/Kconfig defines its own SYS_CONFIG_NAME. But
all of those in fact incorrect, as corresponding
include/configs/<CONFIG_SYS_CONFIG_NAME>.h header files don't exist.
4. The global SYS_CONFIG_NAME pretty much repeats the help description
from arch/Kconfig and doc/README.kconfig.
Corresponding defconfig files (a*y17lte_defconfig) fix above issues by
overriding SYS_CONFIG_NAME and correctly setting it to
"exynos78x0-common".
Fix all mentioned issues by removing the incorrect global
SYS_CONFIG_NAME and instead specifying it (correctly) in SYS_CONFIG_NAME
options for each target instead.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 3e2095e960 ("board: samsung: add support for Galaxy A series of 2017 (a5y17lte)")
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
As the address read from device tree is being cast to a pointer, it's
better to use dev_read_addr_ptr() API for getting that address. The more
detailed explanation can be found in commit a12a73b664 ("drivers: use
dev_read_addr_ptr when cast to pointer").
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Just some minor style fixes. No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Get rid of magic numbers in s5p_serial_init() when writing to UART
registers. While at it, use BIT() macro for existing constants when
appropriate.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Use dev_read_u8_default() instead of fdtdec_get_int() to read the "id"
property from device tree, as suggested in [1]. dev_* API is already
used in this driver, so there is no reason to stick to fdtdec_* API.
This also fixes checkpatch warning:
WARNING: Use the livetree API (dev_read_...)
[1] doc/develop/driver-model/livetree.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
It's not really needed here anymore. Remove it, as common.h is going
away at some point.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Documentation
* Add HiSilicon board documentation to HTML docs
* Fix building with Sphinx 6.0
UEFI
* Increase default variable store size to 128K
* Check return value of efi_append_scrtm version
* Create shortened boot options in eficonfig command
Other
* Avoid incorrect error message in mkimage
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Merge tag 'efi-2024-01-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2024-01-rc4
Documentation
* Add HiSilicon board documentation to HTML docs
* Fix building with Sphinx 6.0
UEFI
* Increase default variable store size to 128K
* Check return value of efi_append_scrtm version
* Create shortened boot options in eficonfig command
Other
* Avoid incorrect error message in mkimage
The ChipIdea device controller wasn't properly cleaned up when disabled.
So enabling it again left it in a broken state. The problem occurred for
example when the host unbinds the driver and binds it again.
During the first setup, when the out request is queued, the endpoint is
primed (`epprime`). If the endpoint is then disabled, it stayed primed
with the initial buffer. So after the endpoint is re-enabled, the device
controller and device driver were out of sync: the new out request was
in the driver queue head, yet not submitted, but the "complete" function
was still called, since the endpoint was primed with the old buffer.
With the fastboot function this error led to the (rather confusing)
error message "buffer overflow".
Fixed by clearing the primed buffers with the `epflush` (`ENDPTFLUSH`)
register.
Signed-off-by: Simon Holesch <simon@holesch.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20231120002024.32865-1-simon@holesch.de
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The boot options created by eficonfig should use shortened device-paths to
avoid problems if drives are enumerated in a different sequence.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
