Commit graph

78262 commits

Author SHA1 Message Date
Simon Glass
8cb069ab74 binman: Move cbfs.ObtainContents() down a bit
It is easier to understand this file if reading the entries comes before
obtaining the contents, since that is the order in which Binman proceeds.
Move the function down a bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
3f495f18a7 binman: Update the section documentation
Expand this to explain subclassing better and also to tidy up formatting
for rST.

Fix a few pylint warnings to avoid dropping the score.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
e586f44ea7 binman: Allow control of which entries to read
The ObtainContents() and GetEntryContents() methods in this file read
every single entry in the section. This is the common case.

However when one of the entries has had its data updated (e.g. with
'binman replace') we don't want to read it again from the file. Allow
the entry to be skipped, for this purpose. This is currently done in the
CBFS implementation, so adding it here will allow that to use more of
the entry_Section code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
d34bcdd054 binman: Allow overriding BuildSectionData()
This method is currently marked private. However it is useful to be able
to subclass it, since much of the entry_Section code can be reused. Rename
it.

Also document one confusing part of this code, so people can understand
how to add a test for this case.

Fix up a few pylint warnings to avoid regressing the score.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
b6caf0ebca binman: Drop the filename property in entry_Section
This is not used and does nothing. Drop it.

Add a tweak to avoid reducing the pylint score.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
1e99bc2923 binman: Drop the underscore in _ReadEntries()
This function can be overridden so should not have an underscore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
557693ef7e binman: Correct comments for ReadChildData()
The comment here is incomplete. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
c47383114f binman: Correct init of entry in Entry class
This should not have an underscore. Drop it so that derived classes can
rely on it being set correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
c475decf59 binman: Add a way to obtain the version
Add a -V option which shows the version number of binman. For now this
just uses a local 'version' file. Once the tool is packaged in some way
we can figure out an approach that suits.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
650e5de7d4 binman: Tidy up style in cmdline
Update this file to improve the pylint score a little. The remaining item
is:

   Function name "ParseArgs" doesn't conform to snake_case naming style

which needs some binman-wide renaming.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
40b4d647c6 dtoc: Add support for reading fixed-length bytes properties
Add functions to read a sequence of bytes from the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:22 -07:00
Simon Glass
d866e62917 dtoc: Add support for reading 64-bit ints
Add functions to read a 64-bit integer property from the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:15:43 -07:00
Simon Glass
ff139b6c70 dtoc: Bring in the libfdt module automatically
Use the same technique as with binman to load this module from the U-Boot
tree if available. This allows running tests without having to specify
the PYTHONPATH variable.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:15:43 -07:00
Heinrich Schuchardt
34bee10e00 sandbox: replace putchar(ch) by fputc(ch, stdout)
When compiled with -Og for better debugability u-boot ends up in a stack
overflow using

    gcc (Ubuntu 11.2.0-7ubuntu2) 11.2.0
    GNU Binutils for Ubuntu 2.37

putchar(ch) is defined as a macro which ends up calling U-Boot's putc()
implementation instead of the glibc one, which calls os_putc() ...

Let's use fputc(ch, stdout) instead as fputc() does not exist in U-Boot.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:15:43 -07:00
Alexander Preißner
fe67ba7418 drivers: core: lists: fix for loop index type
* fixes the bug in function bind_drivers_pass that for
CONFIG_CC_OPTIMIZE_FOR_SIZE=n and no entries in the driver_info list,
i.e. n_ents == 0, the processor steps into the first loop iteration
despite the loop condition being false.
* the Xilinx Zynq-7000 device would eventually hang due to an attempted
access to an invalid memory address
* the bug is fixed by changing the type of idx from uint to int

Board: zynq-zybo
Target: ARM
Compiler: arm-none-eabi-gcc 9.2.1

Signed-off-by: Alexander Preissner <fpga-garage@preissner-muc.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:15:43 -07:00
Tom Rini
5b9ee01685 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-net
- Two fixes from Marek for designware and mdio.
2021-12-02 09:58:20 -05:00
Tom Rini
f89615088f Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net into next
- New Broadcom NetXtreme driver
- Support for socat for netconsole
- Felix switch soft reset fix
2021-12-02 07:16:04 -05:00
Tom Rini
cdccb39e37 Merge branch '2021-12-01-assorted-updates' into next
- Have SPL skip length 0 images, some clean-ups related to CONFIG
  symbols and the known list of unmigrated symbols and pinctrl updates.
2021-12-02 07:12:28 -05:00
Thomas Skibo
c0ffc12a70 riscv: Enable SPI flash env for SiFive Unmatched.
Enable saving environment to SPI flash memory on SiFive
Unmatched.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
Thomas Skibo
6a863894ad riscv: Support booting SiFive Unmatched from SPI.
Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
Padmarao Begari
ffb78a7c71 doc: board: Update Microchip MPFS Icicle Kit doc
UART1 use for U-Boot and Linux console instead of UART0 and
UART0 is reserved for Hart Software Services(HSS).

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-12-02 16:43:52 +08:00
Padmarao Begari
5c007d24b9 riscv: Update Microchip MPFS Icicle Kit support
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addresses and default build for SBI_V02.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:52 +08:00
Padmarao Begari
06142d6874 riscv: dts: Split Microchip device tree
The device tree split into .dtsi and .dts files, common
device node for eMMC/SD, enable I2C1, UART1 for console
instead of UART0, enable the DDR 2GB memory and in
that 288MB memory is reserved for fabric buffer.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
Padmarao Begari
0dc0d1e094 i2c: Add Microchip PolarFire SoC I2C driver
Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
Padmarao Begari
0d914ad10d net: macb: Remove Microchip compatible string
Remove the microchip compatible string and default compatible "cdns,macb"
support both 32-bit and 64-bit DMA access.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
Leo Yu-Chi Liang
666da85dc9 board: ae350: Support autoboot from RAM
Add boot command "bootcmd_ram" to support autoboot from RAM.

This feature could be useful at the very initial state of chip design
when there is only a minimal set of peripheral. (e.g. without mmc and mac ..etc)

The kernel image is default to be loaded at 0x2000000 via debug port,
and the following script serves as an example:

spl()
{
	cmd="riscv64-linux-gdb -q \
	-ex \"target remote $host:$port\" \
	-ex \"load\" \
	-ex \"thread apply all set \\\$pc=&_start\" \
	-ex \"thread apply all set \\\$a0=\\\$mhartid\" \
	-ex \"thread apply all set \\\$a1=<dtb address>\" \
	-ex \"restore u-boot.itb binary 0x200000\" \
	-ex \"restore Image binary 0x2000000\" \
	-ex \"c\" \
	spl/u-boot-spl
	"

	echo $cmd
	eval $cmd
}

The address where the kernel is loaded can be altered by
changing the value of KERNEL_IMAGE_ADDR.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-12-02 16:43:45 +08:00
Marek Vasut
3fbd17aadf net: dwc_eth_qos: Enable clock in probe
Enable DWC IP clock in driver probe, so the MII access is possible even
outside of active network transfers. This is particularly useful when
using 'mii' or 'mdio' commands to explore PHY state, neither of which
works with DWMAC currently due to the disabled clock.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:35:44 +02:00
Marek Vasut
8777033722 net: eth-phy: Handle gpio_request_by_name() return value
The gpio_request_by_name() returns zero in case of success, however the
conditional return value check in gpio_request_by_name() checks only for
(ret != -ENOENT) and if the condition is true, returns ret outright.

This leads to a situation where successful gpio_request_by_name() return
leads to immediate successful eth_phy_of_to_plat() return as well, and
to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the
PHY driver operates with valid reset GPIO, but with assert/deassert times
set to default, which is 0, instead of the values from DT. This breaks
PHY reset.

Fix this by checking if return value is non-zero and then for this one
single allowed non-zero return value, -ENOENT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:35:37 +02:00
Bharat Gooty
300761b68d board: brcm-ns3: Load netXtreme firmware
Load NetXtreme firmware in board_init when BNXT_ETH is selected.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>

Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2021-12-02 08:34:01 +02:00
Bharat Gooty
5a5bba053d net: brcm: netXtreme driver
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>

Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2021-12-02 08:34:01 +02:00
Ramon Fried
6d1857c8d5 driver: net: Makefile: order file alphabetically
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:34:01 +02:00
Radu Bulie
8c1a6957b1 drivers: net: Soft reset felix switch core
It turns out that in custom designs if the system is reset
multiple times in conjunction with a slight increase in external
temperature, the felix  switch starts to behave in a strange way:
packets are no longer received on the ENECT interface connected
to the L2switch internal port (the TX side of internal port stops working
or the packets do not reach there. It is not very clear where
the packets remain blocked. None of the counters points to a disruption
in the L2switch)
The issue is not reproducible on NXP reference designs.

It was observed that by adding the switch core reset, the problem
goes aways, even if intensive testing in temperature chambers
is applied.

The current patch performs soft reset on the switch core to ensure proper
operation of the L2switch.

Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Reviewed-by: Ramon  Fried <rfried.dev@gmail.com>
2021-12-02 08:34:01 +02:00
Andy Shevchenko
f0d4607d25 tools/netconsole: Add support for socat
socat is a very powerful tool to work with socets (and not only)
in UNIX systems. Let's add support for it in netconsole.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Ferry Toth <fntoth@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:34:01 +02:00
Michal Simek
b3425a3f4e mtd: spi: Remove SF_DUAL_FLASH symbol from Kconfig
This symbol is not used anywhere in the code. Just enable in couple of
defconfigs but it does nothing that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-02 11:33:01 +05:30
Marek Vasut
846d1d9c11 mtd: cqspi: Wait for transfer completion
Wait for the read/write transfer finish bit get actually cleared,
this does not happen immediately on at least SoCFPGA Gen5.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
2021-12-02 11:10:40 +05:30
Nishanth Menon
6d99f86695 spl: fit: Skip attempting to load 0 length image
When, for various reasons, a bad FIT image is used where a loadable
image is marked as 0 length, attempt is made for a 0 length allocation and
read of 0 byte read operation.

Instead provide warning in log and skip attempting to do such a load.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
2021-12-01 16:28:45 -05:00
Patrick Delaunay
af13df7014 dm: add debug message when failed to select the default pinctrl
Add a message on probe in driver model core when the default
pinctrl selection failed.

This message is displayed only when the pinctrl API is
implemented, i.e. when result is not ENOSYS.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Patrick Delaunay
1c01712ac4 pinctrl: change result for unsupported API
Use the return value ENOSYS for unsupported API
- pinctrl_generic_set_state
- pinctrl_select_state

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Patrick Delaunay
2bd8830dfb scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txt
The helper macro CONFIG_IS_ENABLED and CONFIG_VAL are not real
configurations and they are no more present in u-boot.cfg so they can
be removed in config_whitelist.txt.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Patrick Delaunay
ff062765c2 scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfg
The two helpers macros CONFIG_IS_ENABLED and CONFIG_VAL are defined in
include/linux/kconfig.h but they are not real configurations; they can
be safely removed in the generated configuration file "u-boot.cfg".

This patch simplifies the comparison of this U-Boot configuration file.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Tom Rini
fc47dbb26e Merge branch '2021-12-01-Kconfig-migrations' into next
- Finish converting CONFIG_USE_BOOTCOMMAND, CONFIG_BOOTCOMMAND,
  CONFIG_RAMBOOTCOMMAND, CONFIG_NFSBOOTCOMMAND, all of
  CONFIG_SYS_[BO]R[0-7]_PRELIM, CONFIG_FSL_DDR_BIST and
  CONFIG_FSL_DDR_INTERACTIVE.
2021-12-01 13:32:35 -05:00
Tom Rini
33b02e93ec Convert CONFIG_FSL_DDR_BIST et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_DDR_BIST
   CONFIG_FSL_DDR_INTERACTIVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:11 -05:00
Tom Rini
c7fad78ec0 Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BR0_PRELIM
   CONFIG_SYS_OR1_PRELIM
   CONFIG_SYS_BR1_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR2_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR3_PRELIM
   CONFIG_SYS_OR3_PRELIM
   CONFIG_SYS_BR4_PRELIM
   CONFIG_SYS_OR4_PRELIM
   CONFIG_SYS_BR5_PRELIM
   CONFIG_SYS_OR5_PRELIM
   CONFIG_SYS_BR6_PRELIM
   CONFIG_SYS_OR6_PRELIM
   CONFIG_SYS_BR7_PRELIM
   CONFIG_SYS_OR7_PRELIM

This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms
that can set these values do so.  Add the relevant SYS_BRx_PRELIM_BOOL
to platforms that had not been previously migrated.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:10 -05:00
Tom Rini
970bf8603b Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USE_BOOTCOMMAND
   CONFIG_BOOTCOMMAND
   CONFIG_RAMBOOTCOMMAND
   CONFIG_NFSBOOTCOMMAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:10 -05:00
Tom Rini
7f3934fae5 - add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
 - enable simple framebuffer node for splashscreen for stm32mp1
 - use lower-case hex for address for stm32 MCU and MPU's device tree
 - define LOG_CATEGORY for stmfx pinctrl driver
 - add support for probing bus voltage level translator
 - add custom PHY reset bindings on AV96
 - enable KSZ90x1 PHY driver on DHCOR
 - stm32mp1 DDR update:
   - add DDR read data eye training
   - remove DDR calibration result
   - remove DDR tuning support
   - compute DDR size from DDRCTL registers
 - DHSOM boards:
   - increase USB power-good delay
   - add update_sf script to install U-Boot into SF
   - increase PHY auto-negotiation timeout to 20 seconds
   - fix SoM and board coding strap GPIO handling
   - auto-detect uSD level translator
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmGmTYIcHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pkmcD/9DSz6hmuP0fNPN/WQv
 H1mB97lGu1T1PkilFuVovO/WLp4O+OplVEdTBXgTitbzJruSQ87TzunPW2zRHOV9
 /15oA+XwTxlor0pdg4JZWP+u6C0fusr43iS0nkWQv1mJMesOgWfdqnXsnCSBuMs3
 tKyBXtvXBPYnSQRbUXMs7ln1VyH3YGYz1HBLDdFfBGRRkl3W7F3axKs8rUJzUbys
 /I9L8xvcwL4nPqmGzrxzxMwlPZRKgYdnZjYbBAs3BfLkqT5VENcvrIgN0Y3XDO6v
 Ewe67Plsk3Mk8u1LmesSmA2u7MsizwUmp5jqIrpk9ADeLckv+RzVApLCsB7tP8KE
 e61pD2U1pl+jmYi68rj9RIJU+8vutUkVecGQovymgWpE6yZV7b9DqKIa0Eh7ee73
 ZHSli8EYOKKvKmhwzqSkgqzdAomssR7+kl82d1BFMAcdmzd6mmYV8aAkHCJXbSup
 JR/kyPFSZ+FcJ1kD5nsPZAW4GEg3jvIdiaxYR2fWm8F3QDw4VTbnpnwbJj0nZpfp
 UzwReOQmrj8sHCw7Ngo/nK/6XFvUbrAk8SX52VOfM3VmGYCiyTA3aeWQeFOyZDSH
 xKV8fzMDV+cfU3G7QB9vOw0ebJ7rUpamN67ulNCu2/TEd/XytrEQTRElxlL9g0Xg
 buRXWoIjnFrDK2xC5Z9JdRtfyw==
 =EHmo
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
- enable simple framebuffer node for splashscreen for stm32mp1
- use lower-case hex for address for stm32 MCU and MPU's device tree
- define LOG_CATEGORY for stmfx pinctrl driver
- add support for probing bus voltage level translator
- add custom PHY reset bindings on AV96
- enable KSZ90x1 PHY driver on DHCOR
- stm32mp1 DDR update:
  - add DDR read data eye training
  - remove DDR calibration result
  - remove DDR tuning support
  - compute DDR size from DDRCTL registers
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling
  - auto-detect uSD level translator
2021-12-01 07:22:25 -05:00
Patrick Delaunay
c7c06fa776 board: stm32mp1: add support of nor1 device in dfu command
Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit b7f060565e ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
b2ac9645e6 ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup
Since the commit f42045b2e7 ("stm32mp15: replace CONFIG_TFABOOT when
it is possible") the function stm32mp1_ddr_setup is always called so the
__maybe_unused can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
d72e7bbe7c ram: stm32mp1: compute DDR size from DDRCTL registers
Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.

This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
e84ee40b0b configs: stm32mp15: deactivate the CONFIG_STM32_IPCC
The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.

So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
8ad37e6f16 board: stm32mp1: enable simple framebuffer node for splashscreen
Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.

These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00