Commit graph

78262 commits

Author SHA1 Message Date
Marek Behún
e967c84a6d pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Tom Rini
cfbd2bc695 - enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
   - increase USB power-good delay
   - add update_sf script to install U-Boot into SF
   - increase PHY auto-negotiation timeout to 20 seconds
   - fix SoM and board coding strap GPIO handling
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmG3TqYcHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/puhJEACl9lNg7+0GDd6eoi73
 NR4+r1JYPDkYKbbBWjHVueIwKYbpk1uSzYLB70lchUVbdvu3fczJc7uOXTDRnrCN
 13BuMa45HAWxvb/9UuHz3AnrLEsSvEgGCRCXK0FrE0mu1yBZK+6iO1ysuQEJA78j
 7tyBs6i+IzuAusejx8NiqjYughIFZKBzfztLe3OSxDhEam+vCCEAIUoTx7FSq1jp
 TumZULkfx0SCSL86vPnzczjtucrtKiaWhjNLDbg0Ilf28qYYTCdlDcpi7ySpr43u
 VJTAKAXYVQq4Ye3qsth6GSsTZ1pONBoSaaOo2z/hoQu+/Y4+yUrzkLB+0dSrqgsW
 FPosN9/OPSRcBIfhFEV9RojhHK9OxYXr0WjBctb6fZKzHK52neVv819Ixy5WBJvq
 gXo6jK78ILxzOUx1PzRj2safKhArAuPrxD2Lv0wNKqNCWJJZbT037L6p5CFG30UI
 7yltaYm1ukAT6q6MeergHAAcdgYV+nyFOUs7udQY5HltzLpBJkdIGHKJpioAhvYJ
 KNHMwANd499/edL/FdXXN7X8sfb7ylaUaqDfkHPJgfDDFmF4lQ591k+jWeD8H1lo
 LYUhd4/7EvNAS02fvwmrdTWYCCFyxL1HFxwOlFqrkthFJnJj70shBJsB786pvihq
 wd9npDIUFJGSTCTA4uXCu3YHlA==
 =Qgdj
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm

- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling

# gpg verification failed.
2021-12-13 10:20:25 -05:00
Marek Vasut
5c592b636a ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:22 +01:00
Marek Vasut
98fe251a24 ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:11 +01:00
Marek Vasut
7c870f8d70 ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:04 +01:00
Marek Vasut
e1d7b0b9c5 ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:59 +01:00
Marek Vasut
44beea2845 ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:53 +01:00
Marek Vasut
e8e66801bd ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-12-13 14:33:47 +01:00
Tom Rini
026c010c4a Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- A few clean ups for the RZG2
2021-12-13 07:11:09 -05:00
Hari Prasath
85bffb8185 ARM: mach-at91: update alternate function of signal PD20
The alternate function of PD20 is 4 as per the datasheet of
sama7g5 and not 5 as defined earlier.

Fixes: 558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-12-13 10:11:36 +02:00
Adam Ford
d5f1beb058 configs: beacon-rzg2m: Config to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
dcbf1145e2 ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
61b3a0101a arm: dts: Create common rz-g2-beacon-u-boot file
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other.  Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
1eaf61c84d arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3
The device trees for the Beacon RZ/G2[MNH] boards have undergone
some changes over time, so resync them now.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
182754f43a net: ravb: Support multiple clocks
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Tom Rini
a1c01b17c5 Pull request efi-2022-01-rc4-2
UEFI:
 
 * correctly handle missing TPM device
 * prepare for block devices for U-Boot as EFI app
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmGzHfAACgkQxIHbvCwF
 GsQYeA/+LFCXTVOLWtShHc71kMUdjX5tCnm3LrYEnJgc9fmo2zWD+kSbAWV7RIZG
 WJ1OVkLKw8+O5kvRwW/dxpZVU1fULn/vzVJxoKVM7I48XJ0JbnO9Up3GCl91i+2t
 h55gQ/bmt5LpOvQIAhVqQKfMhJz1fTZV77ZtKKdDKw6oeDGlL5F3WZ0RRGGhSXLY
 pLVKRDTm+B7HvSTth052MVjrfpfkivujDfCO+rYgw3pA4M3MdC51J4gpIWJt2SRz
 q/p3Fc5fU1d47KEJIfDnm6Hv76yZO3aNU6zivQoSfCqDlNYRvbNcWr4VIkvrIn4D
 eugMO5f0lWRqDAItq0bcslHEqLPygNJopHB190n4rPUuUfIs/Iq/x6WGBi632aYr
 utMWqpRrEBGMTLWburl/aZi4+Jsd/zTZsqPzDUC5Ok/KmBvrewq//lWRauRd8GXY
 Ka2hbMX65C9wDabOGLOTE7jDeTQqCNi4/L1Ie3yiZ/Pg83QSYpP+Jt58FyugMMuw
 hEEdqbH1uzVrhksaBxG1vzgkdR64i01kEt2CyOtcJnfzkkCxc2DAAFVcDq5oLbdT
 RCKKdP+To9/D+hvvKMQv7cqjumBUYoeFb8yoJK7UvJehrgXaazO/OSiILjTsA3Lq
 l9CtdorVl0FvLzgqZmoBA1H9ovkJFYswt7vZbY3VXGJuj04mvVI=
 =jVT6
 -----END PGP SIGNATURE-----

Merge tag 'efi-2022-01-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2022-01-rc4-2

UEFI:

* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app

# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2021-12-10 07:58:43 -05:00
Simon Glass
d8063dc373 efi: Add a media/block driver for EFI block devices
Add a block driver which handles read/write for EFI block devices. This
driver actually already exists ('efi_block') but is not really suitable
for use as a real U-Boot driver:

- The operations do not provide a udevice
- The code is designed for running as part of EFI loader, so uses
    EFI_PRINT() and EFI_CALL().
- The bind method probes the device, which is not permitted
- It uses 'EFI' as its parent device

The new driver is more 'normal', just requiring its platform data be set
up in advance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Simon Glass
42b7f4212a efi: Add uclass for devices provided by UEFI firmware
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.

This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.

If the two uclasses can be unified, is left to future redesign.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Simon Glass
2abd8d1c99 efi: Rename UCLASS_EFI and IF_TYPE_EFI
These names are better used for access to devices provided by an EFI
layer. Use EFI_LOADER instead here, since these are only available in
U-Boot's EFI_LOADER layer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
f9b51dcf29 efi_loader: correctly handle no tpm device error
When the TCG2 protocol is installed in efi_tcg2_register(),
TPM2 device must be present.
tcg2_measure_pe_image() expects that TCP2 protocol is installed
and TPM device is available. If TCG2 Protocol is installed but
TPM device is not found, tcg2_measure_pe_image() returns
EFI_SECURITY_VIOLATION and efi_load_image() ends with failure.

The same error handling is applied to
efi_tcg2_measure_efi_app_invocation().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
9e32bf9362 efi_loader: check tcg2 protocol installation outside the TCG protocol
There are functions that calls tcg2_agile_log_append() outside
of the TCG protocol invocation (e.g tcg2_measure_pe_image).
These functions must to check that TCG2 protocol is installed.
If not, measurement shall be skipped.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
54bec17f6b efi_loader: efi_tcg2_register returns appropriate error
This commit modify efi_tcg2_register() to return the
appropriate error.
With this fix, sandbox will not boot because efi_tcg2_register()
fails due to some missing feature in GetCapabilities.
So disable sandbox if EFI_TCG2_PROTOCOL is enabled.

UEFI secure boot variable measurement is not directly related
to TCG2 protocol installation, tcg2_measure_secure_boot_variable()
is moved to the separate function.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Alexander Dahl
446266b024 doc: usage: Fix command in fdt overlay apply sequence
Literally adhering to the docs gave this wrong output:

    U-Boot> setenv fdtaddr 0x87f00000
    U-Boot> fdtaddr $fdtaddr
    Unknown command 'fdtaddr' - try 'help'

Fixes: d80162cfc5 ("doc: Document how to apply fdt overlays")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-09 11:43:25 -08:00
Tom Rini
1530ad5bec Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This fixes two regressions: eMMC operation on boards with WiFi (so using
three MMC devices), and a repeated wrong error message in USB gadget
mode (fastboot, ums).
2021-12-09 08:43:30 -05:00
Andre Przywara
fbd9207e7f sunxi: Remove misleading USB-OTG charger message
The sunxi MUSB glue driver has some code to check for external VBUS
presence when it's going to use the MUSB host mode, and it warns if
there is VBUS provided through the cable (in sunxi_musb_enable()).

This code was apparently copied to the USB gadget detection code
(g_dnl_board_usb_cable_connected()), but here we actually *expect*
external VBUS power, so a warning is wrong and confusing.
So far this message rarely triggered, but a recent patch (6fa41cdd19)
changed this:
===========================
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe90000
A charger is plugged into the OTG
/A charger is plugged into the OTG
\A charger is plugged into the OTG
|A charger is plugged into the OTG
-A charger is plugged into the OTG
....
===========================

Remove the message for the gadget cable detection call, and just return
the status of the VBUS detection, as this is what the callers are after.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-08 23:07:15 +00:00
Andre Przywara
e32dad292a sunxi: dts: Fix typoed eMMC check
Commit 03510bf621 ("sunxi: only include alias for eMMC when mmc2
used") protected the eMMC alias in U-Boot's DT stub the with the
associated Kconfig symbol, but was actually using the wrong name.

Fix the name of the symbol to match what's defined in Kconfig and what
the defconfig files actually use.

Fixes: 03510bf621 ("sunxi: only include alias for eMMC when mmc2 used")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: 5kft@5kft.org
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-08 23:06:56 +00:00
Tudor Ambarus
e87afb6e9d ARM: dts: at91: sama7g5ek: Add QSPI0 node
QSPI0 has a MX66LM1G45G SPI NOR flash connected.
Enable the controller and describe the flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-12-07 12:22:52 +02:00
Tudor Ambarus
79eeb91693 ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes
sama7g5 embedds an OSPI and a QSPI controller:
1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash
   and OctaFlash Protocols Supported.
2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-12-07 12:22:34 +02:00
Tudor Ambarus
2fd1b97f33 spi: atmel-quadspi: Add support for SAMA7G5 QSPI
sama7g5 QSPI has:
1/ One Octal Serial Peripheral Interfaces (QSPI0) Supporting Up to
   200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported
2/ One Quad Serial Peripheral Interfaces (QSPI1) Supporting Up to
   90 MHz DDR/133 MHz SDR

The QSPI controller of SAMA7G5 uses different clock domains, hence extra
synchronization operations must be performed before accessing some
registers. Differentiate between the versions of the IP using has_gclk.
Differentiate between QSPI0 and QSPI1 with has_octal.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-07 08:55:22 +02:00
Tom Rini
6c56bd31b7 binman refactoring to improve section handling
bloblist - allow it to be allocated
 sandbox config-header cleanup
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAmGtgBARHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreZiRggAlOeC1qnl5uEHRwzP/0OHAisek2W2ikZI
 aJeNh1CHCfu5a//W6QInoR4knfYJM1nK5RFapKO83L4E3wzHgoL3u0OgikO2gRdt
 YTl9rFIp6niSntoeP2MmtT1gBPq0kOGj6tD9KIameNLIOCrWgN0/VwVdiH9eXipc
 N/egjGyOkIGoxYnQQaYnujiHMEEf14koFfO+RM9UYIsnm+9jJFiQ5nssm/waTvom
 a18dGjHU1P6UIjMbLyq7QkmoDwpHMiHvK6q0C9BvKRLfW6EvhHFQLjsTOm4KXEmI
 NoKDTkY9RD9c68wJWT4STEMpg0lGYj9S42Db9qI1g7WacLZlCbb6DA==
 =hWWY
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-5dec21a' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

binman refactoring to improve section handling
bloblist - allow it to be allocated
sandbox config-header cleanup

# gpg: Signature made Sun 05 Dec 2021 10:14:24 PM EST
# gpg:                using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg:                issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655  B627 7F17 3A3E 9008 ADE6
2021-12-05 22:42:07 -05:00
Simon Glass
c229cd2b6e ide: Drop ATA_PORT_ADDR
This is not needed anymore. Drop it to simplify the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-05 09:26:26 -07:00
Simon Glass
7ee2016d61 ide: Drop unused CONFIG options
CONFIG_SYS_ATA_PORT_ADDR is not used in the code anymore. Drop it and use
ATA_PORT_ADDR() locally instead.

Drop CONFIG_IDE_RESET_ROUTINE and CONFIG_IDE_SWAP_IO which are also
unused.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:26:26 -07:00
Simon Glass
36cc7bfd54 sandbox: Drop CONFIG_SYS_TIMER_RATE
This is not used by sandbox since it uses driver model for the timer.

Drop it.

Also update the tools_only build to avoid build errors, since it does
actually build U-Boot too. Enable DM so we can use CONFIG_TIMER,
disable EFI_LOADER to avoid an error about board_quiesce_devices() and
disable NET to avoid having to define CONFIG_AVB_BUF_ADDR

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:26:26 -07:00
Simon Glass
6ce2237a40 keyboard: Add a migration message
A few boards still use the old keyboard mechanism. Set a deadline for them
to update to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:26:26 -07:00
Simon Glass
93e1edffb0 Convert CONFIG_KEYBOARD to Kconfig
This converts the following to Kconfig:
   CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:26:26 -07:00
Simon Glass
5ae2578a55 Convert CONFIG_SYS_FDT_LOAD_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FDT_LOAD_ADDR

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:23:15 -07:00
Simon Glass
32c8566f13 sandbox: Drop CONFIG_HOST_MAX_DEVICES
This can go in the related header file. Drop the CONFIG option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-05 09:23:15 -07:00
Simon Glass
89050244c4 trace: sandbox: Use only the Kconfig options
At present there are Kconfig options for tracing, but sandbox uses
plain #defines to set them. Correct this and make the tracing command
default to enabled so that this is not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:23:15 -07:00
Simon Glass
5bf8121646 binman: Rename _ReadSubnodes() to ReadEntries()
This method name is more commonly used for this function. Use it
consistently.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:23:15 -07:00
Simon Glass
cc2c500426 binman: Support lists of external blobs
Sometimes it is useful to have a list of related external blobs in a
single entry. An example is the DDR binaries used by meson. There are
9 files in total. Add support for this, so we don't have to have a
separate entry for each.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:23:15 -07:00
Simon Glass
1b5a5331f3 dtoc: Add support for reading string-list properties
Add a function to read a list of strings from the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:22:41 -07:00
Simon Glass
943bf78a48 binman: Allow extracting a file in an alternative format
In some cases entries encapsulate other data and it is useful to access
the data within. An example is the fdtmap which consists of a 16-byte
header, followed by a devicetree.

Provide an option to specify an alternative format when extracting files.
In the case of fdtmap, this is 'fdt', which produces an FDT file which can
be viewed with fdtdump.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:22:41 -07:00
Simon Glass
858436dfda binman: Allow listing an image created by a newer version
If an older version of binman is used to list images created by a newer
one, it is possible that it will contain entry types that are not
supported. At present this produces an error.

Adjust binman to use a plain 'blob' entry type to cope with this, so the
image can at least be listed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:21:44 -07:00
Simon Glass
7945077f79 binman: Allow providing tools and blob directories
At present it is necessary to symlink files containing external blobs into
the U-Boot tree in order for binman to find them. This is not very
convenient.

Add two new environment/Makefile variables to help with this. Add
documentation as well, fixing a related nit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:21:44 -07:00
Simon Glass
d5b6e91ba2 bloblist: Support allocating the bloblist
Typically the bloblist is positioned at a fixed address in memory until
relocation. This is convenient when it is set up in SPL or before
relocation.

But for EFI we want to set it up only when U-Boot proper is running. Add
a way to allocate it using malloc() and update the documentation to cover
this aspect of bloblist.

Note there are no tests of this feature at present, nor any direct testing
of bloblist_init().

This can be added, e.g. by making this option controllable at runtime.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:21:44 -07:00
Tom Rini
558002a0f2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-12-03 09:02:49 -05:00
Simon Glass
e2f0474b05 binman: Rename testCbfsNoCOntents()
Use a lower-case O as was intended.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
7413321a47 binman: cfbs: Refactor ObtainContents() for consistency
Update this to use the same arguments as entry_Section uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
3fc20fd805 binman: cbfs: Refactor the init process
Update the constructor to work in the recommended way, where the node
properties are read in a separate function. This makes it more similar to
entry_Section.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00
Simon Glass
080f859cf1 binman: Use normal entries in cbfs
This currently uses _cbfs_entries[] to store entries. Since the entries
are in fact valid etypes, we may as well use the same name as
entry_Section uses, which is _entries. This allows reusing more of the
code there (in a future patch).

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-02 09:16:30 -07:00