Commit graph

95 commits

Author SHA1 Message Date
Stefan Roese
7e4a0d25ed ppc4xx: Enable ECC on LWMON5
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.

We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 11:01:49 +01:00
Stefan Roese
14f73ca679 ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.

This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:

CHIP_11: End of memory range area restricted access.
Category: 3

Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.

Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.

Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.

This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia

The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:

PMC440.h:
/* esd expects pram at end of physical memory.
 * So no logbuffer at the moment.
 */

It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:12:07 +01:00
Yuri Tikhonov
3d61018643 The patch introduces the alternative configuration of the log buffer for the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory), the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ..., PPC440EPX_GPT0_COMP5).
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).

 The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
0f009f781b Add support for the lwmon5 board reset via GPIO58.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
8f15d4addd The patch adds new POST tests for the Lwmon5 board. These are:
* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:47 +01:00
Yuri Tikhonov
2d991958b1 The patch introduces the alternative configuration of the log buffer for
the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory),
the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ...,
PPC440EPX_GPT0_COMP5).

 To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).

 The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:24 +01:00
Yuri Tikhonov
ff818b21b0 Add support for the lwmon5 board reset via GPIO58.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:24 +01:00
Yuri Tikhonov
65b20dcefc The patch adds new POST tests for the Lwmon5 board.
These are:

* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Detlev Zundel
d8ab58b212 Replace "run load; run update" with conditionalized "run load update".
The latter version stops when "run load" fails for whatever reasons
rendering the combination *a lot* more secure.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-03-06 17:35:40 +01:00
Yuri Tikhonov
2e721094a7 lwmon5: enable hardware watchdog
Some boards (e.g. lwmon5) may use rather small watchdog intervals, so
causing it to reboot the board if U-Boot does a long busy-wait with
udelay(). Thus, for these boards we have to restart WD more
frequently.

This patch splits the busy-wait udelay() into smaller, predefined,
intervals, so that the watchdog timer may be resetted with the
configurable (CONFIG_WD_PERIOD) interval.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-02-22 15:54:34 +01:00
Wolfgang Denk
58d204256c LWMON5: enable hush shell as command line parser
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-16 00:01:01 +01:00
Anatolij Gustschin
d610a60730 ppc4xx: Rework Lime support for lwmon5
Rework Lime support for lwmon5 using new video driver

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-01-11 15:51:42 +01:00
Stefan Roese
8f24e0637a ppc4xx: Change LWMON5 to not use OCM for init-ram and POST anymore
This patch configures the LWMON5 port to use d-cache as init-ram and
the unused GPT0_COMP6 as POST WORD storage.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-09 10:28:20 +01:00
Stefan Roese
42d55ea0bd ppc4xx: Move virtual address of POST cache test to bigger address
On Sequoia & LWMON5 the virtual address of the POST cache test is now
moved to a bigger address. This enables usage of more memory on those
boards.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:35 +01:00
Stefan Roese
aee747f19b ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platforms
- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE
- Cleanup of the 4xx GPIO functions
- Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h

Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-15 14:23:55 +01:00
Stefan Roese
d25dfe08fb ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore.
These are now defined in common headers.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
20d500d531 ppc4xx: lwmon5: Some further GPIO config changes
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-23 10:17:42 +02:00
Stefan Roese
87c1833a39 ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yet
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-02 11:44:19 +02:00
Stefan Roese
636538c520 Merge branch 'master' of /home/stefan/git/u-boot/lwmon5 2007-09-27 13:48:24 +02:00
Stefan Roese
3e954beb61 ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test)
Signed-off-by: Stefan Roese <sr@denx.de>
2007-09-27 13:46:22 +02:00
Stefan Roese
04625764cc ppc4xx: Change lwmon5 default environment to support Linux RTC
The Linux PCF8563 RTC driver doesn't do autoprobing, so we need
to supply the RTC I2C address as bootline parameter. This patch
adds support for this rtc probing parameter to the bootargs:

"rtc-pcf8563.probe=0,0x51"

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-29 16:31:18 +02:00
Stefan Roese
75e1a84d48 ppc4xx: Add RTC POST test to lwmon5 board configuration
Since this RTC POST test is taking quite a while to complete
it's only initiated upon special keypress same as the complete
memory POST.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-24 15:41:42 +02:00
Stefan Roese
d7bfa62003 ppc4xx: Change GPIO signal for watchdog triggering on lwmon5
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-24 15:19:10 +02:00
Stefan Roese
c25dd8fc25 ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 board
This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
board. Now the "eeprom" command can be used to read/write from/to this
device. Additionally a new command was added "eepromwp" to en-/disable
the write-protect of this 2nd EEPROM.

The 1st EEPROM is not affected by this write-protect command.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-23 11:02:37 +02:00
Stefan Roese
c64fb30e4c ppc4xx: Remove unused option CFG_INIT_RAM_OCM
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-22 08:56:09 +02:00
Stefan Roese
93f7983460 Merge with /home/stefan/git/u-boot/u-boot-ppc4xx 2007-08-21 16:33:33 +02:00
Stefan Roese
3ad6387873 ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based)
This patch adds support for the matrix keyboard on the lwmon5 board.
Since the implementation in the dsPCI is kind of compatible with the
"old" lwmon board, most of the code is copied from the lwmon
board directory.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-21 16:27:57 +02:00
Kim Phillips
79f240f7ec lib_ppc: make board_add_ram_info weak
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.

this consequently eliminates CONFIG_ADD_RAM_INFO.

Thanks to Stefan for the hint.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-18 21:39:46 +02:00
Stefan Roese
3b3bff4cbf Merge with git://www.denx.de/git/u-boot.git 2007-08-14 16:36:29 +02:00
Stefan Roese
3e4c90c623 ppc4xx: Update lwmon5 POST configuration
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-10 08:42:55 +02:00
Andy Fleming
6bf6f114dc Merge branch 'testing' into working
Conflicts:

	CHANGELOG
	fs/fat/fat.c
	include/configs/MPC8560ADS.h
	include/configs/pcs440ep.h
	net/eth.c
2007-08-03 02:23:23 -05:00
Stefan Roese
ea9f6bce38 ppc4xx: Update 440EPx lwmon5 board support
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 08:37:01 +02:00
Anatolij Gustschin
b66091de6c ppc4xx: lwmon5: Update Lime initialization
Change Lime SDRAM initialization to now support 100MHz and
133MHz (if enabled). Also the framebuffer is initialized to
display a blue rectangle with a white border.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-26 15:08:01 +02:00
Stefan Roese
9f24a808f1 ppc4xx: lwmon5: Support for 128 MByte NOR FLASH added
The used Intel NOR FLASH chips have internally two dies, and are now
treated as two seperate chips.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-24 09:52:52 +02:00
Pavel Kolesnikov
531e3e8b83 POST: Add ECC POST for the lwmon5 board
This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.

Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
2007-07-20 15:03:03 +02:00
Jon Loeliger
079a136c35 include/configs/[p-z]* + misc: Cleanup BOOTP and lingering CFG_CMD_*.
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.

Remove lingering references to CFG_CMD_* symbols.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-10 10:12:10 -05:00
Jon Loeliger
a22d4da95e include/configs: Catch some CONFIG_CMD_* conversion stragglers.
Use new CONFIG_CMD_* in lwmon5.h board config file.
Fix CONFIG_CMD_* typo braindamage in omap1510inn.h

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-08 16:06:39 -05:00
Stefan Roese
334043f601 ppc4xx: Update lwmon5 default environment
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-06 12:26:51 +02:00
Stefan Roese
5d187430a0 ppc4xx: Update lwmon5 board
Add unlock=yes environment variable to default variables to unlock
the CFI flash by default.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-06 11:48:24 +02:00
Stefan Roese
04e6c38b76 ppc4xx: Update lwmon5 board
- Add optional ECC generation routine to preserve existing
  RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-04 10:06:30 +02:00
Stefan Roese
e4feb7638c Merge with git://www.denx.de/git/u-boot.git 2007-06-25 20:20:30 +02:00
Stefan Roese
466fff1a7b ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 15:57:39 +02:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Stefan Roese
e73846b7cf [ppc4xx] Change lwmon5 port to work with recent 440 exception rework
Now CONFIG_440 has to be defined in all PPC440 board config files.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 11:33:41 +02:00
Stefan Roese
b765ffb773 [ppc4xx] Add initial lwmon5 board support
This patch adds initial support for the Liebherr lwmon5 board euqipped
with an AMCC 440EPx PowerPC.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 08:18:01 +02:00