Commit graph

45 commits

Author SHA1 Message Date
Peng Fan
993274f485 arm: dts: imx7: sync with Linux
Sync with Linux commit 308ac756("Merge tag 'gpio-v4.11-3'").

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:33 +02:00
Álvaro Fernández Rojas
969ebdb930 mips: bmips: add bcm6345-clk driver support for BCM63268
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
5b14e13c24 mips: bmips: add bcm6345-clk driver support for BCM6328
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
70789bd2a5 mips: bmips: add bcm6345-clk driver support for BCM6358
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
maxims@google.com
3b95902d47 aspeed: Add support for Clocks needed by MACs
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.

The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.

The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.

So, the network driver would only need to enable these clocks, no need
to configure the rate.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:35 -04:00
Icenowy Zheng
e267d94011 sunxi: add DTSI file for V3s
As we have now V3s support in board code, the V3s DTSI file should also
be added.

Add also some CCU include headers to satisfy the DTSI file.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21 09:23:27 +02:00
Tom Rini
af1b7286d8 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2017-04-14 09:05:46 -04:00
Heiner Kallweit
a3b02a1d49 arm: dts: update Meson GXBB / Odroid-C2 DT with recent Linux version
As a prerequisite for adding a Meson GX MMC driver update the
Meson GXBB / Odroid-C2 device tree in Uboot with the latest
version from Linux.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
2017-04-14 15:16:06 +09:00
Peng Fan
2cc416a836 imx: mx6slevk: introduce device tree support
Introduce device tree support.
dts from kernel commit c4f3f22edd Merge tag 'linux-kselftest-4.11-rc1'

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-03-20 19:00:43 +01:00
Tom Rini
02ccab1908 Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/bk4r1_defconfig
	configs/colibri_vf_defconfig
	configs/pcm052_defconfig
	include/configs/colibri_vf.h
	include/configs/pcm052.h
2017-03-19 15:13:38 -04:00
Peng Fan
fa2f20d3c0 arm: dts: add i.MX7ULP dtsi file
Add i.MX7ULP dtsi file.
Add clock and pinfun header files.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-03-17 09:27:08 +01:00
Kever Yang
e94ffee335 rockchip: rk3328: add device tree file
Add dts binding header for rk3328, files origin from kernel.

Signed-off-by: William Zhang <william.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:46 -06:00
Heiko Stübner
7b2500babd rockchip: rk3188: Add rk3066/rk3188 clock bindings
Bring in required device clock binding files from Linux.
The clock trees for rk3066 and rk3188 are largely similar, which makes
them share the common parts in a shared header. While we focus on rk3188
for now, bring in both headers already for completeness sake.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16 16:03:45 -06:00
Kever Yang
5ae2fd9724 rockchip: clk: rk3399: update driver for spl
Add ddr clock setting, add rockchip_get_pmucru API,
and enable of-platdata support.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag and fix pmuclk_init() build warning:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:43 -06:00
Patrice Chotard
51cb23d452 STiH410-B2260: Add device tree
This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-14 20:40:21 -04:00
Tom Rini
43ade93bdb Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-02-01 16:34:25 -05:00
maxims@google.com
14e4b14979 aspeed: Add basic ast2500-specific drivers and configuration
Clock Driver

This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.

SDRAM MC driver

The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.

The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-28 14:04:29 -05:00
Peng Fan
6301e6570b imx: mx6sx: add dts for mx6sxsabreauto board
Add dts for mx6sxsabreauto board.
dts related files imported fro Linux (commit e5517c2a5a4).

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-01-27 10:52:10 +01:00
Jagan Teki
b8ad70f706 arm: dts: Add devicetree for i.MX6UL
Add i.MX6UL dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-12-16 17:16:10 +01:00
Patrick Bruenn
98d62e618b arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC
Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.

The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2016-12-16 12:57:12 +01:00
Peng Fan
3445373691 arm: dts: add i.MX6SLL device tree
Add i.MX6SLL device tree.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-12-16 11:38:24 +01:00
Fabian Vogt
715dad6d7e fdt: add dt-bindings for bcm2835
This patch adds dt-bindings as used by the linux kernel device trees
for the bcm283x family.

Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-28 20:09:48 -05:00
Jagan Teki
9a08025958 dt-bindings: clock: imx6qdl: Add clock defines
Add imx6qdl clock header defines support from Linux.

"clk: imx: Add clock support for imx6qp"
(sha1: ee36027427c769b0b9e5e205fe43aced93d6aa66)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26 16:53:16 +02:00
Peng Fan
fa7209117b dt-bindings: add i.mx6ul clock header
Add i.mx6ul clock header, copied from kernel commit (29b4817d401).
i.MX6ULL reuse the file in Linux Kernel, so let's keep the same.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
2016-10-04 15:41:01 +02:00
Stephen Warren
ee562dc34e ARM: tegra: pull Tegra210 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.

Main changes:
* Brought in the correct Tegra210 CAR binding; the old file in U-Boot
  appears to be a renamed version of the Tegra124 bindings rather than
  the real Tegra210 version.
* Conversion of SPI and UART nodes to standard DMA bindings. U-Boot
  doesn't use DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
  information required by U-Boot, so U-Boot is not affected.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot, including separation of the
  Tegra LIC (Legacy IRQ controller) and GIC.
* Node sort order fixes.

Remaining deltas relative to the Linux DT:
* U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet.
* The GPIO node compatible value in the kernel explicitly includes
  Tegra124 values whereas U-Boot does not. I'll send a kernel patch to
  correct this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:02 -07:00
Stephen Warren
5c31e7abb4 ARM: tegra: pull Tegra114 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.

Main changes:
* Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
  DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
  information required by U-Boot, so U-Boot is not affected.
* Boards need to define the clk32k_in clock that feeds the Tegra PMC.
* Addition of tegra114-mc.h since tegra114.dtsi now includes it.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot.
* Node sort order fixes.

Remaining deltas relative to the Linux DT:
* USB node compatible values in U-Boot explicitly list Tegra114 values
  whereas the kernel does not. I'll send a kernel patch to correct this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:02 -07:00
Stephen Warren
ce2f2d2ae7 ARM: tegra: pull Tegra30 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.

Main changes:
* Modification of PCIe memory region addresses. The HW memory layout is
  programmable, so this should work fine, and Beaver PCIe was tested
  without issue.
* Removal of pcie_xclk from the PCIe node and clock binding header. This
  clock doesn't exist and isn't used; only a reset with this ID exists.
* Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
  DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
  information required by U-Boot, so U-Boot is not affected.
* Changed the phy_type value for the second USB port. This required board
  DTs to be updated to keep the same configuration.
* Boards need to define the clk32k_in clock that feeds the Tegra PMC.
* Addition of tegra30-mc.h since tegra30.dtsi now includes it.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot.
* Node sort order fixes.

Remaining deltas relative to the Linux DT:
* None.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:02 -07:00
Stephen Warren
50a303bdfa ARM: tegra: pull Tegra20 SoC DT from Linux v4.7
This brings in a few minor fixes since the last sync. The largest change
is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock
doesn't actually exist.

Remaining deltas:
* Addition of u-boot,dm-pre-reloc property to a couple of nodes.
* Addition of the NAND controller, which Linux doesn't yet support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:02 -07:00
Paul Burton
dd7c749474 clk: boston: Providea simple driver for Boston board clocks
Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rates are fixed by the bitfile flashed in the boards FPGA, and this
driver simply reads the rates of these 2 clocks.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-21 15:04:32 +02:00
Hans de Goede
860fbdd41f sunxi: Sync dts files with upstream kernel
Sync dts files with the current (Aug 18th 2016) state of Maxime's
linux/sunxi/for-next repo.

Note this commit also updates configs/MSI_Primo81_defconfig,
adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary
because the tablet does not have a reachable uart so the dts sync
drops its serial0 alias.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-08-26 16:58:36 +02:00
Stephen Warren
7b9cb49405 ARM: tegra: add BPMP DT bindings
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. These bindings dictate how to represent the BPMP in device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-04 13:36:58 -07:00
Kever Yang
777c834fd4 dts: add support for Rockchip rk3399 soc
These files are from kernel upstream:
"649a371 Add linux-next specific files for 20160616"
with some modification need by U-Boot:
- chosen with stdout-path to uart2.
- add clock-frequency for uart2

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:45 -06:00
Simon Glass
6f9678567a arm: at91: dts: Bring in device tree file for AT91SAM9G45
Add this file from Linux v4.5.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12 23:49:38 +02:00
Simon Glass
7b0789e8fc dts: Add clock and regulator binding files for max77802
These are used by peach_pit and peach_pi. Add them so they can be referenced
in the device tree files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-05-25 13:25:18 +09:00
Thomas Abraham
166097e877 clk: exynos: add clock driver for Exynos7420 Soc
Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
are added in this initial version of the driver.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-05-25 10:00:18 +09:00
Peter Griffin
9122109ad7 ARM: hisilicon: hikey: Add hikey & hi6220 dts from v4.6-rc3.
Import the upstream kernel dts into U-Boot. Currently
only serial is supported, but a lot more DT changes are
queued for v4.7.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:10:31 -04:00
Hans de Goede
4bb656e9dd include/dt-bindings: Sync some files with the kernel
This commit syncs the dt-bindings/input/* headers with the kernel (v4.5)
and adds dt-bindings/clock/sun4i-a10-pll2.h, both are necessary for newer
sunxi dts files to build.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 22:04:13 +01:00
Simon Glass
f4abbee3ae tegra: dts: Sync up the tegra124 device tree files with Linux
Sync up these files with Linux v4.4.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16 09:17:50 -07:00
Purna Chandra Mandal
a0e7908326 drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.
PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers
and dividers capable of supplying clock to various controllers
on or off-chip.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01 22:14:00 +01:00
huang lin
fc0fada094 rockchip: Bring in RK3036 device tree file includes and bindings
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
Simon Glass
344c837686 rockchip: Bring in RK3288 device tree file includes and bindings
Bring in required device tree files from Linux. Since mainline Linux is
somewhat behind, use the files from the Chromium tree. We can re-sync once
further code is acccepted upstream.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:23 -06:00
Tom Warren
6c43f6c8d9 ARM: Tegra210: Add SoC code/include files for T210
All based off of Tegra124. As a Tegra210 board is brought
up, these may change a bit to match the HW more closely,
but probably 90% of this is identical to T124.

Note that since T210 is a 64-bit build, it has no SPL
component, and hence no cpu.c for Tegra210.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-28 10:30:19 -07:00
Thierry Reding
a1811bc5b9 ARM: tegra: Add Tegra30 PCIe device tree node
Add the device tree node for the PCIe controller found on Tegra30 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-12-18 13:19:21 -07:00
Thierry Reding
65d2465d5d ARM: tegra: Add Tegra20 PCIe device tree node
Add the device tree node for the PCIe controller found on Tegra20 SoCs.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-12-18 13:19:20 -07:00
Simon Glass
c369139234 tegra: dts: Add serial port details
Some Tegra device tree files do not include information about the serial
ports. Add this and also add information about the input clock speed.

The console alias needs to be set up to indicate which port is used for
the console.

Also add a binding file since this is missing.

Series-changes; 5
- Add full serial port nodes from Linux tree (commit fc9d4dbe)
- Use /chosen/stdout-path instead of /aliases/console to specify the console

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:02 -06:00