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50402 commits

Author SHA1 Message Date
Jernej Skrabec
a05a45493d sunxi: Enable DM_I2C for A64/H3/H5
This commits enable DM I2C support for A64/H3/H5 SoCs.

It is not enabled globaly for all sunxi SoCs, because some boards use
PMICs which are connected through I2C. In order to keep same
functionality, PMIC drivers needs to be ported to DM too.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28 09:19:07 +02:00
Jernej Skrabec
a8f01ccff2 sunxi: i2c: Add support for DM I2C
This commit adds support for DM I2C on sunxi platform. It can coexist
with old style sunxi I2C driver, because it is still used in SPL and
by some SoCs.

Because sunxi platform doesn't yet support DM clk, reset and pinctrl
driver, workaround is needed to enable clocks and set resets and
pinctrls. This is done by calling i2c_init_board() in board_init().
This means that CONFIG_I2Cx_ENABLE options needs to be correctly set
in order to use needed I2C controller.

Commit is based on the previous patch made by Philipp Tomsich

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28 09:19:03 +02:00
Jernej Skrabec
acbc7e0a70 sunxi: Move function for later convenience
This commit only moves i2c_init_board() function almost to the top and
doesn't have any functional changes.

This is needed for a temporary workaround in next commit when support
for DM I2C will be introduced.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28 09:19:00 +02:00
Jernej Skrabec
ae4e4dde52 sunxi: power: Compile sy8106a driver only during SPL build
Driver for that regulator is used only in SPL and it uses old I2C
interface. If we want to use DM I2C in U-Boot proper, compilation of
this driver has to be limited only to SPL.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28 09:18:54 +02:00
Tom Rini
1e6776000e Xilinx fixes for v2017.05
- Fix usbotg on Miami board
 - Cleanup zc1751 defconfig
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Merge tag 'xilinx-fixes-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze

Xilinx fixes for v2017.05

- Fix usbotg on Miami board
- Cleanup zc1751 defconfig
2017-04-27 16:49:19 -04:00
Lokesh Vutla
509b498a50 ext4: Fix comparision of unsigned expression with < 0
In file ext4fs.c funtion ext4fs_read_file() compares an
unsigned expression with < 0 like below

	lbaint_t blknr;
	blknr = read_allocated_block(&(node->inode), i);
	if (blknr < 0)
		return -1;

blknr is of type ulong/uint64_t. read_allocated_block() returns
long int. So comparing blknr with < 0 will always be false. Instead
declare blknr as long int.

Similarly ext4/dev.c does a similar comparison. Drop the redundant
comparison.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:49:09 -04:00
Lokesh Vutla
8a707bafe0 MAINTAINERS: Update for Keystone2 secure devices
Update Keystone2 secure device configs under
"TI SYSTEM SECURITY". Without this buildman keeps complaining
about the status of these boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew F. Davis <afd@ti.com>
2017-04-27 16:49:08 -04:00
Patrice Chotard
dc89c6fb77 arm/lib/bootm.c: keep ARM v7M in thumb mode during boot_jump_linux()
On ARM v7M, the processor will return to ARM mode when executing
a blx instruction with bit 0 of the address == 0. Always set it
to 1 to stay in thumb mode.

Tested on STM32f746-disco board

Similar commit:
f99993c108
Author: Matt Porter <mporter@konsulko.com>

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-04-27 16:49:08 -04:00
Masahiro Yamada
a93fbf4a78 ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig
In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this
naming.

Move the OMAP2+ board/SoC choice down to mach-omap2/Kconfig to slim
down the arch/arm/Kconfig level.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:49:08 -04:00
Josua Mayer
efbe99ceb6 add Kconfig for fsuuid command
CONFIG_CMD_FS_UUID was neither whitelisted, nor was it declared in
Kconfig.
Now it can be enabled in .config and defconfig as expected.

Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
2017-04-27 16:49:07 -04:00
Andrew F. Davis
46f9ef1846 Kconfig: Enable FIT support by default for TI platforms
Almost all TI defconfigs enable this already, add this as a default
and remove the explicit assignment.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:49:06 -04:00
Alexey Brodkin
80e4bbfcd9 travisci: Add support for ARC
Finally adding support for ARC boards in TravisCI.

To build for ARC boards we need to install Synopsys prebuilt toolchain
which we do here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:49:05 -04:00
Lokesh Vutla
6cc96bc75a board: dra71: Fix selection of OPPs
As per the DM[1] Dated June 2016–Revised February 2017, Table 5-3,
DRA71 supports the following OPPs for various voltage domains:

VDD_MPU:	OPP_NOM
VDD_CORE:	OPP_NOM
VDD_GPU:	OPP_NOM
VDD_DSPEVE:	OPP_NOM, OPP_HIGH
VDD_IVA:	OPP_NOM, OPP_HIGH

This patch add support for selection of the above OPPs instead of
using OPP_NOM for all voltage domains.

[1] http://www.ti.com/lit/ds/symlink/dra718.pdf

Reported-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-04-27 16:49:04 -04:00
Philipp Tomsich
51c7f34809 pinctrl: Kconfig: sort pinctrl config options to prevent future clutter
This originally started out as
     "pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.

However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-27 16:49:04 -04:00
Philipp Tomsich
17873341af rockchip: mkimage: remove (left-over) assignment w/o effect [coverity]
An assignment (of a value to itself) was left over (after removing and
addition from the line) from moving the common padding code into
rkcommon_vrec_header.

This change removes this to avoid a spurious warning in static code
analysis (i.e. Coverity).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Coverity (CID: 161418)
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:49:03 -04:00
Alexey Brodkin
a1b343d754 clean-up: Remove uselsess mentions of CONFIG_COMMAND_HISTORY
These were reminders that somehow slipped through the cracks
or were erroneously introduced after previous clean-ups.

Getting rid of then once again. Hopefully for good now :)

Where missing and appropriate replace with CONFIG_CMDLINE_EDITING
which really enables shell history as of now.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Jon Mason <jon.mason@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-27 16:49:03 -04:00
Tom Rini
d2366dfe1d arm: Warn that starting with v2018.01 gcc-6 or later is required
There are more and more cases where if we do not use gcc-6.0 or later we
run into problems where our binaries are too large for the targets.
Given the prevalence of gcc-6.0 or later toolchains at this point in
time, we give notice now that starting with v2018.01 we will require
gcc-6 (or later) for ARM.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:49:02 -04:00
Simon Glass
43b41566f7 dm: sandbox: pwm: Add a basic pwm test
Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:

   http://patchwork.ozlabs.org/patch/748172/

Add a simple test to get us started.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-27 16:49:02 -04:00
Lokesh Vutla
29f089a605 configs: keystone2: Standardise U-boot prompt
Standardise U-Boot prompt on all keystone2 platforms
instead of platform specific prompt.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 16:48:59 -04:00
Adam Ford
44913aa52b OMAP3: Correct name of omap34xx_gpios when using DM_GPIO
The name of the gpio bank under DM_GPIO appear to be a copy-paste error.
This changes the name of the gpio bank from am33xx_gpios to omap34xx_gpios.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-27 08:13:48 -04:00
Adam Ford
71e48c26a6 omap3: i2c: correct register
The register names and offset were not correct as per the TRM for OMAP3530
and OMAP3630.  Correct the naing and offsets per the documentation

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-04-27 08:13:47 -04:00
Michal Simek
0a5559c10a arm64: zynqmp: Sync defconfig with Kconfig
Remove option which depends on MMC controller which is disabled for dc2.
Savedefconfig is removing it because of new dependencies.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-04-27 13:31:55 +02:00
Mike Looijmans
79ed06f2cc zynq-topic-miami.dts: Add usbotg0 alias to make USB actually work
Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19

The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-04-27 13:31:55 +02:00
Tom Rini
6f008a2e16 Merge git://git.denx.de/u-boot-sunxi 2017-04-25 16:12:42 -04:00
Tom Rini
7f4ed7cb78 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-04-25 16:11:35 -04:00
Tom Rini
9fde52a8d4 Merge branch 'master' of git://git.denx.de/u-boot-usb 2017-04-25 09:00:18 -04:00
Tom Rini
9ad99bee9c Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-04-25 08:59:56 -04:00
Alexey Brodkin
83cb46c286 ehci-ppc4xx: Prepare for usage of readl()/writel() accessors
We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.

Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
---------------->8---------------
  CC      drivers/usb/host/ehci-ppc4xx.o
drivers/usb/host/ehci-ppc4xx.c: In function 'ehci_hcd_init':
drivers/usb/host/ehci-ppc4xx.c:23:3: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
   HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
   ^
---------------->8---------------

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-25 12:50:13 +02:00
Heinrich Schuchardt
7f2e59aee5 usb: musb: avoid out of bound access in udc_setup_ep
For id = 15 an out of bound access occurs in udc_setup_ep().
Increase the size of epinfo[] from 30 to 32 to encompass
ids 0..15.

The problem was highlighted by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-04-25 12:50:12 +02:00
Heinrich Schuchardt
2511b2ed4d musb: properly detect failed initialization of controller
We want to check the result of musb_init_controller
and not the address were the result is stored.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-04-25 12:50:11 +02:00
Dalon Westergreen
6bd041f00d arm: socfpga: add cyclone5 based de10-nano board
Add support for the Terasic DE10-Nano board.  The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2017-04-25 12:46:44 +02:00
Icenowy Zheng
e8f86a0261 sunxi: fix the default value of CONS_INDEX on non-A23/A33 SUN8I
Only A23/A33 in SUN8I want a default value of CONS_INDEX of 5, for other
chips the default value is 1 like other Allwinner SoCs.

Fix this default value.

The original wrong value has lead to wrong console on H3 Orange Pi
boards.

Fixes: 7095f86418 ("sunxi: Convert CONS_INDEX to Kconfig")

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-25 11:44:21 +02:00
Tom Rini
12af9399e7 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2017-04-24 21:08:42 -04:00
Tom Rini
9a1d64809d Merge branch 'master' of git://git.denx.de/u-boot-mips 2017-04-24 21:08:10 -04:00
York Sun
fedebf0d08 armv8: layerscape: Fix DDR size calcuation for SPL build
Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-24 09:07:12 -07:00
Yuantian Tang
026f30ec3e arm: psci: make psci usable on single core socs
PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.

Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:07:12 -07:00
Sumit Garg
d14428c729 armv8: ls104xardb: Secure Boot: enable PPA support for eMMC/SD and NAND boot
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:06:26 -07:00
Sumit Garg
fa642559f5 armv8: fsl-layerscape: Add validation of PPA image from NAND and SD
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:05:20 -07:00
Sumit Garg
9fa3a54220 armv8: fsl-layerscape: Support loading PPA header from eMMC/SD and NAND Flash
Add Kconfig option to support loading PPA header from eMMC/SD and
NAND Flash.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:03:30 -07:00
Hou Zhiqiang
2ac2e20ef8 armv8: ls1046aqds: Integrate FSL PPA
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:03:22 -07:00
Hou Zhiqiang
b6adbec0f9 armv8: ls1043aqds: enable FSL PPA
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:03:09 -07:00
Hou Zhiqiang
e1b0929059 armv8: ls1043aqds: Integrate FSL PPA
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:02:58 -07:00
Santan Kumar
99fe76d023 armv8: ls2080ardb: Add phy number for serdes1 protocol 0x4b
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:02:46 -07:00
Alison Wang
5d267ec679 arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033
Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.

This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 08:59:43 -07:00
Andreas Färber
2eff3b7179 sunxi: Fix arm64 fdtfile variable
Currently $fdtfile is constructed from CONFIG_DEFAULT_TREE, containing
the filename. However on arm64 that file is located in an allwinner
subdirectory.

To avoid the need for users/distros symlinking the .dtb files, prepend
the vendor directory for ARM64.

This aligns Pine64 with other boards such as Raspberry Pi 3.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-24 11:55:42 +05:30
Kyle Edwards
1967228b02 mips: qemu-mips/64: Expand malloc pool for CONFIG_SYS_BOOTPARAMS_LEN
Before this patch, CONFIG_SYS_BOOTPARAMS_LEN was the same size as
CONFIG_SYS_MALLOC_LEN. So, if malloc() had previously been called, and
initr_malloc_bootparams() was called, it would fail with an out-of-
memory error. This patch fixes this issue by expanding the malloc pool
to 256KB.

Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2017-04-21 13:54:47 +02:00
Kyle Edwards
9828d050cf mips: qemu-mips/64: Remove obsolete CONFIG_SYS_MONITOR_LEN from config
This fixes an issue with the saveenv command causing U-Boot to no
longer work on the QEMU Mips pseudoboard. Because the offset of the
environment was being determined by CONFIG_SYS_MONITOR_LEN, and this
value was less than the actual size of U-Boot, saveenv was overwriting
parts of the U-Boot code. Because CONFIG_SYS_MONITOR_LEN is no longer
used on MIPS, this patch removes it and places the environment at the
end of the pseudoboard's 4MB flash.

Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2017-04-21 13:54:47 +02:00
Icenowy Zheng
f02abb0608 sunxi: add support for Lichee Pi Zero
Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21 09:29:35 +02:00
Icenowy Zheng
e267d94011 sunxi: add DTSI file for V3s
As we have now V3s support in board code, the V3s DTSI file should also
be added.

Add also some CCU include headers to satisfy the DTSI file.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21 09:23:27 +02:00
Icenowy Zheng
c199489f17 sunxi: add basic V3s support
Basic U-Boot support is now present for V3s.

Some memory addresses are changed specially for V3s, as the original
address map cannot fit into a so small DRAM.

As the DRAM controller code needs a big refactor, the SPL support is
disabled in this version.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21 09:23:17 +02:00