Commit graph

63625 commits

Author SHA1 Message Date
Dario Binacchi
96b109ba74 video: omap: add support for DM/DTS
Update the driver to support the device tree and the driver model.
Timings and panel parameters are now loaded from the device tree.

The DM code replaces the am335x_lcdpanel structure with
tilcdc_panel_info taken from the linux kernel, as well the management
of additional parameters not covered in the legacy code. In addition,
the am335x_lcdpanel structure contains parameters and operations that
were probably a requirement of the board for which this driver was
developed and which, however, were not developed in the linux kernel.
All this led to rewrite th DM controller initialization code, except
for the pixel clock setting that is executed in a function created in a
previous patch with code taken from the legacy am335xfb_init.

The patch has been tested on a custom board with u-boot 2018.11-rc2 and
the following device-tree configuration:

	panel {
		compatible = "ti,tilcdc,panel";
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_enable_pins>;
		enable-gpios = <&gpio0 31 0>;
		backlight = <&backlight>;
		status = "okay";
		u-boot,dm-pre-reloc;
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <16>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};
		display-timings {
			native-mode = <&timing0>;
			timing0: 800x480 {
				hactive         = <800>;
				vactive         = <480>;
				hback-porch     = <46>;
				hfront-porch    = <210>;
				hsync-len       = <20>;
				vback-porch     = <23>;
				vfront-porch    = <22>;
				vsync-len       = <10>;
				clock-frequency = <33000000>;
				hsync-active    = <0>;
				vsync-active    = <0>;
			};
		};
	};

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
a9df3c50ed video: omap: create two routines to set the pixel clock rate
Created in preparation to support driver-model, they can also be called
from legacy code. In this way, code duplication is avoided.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
9d7f53c1e5 video: omap: add loop exit conditions to the dpll setup
In case of null error, round rate is equal to target rate, so it is
useless to continue to search the DPLL setup parameters to get the
desidered pixel clock rate.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Dario Binacchi
9aead9ae09 video: omap: fix debug message
"DISP" -> "DIV"

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Dario Binacchi
41f76a01f3 video: omap: rename LCD controller registers
Add more clarity by prefixing the name of the register to the bitfields.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
017295f31d video: omap: fix bitfields order
Arrange the bitfields of each register in the ascending order.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
3af43750df video: omap: fix coding style on use of spaces
Use one space around (on each side of) the binary '-' operator.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
e3f82b80cd video: omap: add missing bitfield masks
Add, if missing, the bitfield masks in the setting macros of the LCD
controller registers.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
a2f4706479 video: omap: use BIT() and GENMASK() macros
Use the standard BIT() and GENMASK() macros for bitfield definitions.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Yegor Yefremov
1ecf7d9405 arm: baltos: switch to driver model for the net and mdio driver
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
3e7b0aa1fd power: mfd: k3_avs: update am65xx MPU_VDD voltage values
The latest data manual SPRSP08I –NOVEMBER 2017–REVISED DECEMBER 2019[1]
for am65xx SoC states the new MPU nominal voltages to be 1.1V (OPP_NOM),
1.2V (OPP_OD) and 1.24V (OPP_TURBO). Update the nominal voltages in the
K3 AVS driver to reflect this.

[1] http://www.ti.com/lit/gpn/am6528

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
54e0ab4d8b configs: j721e_evm_r5_defconfig: Enable ESM modules
Enable ESM modules for both PMIC and SoC side for proper watchdog
handling on the board.

SPL_BOARD_INIT is also enabled so that the board init function
probing the drivers is called.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
fa281f64a1 board: ti: j721e: initialize ESM support
Initialize both ESM and ESM_PMIC support if available for the board.
If support is not available for either, a warning is printed out.

ESM signals are only properly routed on PM2 version of the J721E SOM,
so only probe the drivers on this device.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
91600a6a84 arm: dts: k3-j721e: Add ESM PMIC support for tps659413 based board
The ESM handling on J7 processor board requires routing the
MCU_SAFETY_ERROR signal to the PMIC on the board for critical safety
error handling. The PMIC itself should then reset the board based on
receiving it. Enable the support for the board by adding the esm
node in place.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
7304546071 arm: dts: k3-k721e: Add Main domain ESM support
Main domain ESM support is needed to configure main domain watchdogs
to generate ESM pin events by default. On J7 processor board these
propagate to the PMIC to generate a reset when watchdog expires.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
3b36b38f50 misc: pmic_esm: Add support for PMIC ESM driver
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
344eb6d572 misc: k3_esm: Add support for Texas Instruments K3 ESM driver
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
8cd10a494f power: pmic: tps65941: Add support for probing the child devices
TPS65941 can have child devices under it (like the ESM support), so
probe these once the master pmic node completes probe.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
d7de70be41 configs: j721e_evm_r5_defconfig: Remove saving ENV in eMMC
Remove saving ENV in eMMC in R5 as the power domains are not
setup. Environment in eMMC cannot be read if we do not boot from
eMMC.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
fac6aa817a configs: j721e_evm_r5: Enable R5F remoteproc support
Enable R5F remoteproc support in R5 defconfig so that R5s can
be started in SPL. While at it enable the SPL_FS_EXT4 config
option to load the firmwares from file system.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
316c927135 include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0
Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0 firmware
loadaddr and name.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
2984b82b3b arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL
Enable MAIN domain r5fss0 cluster and its core0 in R5 spl.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:14 +05:30
Keerthy
b14d56f284 arm: dts: k3-j721e-r5-u-boot: Add fs_loader node
Add fs_loader node which will be needed for loading firmwares
from the boot media/filesystem.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:14 +05:30
Keerthy
d154252fc9 armv7R: K3: Add support for jumping to firmware
MCU Domain rf50 is currently shutting down after loading the ATF.
Load elf firmware and jump to firmware post loading ATF.

ROM doesn't enable ATCM memory, so make sure that firmware that
is being loaded doesn't use ATCM memory or override SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
6dce1cfa56 armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM
Enable execute permission for mcu_r5fss0_core0 BTCM so that we can jump
to a firmware directly from SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
3ab34bc028 arm: k3: Add support for loading non linux remote cores
Add MAIN domain R5FSS0 remoteproc support from spl. This enables
loading the elf firmware in SPL and starting the remotecore.

In order to start the core, there should be a file with path
"/lib/firmware/j7-main-r5f0_0-fw" under filesystem
of respective boot mode.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Guard start_non_linux_remote_cores under CONFIG_FS_LOADER]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
805b3cac1e lib: elf: Move the generic elf loading/validating functions to lib
Move the generic elf loading/validating functions to lib/
so that they can be re-used and accessed by code existing
outside cmd.

While at it remove the duplicate static version of load_elf_image_phdr
under arch/arm/mach-imx/imx_bootaux.c.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
0900254c8c configs: j721e_hs_evm: Enable OSPI related configs
Enable OSPI related configs for J721e HS variant.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
0b58688e1c configs: ama65x_hs_evm: Enable OSPI related configs
Enable OSPI related defconfigs for AM65x HS variant.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
29ab5d3fb4 board: ti: Update AM65x and J721e READMEs for OSPI boot
Update AM65x and J721e README files with instructions for flashing OSPI
images.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
36a5c8939b configs: am65x_evm_defconfig: Enable OSPI configs
Enable OSPI related defconfigs. Also enable SPL_DMA so that DMA is used
during OSPI boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
9c0e1998e5 configs: j721e_evm_defconfig: Enable OSPI configs
Enable OSPI related defconfigs. Also enable SPL_DMA so that DMA is used
during OSPI boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
97103b11d7 configs: j721e_evm: Setup mtdparts for OSPI
Set up mtdparts cmdline argument to be passed to kernel

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
33e741c5c2 configs: am65x_evm: Setup mtdparts for OSPI
Set up mtdparts cmdline argument to be passed to kernel

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
224d7fe263 ARM: dts: k3-j721e: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
9e9dfc1fc4 ARM: dts: k3-am65: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Lokesh Vutla
7d0866b9be ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Since ROM configures OSPI controller to be in memory mapped mode in OSPI
boot, R5 SPL can directly pass the memory mapped pointer to ROM. With
this ROM can directly pull the SYSFW image from OSPI.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
8915a40da4 ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU
Populate address mapping entries in A53 MMU for 4 GB of MMIO space
reserved for providing MMIO access to multiple flash devices through
OSPI/HBMC IPs within FSS.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
28ff144662 drivers: Descend to drivers/soc unconditionally
Descend to drivers/soc directory unconditionally for SPL and U-Boot
builds. Individual drivers can have their own config to check what needs
to be built for SPL. There should be no increase in SPL code size
due to this change.

This is required on K3 SoCs to support DMA in SPL.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:13 +05:30
Anatolij Gustschin
9aa886cc0b video: meson: keep power domain up after booting
Add driver flag to skip power domain disabling on device removal.

Fixes: 52edfed65d ("dm: core: device: switch off power domain after device removal")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Guillaume La Roque <glaroque@baylibre.com>
2020-03-02 19:47:38 -07:00
Anatolij Gustschin
5349e255ff dm: core: Add a flag for power domain control on device removal
In various cases a power domain must stay enabled after device
removal when booting OS (i.e. serial debug console or display).
Add a flag to selectively skip switching off a power domain.

Fixes: 52edfed65d ("dm: core: device: switch off power domain after device removal")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Guillaume La Roque <glaroque@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-02 19:47:38 -07:00
Tom Rini
8aad16916d - convert stm32mp1 board documentation to rst format
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Merge tag 'u-boot-stm32-20200203' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- convert stm32mp1 board documentation to rst format
2020-03-02 09:20:30 -05:00
Tom Rini
bd7bb38699 Xilinx fixes for v2020.04-rc4
- Fix link good bit handling in dp83867
 - Rename generic Zynq defconfig
 - Fix zybo z7 low leve setup
 - Fix error path in zynq_gem driver and fix 64bit usage
 - Fix invalid clock name quieries for Versal
 - Fix zynq/zynqmp SPL low level configuration via DT selection
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Merge tag 'xilinx-for-v2020.04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx fixes for v2020.04-rc4

- Fix link good bit handling in dp83867
- Rename generic Zynq defconfig
- Fix zybo z7 low leve setup
- Fix error path in zynq_gem driver and fix 64bit usage
- Fix invalid clock name quieries for Versal
- Fix zynq/zynqmp SPL low level configuration via DT selection
2020-03-02 09:20:12 -05:00
Patrick Delaunay
efa667d38b doc: add board documentation for stm32mp1
Change plain test README to rst format and move this file
in documentation directory.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-02 09:41:32 +01:00
Heinrich Schuchardt
250b303de8 stm32mp1: rng: remove superfluous assignment
We should not assign a value that is overwritten before use.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-03-02 09:41:31 +01:00
Marek Vasut
85f748ad95 ARM: socfpga: Add missing Denali NAND config options
The Denali SPL shim won't build without these options set,
set them accordingly to fix the build error and let the SPL
shim to work correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-01 22:07:32 +01:00
Marek Vasut
c808ab472a ARM: socfpga: Permit overriding the default timer frequency
The default timer rate may be different than 25 MHz, permit overriding
the default rate in board configuration file. Ultimatelly, this should
be properly handled by a clock driver, however that is not available
on Gen5 yet.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-01 22:07:32 +01:00
Marek Vasut
b371acccad rtc: m41t62: add compatible for m41st87
This adds a compatible string for m41st87. This ensures that this driver
can be used for m41st87.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-03-01 22:07:32 +01:00
Seung-Woo Kim
491cabf067 gadget: f_thor: add missing line breaks for pr_err()
After the commit 9b643e312d ("treewide: replace with error()
with pr_err()"), there are pr_err() usages without line break. Add
missing line breaks for pr_err() used in f_thor.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2020-03-01 21:58:54 +01:00
Andy Shevchenko
53d9bd4a56 dfu: Reset timeout in case of DFU request
In case dfu command is being executed with timeout option,
the timer may expire in the middle of DFU operation. If there
is DFU request coming, we may simple reset timeout value
to prevent aborting of ongoing DFU operation.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Ferry Toth <ftoth@exalondelft.nl>
2020-03-01 21:58:54 +01:00