Commit graph

52373 commits

Author SHA1 Message Date
Jagan Teki
78ddaa5835 icorem6: Use drive strength macros
Use driver strength macros instead of hex numbers.
- IMX6DQ_DRIVE_STRENGTH - 0x30
- IMX6SDL_DRIVE_STRENGTH - 0x28

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
7c22d36640 icorem6: Use proper iomux_ddr_regs drive strength values
Usually the drive strength values for DQ and SDL are 0x30 and
0x28 respectively, update them accordingly.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
c7e3db3259 engicam: Move uart mux init to SPL
Since, u-boot handle fdt through uart so move the UART code
to SPL instead make it to global area.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
15455a6b01 icorem6: Make SPL to pick suitable fdt
SPL FIT is able to pick the suitable fdt file for u-boot,
so add that function through board_fit_config_name_match.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
77a8c91812 engicam: Set fdt_file env during run-time
Set fdt_file env variable during board_late_init

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
68cb6db0f9 geam6ul: Add mmc_late_init
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
6efb981cf8 geam6ul: Add modeboot env via board_late_init
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
040143afe4 icorem6: Add mmc_late_init
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Jagan Teki
32dcfcec56 icorem6: Add modeboot env via board_late_init
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-11 12:57:44 +02:00
Peng Fan
ca10aa7561 imx-common: rdc-sema: correct return value
When unlock, if caller is not the sema owner,
return -EACCES, not 1.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-11 12:36:56 +02:00
Peng Fan
a267d3accd thermal: imx: fix calculation
Fix calculation. do_div can not handle negative values.
Use div_s64_rem to handle the calculation.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-11 12:32:50 +02:00
Peng Fan
52c2e165c4 imx: thermal: update imx6 thermal driver according new equation
>From IC guys:
"
After a thorough accuracy study of the Temp sense circuit,
we found that with our current equation, an average part can
read 7 degrees lower than a known forced temperature.
We also found out that the standard variance was around 2C;
which is the tightest distribution that we could create.
We need to change the temp sense equation to center the average
part around the target temperature.
"

New equation:
Tmeas = (Nmeas - n1) / slope + t1 + offset
n1= fused room count
t1= 25
offset=3.580661
slope= 0.4148468 – 0.0015423*n1

According the new equation, update the thermal driver.
c1 and c2 changed to u64 type and update comments.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-11 12:32:35 +02:00
Peng Fan
0ed02dd686 imx-common: timer: clean up
Drop the unneeded code. lib/time.c use timebase_l/h.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-05-11 12:31:16 +02:00
Fabio Estevam
0b09bfd524 mx25pdk: Add fuse API support
Select CONFIG_FSL_IIM and CONFIG_CMD_FUSE so that the fuse API can
be used.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-11 12:21:56 +02:00
Tom Rini
1f5541c881 Merge git://git.denx.de/u-boot-rockchip
This adds a new firefly-rk3399 board, MIPI support for rk3399 and
rk3288, rk818 pmic support, mkimage improvements for rockchip and a few
other things.
2017-05-10 17:40:11 -04:00
Tom Rini
102d86552a Merge branch 'master' of git://git.denx.de/u-boot-mips 2017-05-10 15:50:21 -04:00
Eric Gao
2085de57f3 rockchip: dts: evb_rk3288: Add mipi display support
Add mipi dsi configuration for evb-rk3288 device tree.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
9b534ba001 rockchip: rk3288: grf: Add grf define for mipi dsi
Add grf register define for rk3288 mipi dsi

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
9115425f56 rockchip: defconfigs: Add mipi dsi support for rk3399 evb board
Add mipi dsi configs for rk3399 evb board

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
df8fe99cf2 rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10 13:37:22 -06:00
Eric Gao
028d684901 rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight
Enable pwm0 for display of rk3399 evb board. The PWM do not have decicated
interrupt number in dts and can not get periph_id by pinctrl framework. So
init them here.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
c34bd8b820 rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve frame buffer space befor relocation.
our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame
buffer size should be at least 1920*1200*32/8.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
8aed0d7751 rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
9f819931e0 rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
e07e5bde7c rockchip: video: vop: Fix rk_display_init() return error
It's caused by the difference of clk_set_rate function implement between
rk3288 andd rk3399.

clk_set_rate() of rk3288 return 0 in normal condition.
clk_set_rate() of rk3399 return input parameter in normal condition.

So check clk_set_rate's return value by IS_ERR_VALUE.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
2017-05-10 13:37:22 -06:00
Eric Gao
1c3984041c rockchip: video: Add mipi driver support for rockchip soc
Add basic driver for mipi display on rockchip soc platform.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
858f6368af rockchip: include: grf: Add GRF register declaration for mipi dsi
Add GRF register declaration for mipi dsi.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10 13:37:22 -06:00
Jacob Chen
453c5a927c power: rk808: rename to rk8xx
Since this driver can be used for rk8xx series pmic,
let's rename rk808 to rk8xx, to make it clear.

Configs parts are done by sed -i "s/RK808/RK8XX/g" `grep RK808 -lr ./`

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
2017-05-10 13:37:22 -06:00
Jacob Chen
eff4ca7285 power: regulator: rk808: add rk818 support
Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Jacob Chen
b049acc902 power: regulator: rk808: replace vsel_bits with vsel_mask
Using mask is more flexible than bits.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Jacob Chen
d77af8a8c9 power: pmic: rk808: add RK818 support
The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
devices.

For boards use rk818, the input current should be set in the early stage, before
ddr initialization.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
2017-05-10 13:37:22 -06:00
Jacob Chen
1daa93c0b4 power: pmic: append rk818 regs to rk808
Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.

I have also add reg prefix to exist registers, to keep them same style.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Jonas Karlman
ecc3bd73b3 rockchip: tinker: set ethaddr in late init
Set ethernet mac address in late init for Tinker Board,
prevents getting a random mac address each boot.

Read mac address from eeprom, first 6 bytes from m24c08@50.
Same as /etc/init.d/rockchip.sh on Tinker OS.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Jonas Karlman
8880efbd1f i2c_eeprom: add read and write functions
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Philipp Tomsich
26e2e404b7 rockchip: pinctrl: rk3399: add support for the HDMI I2C pins
To add HDMI support for the RK3399, this commit provides the needed
pinctrl functionality to configure the HDMI I2C pins (used for reading
the screen's EDID).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
ffc1fac549 rockchip: clk: rk3399: allow requests for HDMI clocks
This allows requests (via the DTS) for PCLK_HDMI_CTRL/PCLK_VIO_GRF,
which are clock gates in the HDMI output path for the RK3399.

As these are enabled by default (i.e. after reset), we don't implement
any logic to actively open/close these clock gates and simply assume
that their reset-default has not been changed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
e92e580350 rockchip: ARM64: puma-rk3399: get DRAM size from DMC init
With the RK3399 DRAM controller (DMC) driver providing all the
infrastructure, retrieve the DRAM size from the DMC init in the
board-specific code (instead of hard-coding) for the RK3399-Q7 (Puma).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
a70feb4620 rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS
The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS.
To allow us to add a efuse-driver (and more importantly, to allow
probes of such a driver to succeed), we need need to accept requests
for PCLK_EFUSE1024NS and return a non-error result.

As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't
implement any logic to manage this clock gate and simply assume that
the reset-default has not been changed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
a83444ee34 rockchip: add defconfig for firefly-rk3399
The file is from evb-rk3399_defconfig with changes:
- use rk3399-firefly dtb
- re-order by make savedefconfig

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
5540e25aeb dm: sandbox: pwm: add test for pwm_set_invert()
Add test case for new interface set_invert().

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix typo in subject and build error in sandbox_pwm_set_invert():
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
1df7ee573e doc: dtbinding: add pwm binding file
This is a copy from kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
874ee59acc rockchip: pwm: implement pwm_set_invert()
Rockchip pwm need to init polarity, implement pwm_set_invert()
to do it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
0b60111aa6 power: regulator: pwm: support pwm polarity setting
The latest kernel PWM drivers enable the polarity settings. When system
run from U-Boot to kerenl, if there are differences in polarity set or
duty cycle, the PMW will re-init:
  close -> set polarity and duty cycle -> enable the PWM.
The power supply controled by pwm regulator may have voltage shaking,
which lead to the system not stable.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
a66726838e rockchip: dts: add rk3399-firefly dts
Firefly-rk3399 is a bord from T-Firefly, you can find detail about
it here:
http://en.t-firefly.com/en/firenow/Firefly_RK3399/

This patch add basic node for the board and make it able to bring
up.

Peripheral/interfaces on board:
- usb hub which connect to ehci controller;
- UART2 debug
- eMMC
- PCIe
- USB 3.0 HOST, type-C port
- sdio, sd-card
- HDMI
- Ethernet
- OPTICAL
- WiFi/BT
- MIPI CSI/DSI
- IR
- EDP/DP

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
dde2223372 rockchip: dts: rk3399: sync with kernel dts
The kernel dts has update a lot since the first time we commit rk3399.dtsi,
sync with kernel for further development.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Simon Glass
439c947f32 dtoc: Handle nodes with phandles that depend on the same
At present dtoc assumes that nodes which are phandles do not themselves
reference other phandle nodes. Unfortunately this is not necessarilly
true. As a result we can currently output C code which does not compile
because a node declaration can be referenced before it is declared.

Adjust the code to explicitly output all phandle nodes needed by node
before the node itself is output.

This fixes building with the latest rk3399-firefly.dts from Linux, which
has reordered the nodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-05-10 13:37:21 -06:00
Simon Glass
49eec8c7f1 dtoc: Move the output code into its own function
The code to generate the tables is quite long. Move the node-output code
into its own function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
ff71f9ac33 rockchip: mmc: handle deprecation of 'clock-freq-min-max'
The 'clock-freq-min-max' property was deprecated in the upstream
(i.e. Linux) DTS bindings in favor of the 'max-frequency' property.

With the latest RK3399 DTSI does no longer include the deprecated
property and the rockchip_dw_mmc driver requiring it to be present,
the driver doesn't bind to the node in the RK3399 DTSI any longer
(thus breaking access to the SD card on the RK3399-Q7 board).

To fix this, we implement a similar logic as in the Linux driver: if
the deprecated property is present, we issue a warning (if DEBUG is
enabled); if it is missing, we require 'max-frequency' to be set and
use it to create a min/max value-pair.

See b023030f10
for the deprecation/matching change in Linux.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
998c61ae60 rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS
The clocking of the designware MMC controller in the upstream
(i.e. Linux) RK3399 has changed/does not match what the current DTS in
U-Boot uses: the first clock entry now is HCLK_SDMMC instead of
SCLK_SDMMC.

With the simple clock driver used for the RK3399, this needs a change
in the selector understood by the various case statements in the driver
to ensure that the driver still loads successfully.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
fa1392a236 rockchip: reserve memory for rk3399 ATF data
There are 3 regions used by rk3399 ATF:
- bl31 code, located at 0x10000;
- cortex-m0 code and data, located at 0xff8c0000;
- bl31 data, located at 0xff8c1000 ~ 0xff8c4000;

SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will be memory corrupt after SPL
loads the ATF image.

More detail about cortex-M0 code in ATF:
https://github.com/ARM-software/arm-trusted-firmware/commit/
8382e17c4c6bffd15119dfce1ee4372e3c1a7890

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00