Commit graph

73239 commits

Author SHA1 Message Date
Giulio Benetti
72d65bdf35 configs: imxrt1050-evk: enable imx gpt timer as tick-timer
Let's enable imx-gpt-timer in imx1050-evk defconfig.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
6f6f03af0e ARM: dts: imxrt1050-evk: add device_type = "memory" to memory node
Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
0684ec8a9d ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL
Timer needs to be already enabled in spl, so let's add its node to spl dtb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
7892f3eba1 ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot
Let's set gpt1 as u-boot timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
7eacc427bb ARM: dts: imxrt1050-evk: enable gpt1 timer
Enable gpt1 timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
5790db9283 ARM: dts: imxrt1050: add gpt1 node
Add gpt1 node for using it as timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
6cd7a9b850 ARM: dts: imxrt1050: add node label to osc
Let's add node label to osc to be used as clock source for other nodes.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
a2d89cce7c configs: imxrt1020-evk: enable imx gpt timer as tick-timer
Let's enable imx-gpt-timer in imx1020-evk defconfig.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
d956990c69 ARM: dts: imxrt1020-evk: add device_type = "memory" to memory node
Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
faa4e95b5c ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL
Timer needs to be already enabled in spl, so let's add its node to spl dtb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
e5d10f4442 ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot
Let's set gpt1 as u-boot timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
bc4944051e ARM: dts: imxrt1020-evk: enable gpt1 timer
Enable gpt1 timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
df243c93d3 ARM: dts: imxrt1020: add gpt1 node
Add gpt1 node for using it as timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
bfdbe871a0 ARM: dts: imxrt1020: add node label to osc
Let's add node label to osc to be used as clock source for other nodes.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
f8c8573b85 timer: imx-gpt: Add timer support for i.MX SoCs family
This timer driver uses GPT Timer (General Purpose Timer) available on
a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator
as well as peripheral clock.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
[Giulio: added the driver's stub and handled peripheral clock prescaler
setting making driver to work correctly]
Signed-off-by: Jesse Taube <mr.bossman075@gmail.com>
[Jesse: added init, setting prescaler for 24Mhz support and enabling
timer]
2021-06-09 13:01:33 +02:00
Giulio Benetti
55ad612306 arm: imxrt: soc: make mpu regions generic
This mpu handling works for every i.MXRT SoC that we have, so let's
generalize imxrt1050_region_config to imxrt_region_config.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Tom Rini
cb26d5a926 Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- More pinctrl updates
2021-06-08 17:46:49 -04:00
Marek Vasut
a2a14854f2 pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.12
Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large
commit, since the macros in sh-pfc.h also got updated, so
all the PFC tables must be updated in lockstep.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-07 19:35:22 +02:00
Tom Rini
e3b64beda5 Prepare v2021.07-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07 09:26:39 -04:00
Tom Rini
80da2453e1 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07 08:09:35 -04:00
Tom Rini
18dd72ad47 Merge tag 'u-boot-rockchip-20210606' of https://source.denx.de/u-boot/custodians/u-boot-rockchip 2021-06-07 07:22:14 -04:00
Tom Rini
281e95c40f Minor fixes for sandbox and handling of dm-ranges
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Merge tag 'dm-pull-6jun21' of https://source.denx.de/u-boot/custodians/u-boot-dm

Minor fixes for sandbox and handling of dm-ranges
2021-06-06 13:00:23 -04:00
Tom Rini
0c4e63a487 - disable legacy video for brxre1, mx28evk, pico-imx6ul,
pxm2 and rut boards after DM_VIDEO conversion deadline
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Merge tag 'video-for-2021-07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-video

 - disable legacy video for brxre1, mx28evk, pico-imx6ul,
   pxm2 and rut boards after DM_VIDEO conversion deadline
2021-06-05 11:17:55 -04:00
Patrick Delaunay
269fa8468d test: add dm_test_read_resource
Add a test of dev_read_resource with translation or without translation

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:47 -06:00
Patrick Delaunay
0d1ab576f2 net: luton: remove address translation after ofnode_read_resource
Removed call of ofnode_translate_address() after ofnode_read_resource
in luton_switch.c:luton_probe(); it is unnecessary since
the commit feb7ac457c ("dm: core: Add address translation in
fdt_get_resource").

Fixes: feb7ac457c ("dm: core: Add address translation in fdt_get_resource")
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-05 07:35:47 -06:00
Alper Nebi Yasak
ca2f948a4b pwm: cros_ec: Rename "priv_auto_alloc_size" to "priv_auto"
With commit 41575d8e4c ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This
driver was sent to the mailing list before that change, merged after it,
and still has the old form. Apply the rename here as well.

Fixes: 1b9ee2882e ("pwm: Add a driver for Chrome OS EC PWM")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:47 -06:00
Heinrich Schuchardt
205b9f5100 sandbox: correct determination of the text base
os_find_text_base() assumes that first line of /proc/self/maps holds
information about the text. Hence we must call the function before calling
os_malloc() which calls mmap(0x10000000,).

Failure to do so has led to incorrect values for pc_reloc when an
exception was reported

    => exception undefined

    Illegal instruction
    pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c

as well as incorrect output of the bdinfo command

    => bdinfo
    relocaddr   = 0x0000000007858000
    reloc off   = 0x0000000010000000

Fixes: b308d9fd18 ("sandbox: Avoid using malloc() for system state")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:47 -06:00
Bin Meng
0e35b937b9 of: addr: Remove call to dev_count_cells() in of_get_address()
In of_get_address(), there is:

  dev_count_cells(dev, &na, &ns);

followed by:

  bus->count_cells(dev, &na, &ns);

but no codes in between use na/ns, hence the first call is useless.
By dropping the first call, dev_count_cells() is now useless too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:34 -06:00
Bin Meng
139eaa7a2b of: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'
'dma-ranges' frequently exists without parent nodes having 'dma-ranges'.
While this is an error for 'ranges', this is fine because DMA capable
devices always have a translatable DMA address. Also, with no
'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with
no restrictions unless perhaps the device itself has implicit
restrictions.

This keeps in sync with Linux kernel commit:

  81db12ee15cb: of/address: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:34 -06:00
Anatolij Gustschin
0df6e66c99 pico-imx6ul: disable video after DM_VIDEO conversion deadline
These boards were not converted to DM_VIDEO before deadline,
so disable video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Fabio Estevam <festevam@gmail.com>
2021-06-05 10:53:25 +02:00
Anatolij Gustschin
ac36dc7d19 brxre1: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2021-06-05 10:40:47 +02:00
Anatolij Gustschin
bbc14b43de mx28evk: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
2021-06-05 10:39:18 +02:00
Anatolij Gustschin
a0195e980b siemens: pxm2: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2021-06-05 10:38:00 +02:00
Anatolij Gustschin
bf5d1244e6 siemens: rut: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2021-06-05 10:36:40 +02:00
Tom Rini
c003d2cd6b Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: a37xx: PCI related enhancements and fixes (Pali)
- mvebu: turris_omnia: Board specific updates, e.g. rescue
  boot cmd etc (Marek)
2021-06-04 09:34:21 -04:00
Marek Behún
176c3e7760 arm: mvebu: turris_omnia: support invoking rescue boot from console
Make it possible to invoke rescue boot from U-Boot console, without
having to press the factory reset button. This is needed when accessing
the device remotely, for example.

Achieve this by putting rescue command into `bootcmd_rescue` default
environment variable and setting some distroboot environment variables
to their default values when the factory button is pressed.

Rescue boot from console can be invoked by running
  run bootcmd_rescue

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Marek Behún
0b5bb36d13 arm: mvebu: turris_omnia: update rescue mode boot command
Update rescue mode boot command on Turris Omnia. We are compressing the
image with lzma now.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
b321722f22 arm: a37xx: pci: Fix configuring PCIe resources
The `ranges` DT property of the PCIe node is currently ignored by
Aardvark driver - all entries are used as transparent PCIe MEM, despite
some of them being defined for IO in DT.

This is because the driver does not setup PCIe outbound windows and thus
a default configuration is used.

This can cause an external abort on CPU when a device driver tries to
access non-MEM space.

Setup the PCIe windows according to the `ranges` property for all
non-MEM resources (currently only IO) and also non-transparent MEM
resources.

Because Linux expects that bootloader does not setup Aardvark PCIe
windows, disable them before booting Linux.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
079b35a261 arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of
PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB
CPU window for PCIe, and since IO port space is only 64 KiB in total,
use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for
PCIe MEM.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
4a82fca8e3 arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function
Current version of this function uses a lot of incorrect assumptions about
the `ranges` DT property:

 * parent(#address-cells) == 2
 * #size-cells == 2
 * number of entries == 2
 * address size of first entry == 0x1000000
 * second child address entry == base + 0x1000000

Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap
with PCIe IO space, and trying to define additional MEM space (as a third
entry in the `ranges` DT property) causes U-Boot to crash when booting the
kernel.

  ## Flattened Device Tree blob at 04f00000
     Booting using the fdt blob at 0x4f00000
     Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK
  ERROR: board-specific fdt fixup failed: <unknown error>
   - must RESET the board to recover.

Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses
in the `ranges` property according to
https://elinux.org/Device_Tree_Usage#PCI_Address_Translation

Now it is possible to increase PCIe MEM space from 16 MiB to maximal value
of 127 MiB.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Fixes: cb2ddb291e ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions")
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
46b679e3ec arm: a37xx: pci: Find PCIe controller node by compatible instead of path
Find PCIe DT node by compatible string instead of retrieving it by using
hardcoded DT path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
a544d65f1d arm: a37xx: pci: Fix DT compatible string to Linux' DT compatible
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie'
to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible
with Linux' DT node.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
7b85aefd4b arm: a37xx: pci: Disable bus mastering when unloading driver
Disable Root Bridge I/O space, memory space and bus mastering in Aardvark's
remove method, which is called before booting Linux kernel.

This ensures that PCIe device which was initialized and used by U-Boot
cannot do new DMA transfers until Linux initializes PCI subsystem and loads
appropriate drivers for the device.

During initialization of PCI subsystem Linux in fact disables this bus
mastering on Root Bridge (and later enables it when driver is loaded and
configured), but there is a possibility of a small window after U-Boot
boots Linux when bus mastering is enabled, which is not correct.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
127dbec39a arm: a37xx: pci: Don't put link into LTSSM Recovery state during probe
During our debugging of the Aardvark driver in Linux we have discovered
that the PCIE_CORE_LINK_CTRL_STAT_REG register in fact controls standard
PCIe Link Control Register for PCIe Root Bridge. This led us to discover
that the name of the PCIE_CORE_LINK_TRAINING macro and the corresponding
comment by this macro's usage is misleading; this bit in fact controls
Retrain Link, which, according to PCIe base spec is defined as:

  A write of 1b to this bit initiates Link retraining by directing the
  Physical Layer LTSSM to the Recovery state. If the LTSSM is already in
  Recovery or Configuration, re-entering Recovery is permitted but not
  required.

Entering Recovery state is normally done from LTSSM L0, L0s and L1 states.
But since the pci-aardvark.c driver enables Link Training just a few lines
above, the controller is not in L0 ready state yet. So setting aardvark bit
PCIE_CORE_LINK_TRAINING does not actually enter Recovery state at this
place.

Moreover, trying to enter LTSSM Recovery state without other configuration
is causing issues for some cards (e.g. Atheros AR9xxx and QCA9xxx). Since
Recovery state is not entered, these issues are not triggered.

Remove code which tries to enter LTSSM Recovery state completely.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Sean Anderson
89be8e31cc fastboot: Fix overflow when calculating chunk size
If a chunk was larger than 4GiB, then chunk_data_sz would overflow and
blkcnt would not be calculated correctly. Upgrade it to a u64 and cast
its multiplicands as well. Also fix bytes_written while we're at it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-06-01 16:48:54 -04:00
Kever Yang
87f9c08d84 MAINTAINERS: Update maintainer's mail address
Philipp has change the mail and the legacy one is not available, update it
to the new one.

CC: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-01 19:57:02 +08:00
Tom Rini
d8729a114e Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- SiFive FU740 and Unmatched support
2021-05-31 10:19:14 -04:00
Tom Rini
fa68645b94 Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
This contains the fix to bring back the SD card as MMC0. In the long run
we are looking into a more robust solution, but for now we need to fix
this, as this breaks the user experience left, right, and centre.
Also add the one MAINTAINERS path addition from Samuel.
2021-05-31 10:18:26 -04:00
Green Wan
d7da718bd9 drivers: pci: pcie_dw_common: fix Werror compilation error
Fix compilation error when Werror is turned on. The warning could
possible break some CI builds.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-05-31 16:35:55 +08:00
Green Wan
c552debbd8 riscv: cpu: fu740: clear feature disable CSR
Clear feature disable CSR to turn on all features of hart. The detail
is specified at section, 'SiFive Feature Disable CSR', in user manual

https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31 16:35:55 +08:00