Commit graph

88416 commits

Author SHA1 Message Date
Harald Seiler
719a8759cd ram: stm32mp1: Only print RAM config with CONFIG_SPL_DISPLAY_PRINT
Ensure that the RAM configuration line is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
1937fdbd47 ARM: dts: stm32: add RNG node for STM32MP13x platforms
Add RNG node for STM32MP13x platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
e077d7f613 rng: stm32: Implement custom RNG configuration support
STM32 RNG configuration should best fit the requirements of the
platform. Therefore, put a platform-specific RNG configuration
field in the platform data. Default RNG configuration for STM32MP13
is the NIST certified configuration [1].

While there, fix and the RNG init sequence to support all RNG
versions.

[1] https://csrc.nist.gov/projects/cryptographic-module-validation-program/entropy-validations/certificate/53

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
6032292534 rng: stm32: add error concealment sequence
Seed errors can occur when using the hardware RNG. Implement the
sequences to handle them. This avoids irrecoverable RNG state.

Try to conceal seed errors when possible. If, despite the error
concealing tries, a seed error is still present, then return an error.

A clock error does not compromise the hardware block and data can
still be read from RNG_DR. Just warn that the RNG clock is too slow
and clear RNG_SR.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
01af363623 rng: stm32: add RNG clock frequency restraint
In order to ensure a good RNG quality and compatibility with
certified RNG configuration, add RNG clock frequency restraint.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
2d2574b405 rng: stm32: Implement configurable RNG clock error detection
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
81a751dcd9 configs: default activate CONFIG_RNG_STM32 for STM32MP13x platforms
Default embed this configuration. If OP-TEE PTA RNG is exposed, it means
that the RNG is managed by the secure world. Therefore, the RNG node
should be disabled in the device tree as an access would be denied
by the hardware firewall.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
77e0c60879 rng: stm32: rename STM32 RNG driver
Rename the RNG driver as it is usable by other STM32 platforms
than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
CONFIG_RNG_STM32

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
388f872691 ARM: dts: stm32f429: put can2 in secondary mode
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.

This is a preparation patch for the upcoming support to manage CAN
peripherals in single configuration.

The addition ensures backwards compatibility.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
3fd60a4f43 ARM: dts: stm32: add pin map for CAN controller on stm32f4
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.

Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
78692e51dd ARM: dts: stm32: add CAN support on stm32f429
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Patrice Chotard
7132729100 configs: stm32f769-disco: Enable VIDEO_LOGO flag
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit 284b08fb51 ("board: stm32mp1: add
splash screen with stmicroelectronics logo").

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
36ce1d5b23 Remove the hardcoded ST logo no longer in use
The patch removes the hardcoded ST logo from the code, as it is no
longer used.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
9192b13bc8 board: stm32f746-disco: refactor the display of the ST logo
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit 284b08fb51 ("board: stm32mp1: add
splash screen with stmicroelectronics logo"). It was necessary to use a
specific logo for the stm32f746-disco board.

Furthermore, the previous version didn't properly center the logo, hiding
its upper part.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
20af6b897b configs: stm32f746-disco: limit resolution to 480x272
The patch fixes the y-resolution, which was causing the creation of a
framebuffer larger than actually needed, resulting in memory waste.

Fixes: cc1b0e7b8e ("board: Add display to STM32F746 SoC discovery board")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
1e4d99549f ARM: dts: stm32: support display on stm32f746-disco board
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts:
stm32: support display on stm32f746-disco board") and removes the same
settings from stm32f746-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
f0c76e7731 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.

In the schematics of document UM1907, the power supply for the micro SD
card is the same 3v3 voltage that is used to power other devices on the
board. By generalizing the name of the voltage regulator, it can be
referenced by other nodes in the device tree without creating
misunderstandings.

This patch is preparatory for future developments.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
92ddff674d ARM: dts: stm32: add pin map for LTDC on stm32f7
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.

Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
f479f5dbb7 ARM: dts: stm32: add ltdc support on stm32f746 MCU
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC
(Lcd-tft Display Controller) support") and removes the same settings
from stm32f746-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
5b9e395726 ARM: dts: stm32: add touchscreen on stm32f746-disco board
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.

The patch adds support for touchscreen on the stm32f746-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
f37cf077ac ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.

Add pin configurations for using i2c3 controller on stm32f7.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
3175c73b04 ARM: dts: stm32: use RCC macro for CRC node on stm32f746
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.

The patch replaces the number 12 with the appropriate numerical constant
already defined in the file stm32f7-rcc.h.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
a5fc0bebef ARM: dts: stm32: add CAN support on stm32f746
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
  * CAN1: Primary bxCAN for managing the communication between a secondary
    bxCAN and the 512-byte SRAM memory.
  * CAN2: Secondary bxCAN with no direct access to the SRAM memory.
  This means that the two bxCAN cells share the 512-byte SRAM memory and
  CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
  * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
    512-byte SRAM memory.

 -------------------------------------------------------------------------
| features | CAN1              | CAN2               | CAN 3               |
 -------------------------------------------------------------------------
| SRAM     | 512-byte shared between CAN1 & CAN2    | 512-byte            |
 -------------------------------------------------------------------------
| Filters  | 26 filters shared between CAN1 & CAN2  | 14 filters          |
 -------------------------------------------------------------------------

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
3d82c74be7 ARM: dts: stm32: add pin map for CAN controller on stm32f7
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.

Add pin configurations for using CAN controller on stm32f7.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
e97aeda67f dt-bindings: mfd: stm32f7: Add binding definition for CAN3
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.

Add binding definition for CAN3 peripheral.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Lee Jones <lee@kernel.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:01 +02:00
Tom Rini
4459ed60cb Prepare v2023.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-02 10:39:59 -04:00
Tom Rini
ba6d575ee0 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-02 10:35:27 -04:00
Bhupesh Sharma
f75bd201bf MAINTAINERS: ufs: Change Bhupesh's email address
Set my current personal email in the MAINTAINERS file.

Signed-off-by: Bhupesh Sharma <bhupesh.linux@gmail.com>
2023-09-30 15:09:44 -04:00
Tom Rini
2173c4a990 Second set of u-boot-atmel fixes for the 2023.10 cycle
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Merge tag 'u-boot-at91-fixes-2023.10-b' of https://source.denx.de/u-boot/custodians/u-boot-at91

Second set of u-boot-atmel fixes for the 2023.10 cycle:

Two small fixes , one for an array not initialized and the second one
fixes an error case when a DT property is missing for the atmel NAND
driver.
2023-09-29 10:40:34 -04:00
Francois Berder
7b4ffe8c32 clk: at91: Fix initializing arrays
Arrays are not cleared entirely because ARRAY_SIZE
returns the number of elements in an array, not the size
in bytes.
This commit fixes the calls to memset by providing the
array size in bytes instead of the number of elements
in the array.

Signed-off-by: Francois Berder <fberder@outlook.fr>
2023-09-29 16:45:40 +03:00
Tom Rini
87ebb54b9c Pull request doc-2023-10-rc5-3
Documentation:
 
 * describe that partition numbers are hexadecimal in load command
 * remove obsolete half sentence in tools/binman/binman.rst
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Merge tag 'doc-2023-10-rc5-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request doc-2023-10-rc5-3

Documentation:

* describe that partition numbers are hexadecimal in load command
* remove obsolete half sentence in tools/binman/binman.rst
2023-09-29 07:49:57 -04:00
Tom Rini
a574e05d39 Merge branch '2023-09-28-assorted-minor-fixes'
- Fixes for two board builds and a script fix for many TI platforms
2023-09-29 07:49:24 -04:00
Heinrich Schuchardt
c65beebfae binman: doc: Remove incomplete sentence
This is the difference between version 1 and 2 of Massimo's patch:

binman: doc: fix reference tag placement for Logging section
v2: https://lore.kernel.org/u-boot/20230913161633.999542-1-massimo.pegorer+oss@gmail.com/
v1: https://lore.kernel.org/u-boot/20230909135235.21242-1-massimo.pegorer+oss@gmail.com/

Fixes: 0f40e23fd2 ("binman: add documentation for binman sign option")
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
2023-09-29 12:56:49 +02:00
Mickaël Tansorier
5bb1d1f9da doc: usage: load: document part as hexadecimal
`part` option is in hexadecimal, so information is missing in usage
documentation.

Callgraph for `part` parsing is :
do_load -> fs_set_blk_dev -> part_get_info_by_dev_and_name_or_num ->
blk_get_device_part_str -> hextoul (This is why it is hexadecimal)

Signed-off-by: Mickaël Tansorier <mickael.tansorier@smile.fr>
Reviewed-by: Yoann Congal <yoann.congal@smile.fr>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-29 12:55:39 +02:00
Jan Kiszka
ec91a96970 configs: iot2050: Disable CONFIG_CONSOLE_MUX
We only have serial as console option, and leaving this on turns on
SYS_CONSOLE_IS_IN_ENV which is also not true for these devices, leaving
an ugly

In:    No input devices available!
Out:   No output devices available!
Err:   No error devices available!

behind.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-09-28 16:31:43 -04:00
Eduard Strehlau
fa5bde3760 smegw01: Fix inverted CONFIG_SYS_BOOT_LOCKED logic
CONFIG_SYS_BOOT_LOCKED means that a restricted boot environment will
be used. In this case, hab_auth_img_or_fail should be called to prevent
U-Boot to continue running when the fitImage authentication fails.

Fix the logic accordingly.

Additionally, select CONFIG_SYS_BOOT_LOCKED by default.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-28 16:31:43 -04:00
Manorit Chawdhry
7ebbce535c env: ti: ti_common.env: Fix get_overlaystring for FIT Image
After the refactor with conf- nodes in fitImage, overlaystring wasn't
didn't handle the new conf- nodes in FIT Booting. Fix get_overlaystring
to handle conf- nodes.

Fixes: 837833a724 ("environment: ti: Add get_fit_config command to get FIT config string")
Reported-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
2023-09-28 16:31:43 -04:00
Alexander Dahl
d6b4359e50 mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Adapt behaviour to Linux kernel driver.

The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):

    NAND:  Could not find valid ONFI parameter page; aborting
    device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
    Macronix NAND 512MiB 3,3V 8-bit
    512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
    atmel-nand-controller nand-controller: NAND scan failed: -22
    Failed to probe nand driver (err = -22)
    Failed to initialize NAND controller. (error -22)
    0 MiB

Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.

Fixes: 6a8dfd5722 ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-09-27 12:43:05 +03:00
Tom Rini
964aae1644 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ Fix VisionFive2 booting issue by providing the correct FDT.
2023-09-26 09:45:41 -04:00
Heinrich Schuchardt
16dbe3d9d4 riscv: set fdtfile on VisionFive 2
Multiple revisions of the StarFive VisionFive 2 board exist. They can be
identified by reading their EEPROM.

Linux uses two differently named device-tree files. To load the correct
device-tree we need to set $fdtfile to the device-tree file name that
matches the board revision.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
2023-09-26 10:43:02 +08:00
Tom Rini
15155ab0a3 Fixes for 2023.10
-----------------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17831
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Merge tag 'u-boot-imx-20230923' of https://source.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2023.10
-----------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17831
2023-09-24 17:15:31 -04:00
Tom Rini
729b0104bb trace: correct format of flyrecord
minor bug fixes
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Merge tag 'dm-pull-23sep23' of https://source.denx.de/u-boot/custodians/u-boot-dm

trace: correct format of flyrecord
minor bug fixes
2023-09-24 17:15:15 -04:00
Eduard Strehlau
62a3c66a7c smegw01: Use CONFIG_SYS_LOAD_ADDR for loading fitImage
Set CONFIG_SYS_LOAD_ADDR=0x88000000 and use this address for
loading fitImage.

Also pass the standard CONFIG_BOOTFILE option to indicate
the fitImage file.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23 18:45:34 +02:00
Fabio Estevam
45651a3d69 imx7: Disable CAAM Job Ring 0
Trying to boot a fitImage after a successful hab_auth_img operation
causes the following error:

 ## Loading kernel from FIT Image at 88000000 ...
   Using 'conf-imx7d-smegw01.dtb' configuration
   Trying 'kernel-1' kernel subimage
     Description:  Linux kernel
     Type:         Kernel Image
     Compression:  uncompressed
     Data Start:   0x8800010c
     Data Size:    9901752 Bytes = 9.4 MiB
     Architecture: ARM
     OS:           Linux
     Load Address: 0x80800000
     Entry Point:  0x80800000
     Hash algo:    sha256
     Hash value:   28f8779bbf010780f16dd3d84ecb9b604c44c5c2cf7acd098c264a2d3f68e969
   Verifying Hash Integrity ... sha256Error in SEC deq
   CAAM was not setup properly or it is faulty error!

The reason for this error is that the BootROM uses the CAAM Job Ring 0,
so disable its node in U-Boot to avoid the resource conflict.

imx8m dtsi files also have the Job Ring 0 disable since the following
kernel commit:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch?h=v6.5&id=dc9c1ceb555ff661e6fc1081434600771f29657c

For a temporary solution, disable the Job Ring 0 in imx7s-u-boot.dtsi.

Reported-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23 18:45:34 +02:00
Fabio Estevam
5ae4f74a1b imx: hab: Explain that ivt_offset is optional
The ivt_offset parameter is optional for both hab_auth_img_or_fail
and hab_auth_img commands.

Document it in their usage texts to make it clearer.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23 18:45:34 +02:00
Fabio Estevam
ade6e375c3 imx: hab: Improve the hab_auth_img_or_fail usage text
Split the hab_auth_img_or_fail usage text in two sentences to make it
clearer.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23 18:45:34 +02:00
Eduard Strehlau
2ec9ebc72a imx: hab: Allow hab_auth_img_or_fail to be called without ivt_offset
Since commit ea91031b22 ("imx: hab: extend hab_auth_img to calculate
ivt_offset"), it is possible to call the hab_auth_img command without the
last ivt_offset argument.

Currently, calling hab_auth_img_or_fail without the last
ivt_offset parameter causes a failure and the command usage text is shown.

Fix this problem by adjusting the argc logic to allow
calling hab_auth_img_or_fail with only the address and size parameters.

This way, both hab_auth_img and hab_auth_img_or_fail have the same
behavior with respect to the allowed number of command parameters.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23 18:45:33 +02:00
Oleksandr Suvorov
71dfe179cd mach-imx: bootaux: fix building with disabled bootelf
If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends
up with a linking error [1]. Select LIB_ELF to fix the building
issue.

[1]
ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux':
arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to `valid_elf_image'

Fixes: c0f037f6a2 ("mach-imx: bootaux: elf firmware support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-09-23 18:45:33 +02:00
Michal Simek
e278ad9a2e trace: Fix alignment logic in flyrecord header
Current alignment which is using 16 bytes is not correct in connection to
trace_clocks description and it's length.
That's why use start_addr variable and record proper size based on used
entries.

Fixes: be16fc81b2 ("trace: Update proftool to use new binary format").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-23 09:00:37 -06:00
Michal Simek
5ae43b8706 trace: Move trace_clocks description above record offset calculation
Flyrecord tracing data are page aligned that's why it is necessary to
calculate alignment properly. Because trace_clocks description is the part
of record length it is necessary to have information about length earlier.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-23 09:00:37 -06:00