This is the only driver that uses this function. Update it to use the
alternative which is dm_gpio_clrset_flags().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Harm Berntsen <harm.berntsen@nedap.com>
Select CMD_QFW and QFW_MMIO in the qemu-arm board (covers arm and
arm64).
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add MMIO driver for QFW.
Note that there is no consumer as of this patch.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A sandbox driver and test are added for the qfw uclass, and a test in
QEMU added for qfw functionality to confirm it doesn't break in real
world use.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We move qfw into its own uclass and split the PIO functions into a
specific driver for that uclass. The PIO driver is selected in the
qemu-x86 board config (this covers x86 and x86_64).
include/qfw.h is cleaned up and documentation added.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Align the MMU area for SCMI shared buffer on section size;
use the ALIGN macro in mmu_set_region_dcache_behaviour call.
Since commit d877f8fd0f ("arm: provide a function for boards init
code to modify MMU virtual-physical map") the parameter of
mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE
aligned.
Fixes: 240720e905 ("firmware: scmi: mailbox/smt agent device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Skip the processing of *.aml and *.dat files while iterating through the
source in order to process header files.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
strn(cat|cpy) has a bad habit of not nul-terminating the destination,
resulting in constructions like
strncpy(foo, bar, sizeof(foo) - 1);
foo[sizeof(foo) - 1] = '\0';
However, it is very easy to forget about this behavior and accidentally
leave a string unterminated. This has shown up in some recent coverity
scans [1, 2] (including code recently touched by yours truly).
Fortunately, the guys at OpenBSD came up with strl(cat|cpy), which always
nul-terminate strings. These functions are already in U-Boot, so we should
encourage new code to use them instead of strn(cat|cpy).
[1] https://lists.denx.de/pipermail/u-boot/2021-March/442888.html
[2] https://lists.denx.de/pipermail/u-boot/2021-January/438073.html
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This fixes several uses of strn(cpy|cat) which did not terminate their
destinations properly.
Fixes de1728ce4c ("fastboot: Allow u-boot-style partitions")
Reported-by: Coverity Scan
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This test is adapted from glibc, which is very concerned about alignment.
It also tests strlcpy by dependency.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This introduces strlcat, which provides a safer interface than strncat. It
never copies more than its size bytes, including the terminating nul. In
addition, it never reads past dest[size - 1], even if dest is not
nul-terminated.
This also removes the stub for dwc3 now that we have a proper
implementation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
strlcpy should always return the number of bytes copied. We were
accidentally missing the nul-terminator. We also always used to return a
non-zero value, even if we did not actually copy anything.
Fixes: 23cd138503 ("Integrate USB gadget layer and USB CDC driver layer")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Right now the error messages when optee has a version mismatch or shared
memory is not configured are done with a debug().
That's not very convenient since you have to enable debugging to figure
out what's going on, although this is an actual error.
So let's switch the debug() -> dev_err() and report those explicitly.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
serial_reinit_all() is only available if CONFIG_SERIAL is defined (i.e.
!CONFIG_DM_SERIAL).
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
stdio_dev methods have taken a pointer to themselves since 709ea543
(nearly 7 years ago).
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for rtc3028 rtc from microcrystal.
based on linux dirver:
commit a38fd8748464: ("Linux 5.12-rc2")
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Add local variables agent0/agent1 to refer to SCMI sandbox context
agent and ease readability of the test.
For consistency, rename regul_dev to regul0_dev and remove sandbox_voltd
in dm_test_scmi_voltage_domains().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix inline comments and empty line in scmi driver and test files.
Remove test on IS_ENABLED(CONFIG_*_SCMI) in test/dm/scmi.c since these
configuration are expected enabled when CONFIG_FIRMWARE_SCMI is enabled
in sandbox configuration.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Implement sandbox regulator devices for SCMI voltage domains
and test them in DM scmi tests.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Implement voltage regulators interfaced by the SCMI voltage domain
protocol. The DT bindings are defined in the Linux kernel since
SCMI voltage domain and regulators patches [1] and [2] integration
in v5.11-rc7.
Link: [1] 0f80fcec08
Link: [2] 2add5cacff
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The gpt command require the GPT backup header at the standard location
at the end of the device. Check the alternate LBA value before reading
the GPT backup header from the last usable LBA of the device.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If there were no variable substitutions in a command, then initial
assignments would be misinterpreted as commands, instead of being skipped
over. This is demonstrated by the following example:
=> foo=bar echo baz
Unknown command 'foo=bar' - try 'help'
Signed-off-by: Sean Anderson <seanga2@gmail.com>
For all other erase failures, the fail_addr is updated with the
failing address. Only in the case of erase failure due to bad block
detection, the fail_addr is not updated. This change simply updates
the fail_addr for this specific scenario so that it is consistent with
the rest of the code.
Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
It's an old bringup board with out upstream Linux or L4T support
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
On ARMv8 systems
load mmc 0:1 $loadaddr vmlinuz-5.10.0-3-arm64
booti
leads to a hanging system requiring to physically reset the system:
FDT and ATAGS support not compiled in - hanging
### ERROR ### Please RESET the board ###
For systems where physical access is difficult hanging is a poor choice.
It is preferable to reset the system when U-Boot reaches a state that is
not recoverable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Similar to support for SHA1 and SHA256, allow the use of hardware hashing
engine by enabling the algorithm and setting CONFIG_SHA_HW_ACCEL /
CONFIG_SHA_PROG_HW_ACCEL.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Checkpatch complains about:
ERROR: "foo * bar" should be "foo *bar"
and
CHECK: Alignment should match open parenthesis
Signed-off-by: Joel Stanley <joel@jms.id.au>
The optee_copy_fdt_nodes is only used to copy op-tee nodes
of U-Boot device tree (from gd->fdt_blob when OF_LIVE is not activated)
to external device tree but it is not compatible with OF_LIVE.
This patch migrates all used function fdt_ functions to read node on
old_blob to ofnode functions, compatible with OF_LIVE and remove this
parameter "old_blob".
The generated "device tree" is checked on stm32mp platform with OF_LIVE
activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add power_max77696_init() function.
Since warp doesn't support DM, the keeping its code in board file is
better than maintainig the file of driver.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
The test adds two pinmux nodes to the device tree, one to test when a
register changes only one pin's mux (pinctrl-single,pins), and the other
to test when more than one pin's mux is changed (pinctrl-single,bits).
This required replacing the controller's register access functions when
the driver is used on sandbox.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
It allows to display the muxing of a given pin. Inspired by more recent
versions of the Linux driver, in addition to the address and the value
of the configuration register I added the pin function retrieved from
the DT. In doing so, the information displayed does not depend on the
platform, being a generic type driver, and it can be useful for debug
purposes.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The configuration of pinmux registers was implemented with duplicate
code which can be removed by adding two functions for read/write access.
Access to 8-bit registers has also been added.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch is inspired by more recent versions of the Linux driver.
Replacing the default value 0xffffffff of the function mask with 0 is
certainly more conservative in case the "pinctrl-single,function-mask"
DT property is missing.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
In more recent versions of the Linux kernel the driver's probe function
returns an error if the "pinctrl-single,register-width" DT property is
missing. The lack of this information, in fact, does not allow to know
whether to access the registers of the controller at 8, 16, ... bits.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use dev_read_addr_size to get size of the controller's register area.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", ®, val); prints the 'reg'
address preceded by the prefix 0x0x instead of 0x. This because the
printf '%pa' format specifier already prepends the prefix '0x' to the
address displayed.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The pinmux configuration DT node of a peripheral does not define a
physical address but an offset. Only by adding it to the base address of
the controller it is possible to calculate the physical address of the
register to be configured. Printing an offset also requires a different
formatting option than a physical address.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The 'n' variable is used as a loop counter, not as a physical address,
and is used in a comparison with an int. So it makes sense to change
its type from phys_addr_t to int.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
A previous patch had removed the GPIO nodes from being built
into the SPL Device tree, but CONFIG_SPL_GPIO_SUPPORT remained
which makes the MMC card detect fail and the board does not boot.
Fix this by disabling CONFIG_SPL_GPIO_SUPPORT.
Fixes: 6f1efe81aa ("configs: omap3/35_logic and omap3/35_logic_somlv: Reduce SPL size")
Signed-off-by: Adam Ford <aford173@gmail.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
