Commit graph

59347 commits

Author SHA1 Message Date
Neil Armstrong
0d84acb00a ARM: dts: add support for Odroid-N2
Import HardKernel Odroid-N2 DT from Linux 5.3-rc1, commit 5f9e832c1370
("Linus 5.3-rc1") based on an Amlogic G12B S922X SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-31 12:10:50 +02:00
Neil Armstrong
d93757f2f6 ARM: dts: Sync Amlogic G12A with Linux 5.3-rc1
Sync the Amlogic Meson G12A DT and Bindings file with the Linux 5.3-rc1
from the commit 5f9e832c1370 ("Linus 5.3-rc1").

Also remove the meson-g12a-u-boot.dtsi and meson-g12a-u200-u-boot.dtsi,
now conflicting with the main DT content.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-31 12:10:42 +02:00
Baruch Siach
fea3939d31 mmc: relocate code comment
The comment about init op being NULL used to be next to the NULL check
code. Commit 8ca51e51c1 ("dm: mmc: Add a way to use driver model for
MMC operations") separated the comment from the code. Put them back
together.

Fixes: 8ca51e51c1 ("dm: mmc: Add a way to use driver model for MMC operations")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 15:31:36 +08:00
Weijie Gao
caa332336d mmc: mtk-sd: add WATCHDOG_RESET() to prevent watchdog timeout
When reading large data in once (reading 512MiB is tested on MT7623), a
watchdog timeout is triggered due to watchdog not being fed.

This patch adds WATCHDOG_RESET() to msdc_start_data() so the watchdog will
be fed every 1024 blocks are read/written.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-07-31 15:31:36 +08:00
Baruch Siach
58d65d5082 mmc: sdhci: fix chip detect gpio property name
The standard property name for chip-detect gpio is "cd-gpios". All
in-tree DT files use only this name.

Fixes: 451931ea70 ("mmc: sdhci: Read cd-gpio from devicetree")
Cc: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 15:31:36 +08:00
Baruch Siach
41a9fab8da mmc: mv_sdhci: fix uninitialized pointer deref on probe
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2019-07-31 15:31:36 +08:00
Jean-Jacques Hiblot
09da18deab test/py: add MMC/SD block write test
Add a standalone MMC block write test. This allows direct testing of MMC
access rather than relying on doing so as a side-effect of e.g. DFU or
UMS testing, which may not be enabled on all platforms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2019-07-31 15:31:36 +08:00
Peng Fan
4f895988ad test: dm: clk_ccf: test composite clk
Test composite clk with dm ccf

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
8f611dc71c clk: sandbox: add composite clk
Add composite clk to sandbox driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
7bd6432210 configs: sandbox: Enable composite clk
Enable composite clk for sandbox test

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
2b12957d01 clk: gate: support sandbox
Introduce io_gate_val for sandbox clk gate test usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
0009763588 clk: add composite clk support
Import clk composite clk support from Linux Kernel 5.1-rc5

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
d669d1ae03 clk-provider: include clk-uclass.h
Because clk-provider use clk_ops, so let's include clk-uclass.h

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
91944ef09d dm: clk: ignore default settings when node not valid
When the device not binded with a node, we need ignore
the parents and rate settings.

Cc: Simon Glass <sjg@chromium.org>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
4b91ec076d clk: imx: gate2 add set rate
Add set rate for imx clk-gate2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
b6c56d90b8 clk: imx: import clk heplers
Import some clk helpers from Linux Kernel for i.MX8MM usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
4f305bf1b6 clk: fixed_rate: export clk_fixed_rate
Export the structure for others to use.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
fe69b030de clk: divider set rate supporrt
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
1c64330318 clk: add clk-gate support
Import clk-gate support from Linux Kernel 5.1-rc5

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
1b0d09cddb clk: export mux/divider ops
Export mux/divider ops and divider_recalc_rate for composite usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
4b044082c1 clk: mux: add set parent support
Add set parent support for clk mux

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
5b27ff8986 clk: use clk_dev_binded
Preparing to support composite clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Peng Fan
2457612d6d clk: introduce clk_dev_binded
When support Clock Common Framework, U-Boot use dev for
clk tree information, there is no clk->parent. When
support composite clk, it contains mux/gate/divider,
but the mux/gate/divider is not binded with device.
So we could not use dev_get_uclass_priv to get the correct
clk_mux/gate/divider. So add clk_dev_binded to let
choose the correct method.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 09:20:51 +02:00
Urja Rannikko
2b157019bb dw_mmc: turn on the IO supply
Fixes the microSD slot on the ASUS C201.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com<mailto:peng.fan@nxp.com>>
2019-07-31 09:07:30 +08:00
Tom Rini
a239147fa2 - fix EDID mode filtering
- extend mxc_ipuv3_fb to enable backlight/display
 - include fb_base in global_data for DM_VIDEO
 - show frame buffer address via board info
   as used to be with legacy VIDEO support
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Merge tag 'video-for-2019.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- fix EDID mode filtering
- extend mxc_ipuv3_fb to enable backlight/display
- include fb_base in global_data for DM_VIDEO
- show frame buffer address via board info
  as used to be with legacy VIDEO support
2019-07-30 19:19:54 -04:00
Tom Rini
476a3143d7 Xilinx/FPGA changes for v2019.10
fpga:
 - Xilinx virtex2 cleanup
 - Altera cyclon2 cleanup
 
 zynq:
 - Minor Kconfig cleanup
 - Add psu_init configuration for Z-turn board
 
 zynqmp:
 - Add support for pmufw config passing to PMU
 - script for psu_init conversion
 - zcu1275 renaming
 
 xilinx:
 - Add support for UltraZed-EV SoM
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Merge tag 'xilinx-for-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2019.10

fpga:
- Xilinx virtex2 cleanup
- Altera cyclon2 cleanup

zynq:
- Minor Kconfig cleanup
- Add psu_init configuration for Z-turn board

zynqmp:
- Add support for pmufw config passing to PMU
- script for psu_init conversion
- zcu1275 renaming

xilinx:
- Add support for UltraZed-EV SoM
2019-07-30 19:19:34 -04:00
Tom Rini
dcf722ece6 Merge branch 'master' of git://git.denx.de/u-boot-sh 2019-07-30 19:19:04 -04:00
Heinrich Schuchardt
bb68957720 efi_selftest: sharpen ConvertPointer() test
Now that ConvertPointer() is implemented throw an error if the result is
incorrect.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
7be56e864e efi_loader: implement ConvertPointer()
Implement the ConvertPointer() runtime service.

Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
24e6722b8a efi_loader: definition of efi_virtual_address_map()
Use efi_uintn_t where the UEFI spec uses UINTN. Use efi_uintn_t also for
the result of the division of two efi_uintn_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
c0a8a95263 efi_selftest: fix SetVirtualAddressMap unit test
We read the address map before assigning the memory for the pages that will
be mapped to virtual addresses. So these pages will overlap with the entry
for EFI_CONVENTIONAL_MEMORY. We have to ensure that every page is described
at most once in the map.

Remove EFI_CONVENTIONAL_MEMORY from the map that we pass to
SetVirtualAddressMap().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
73d95c24a5 doc: integrate UEFI documentation into Sphinx toctree
Change the UEFI documentation to Sphinx style and integrate it into the
rest of the Sphinx generated documentation.

Remove the inaccurate TODO list in doc/uefi/uefi.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
a6ccba0c35 efi_loader: efidebug.c function documentation
make htmldocs produces a warning:
./cmd/efidebug.c:733: WARNING: Unexpected indentation.
Correct the indentation.

Remove 'See above for details of sub-commands.' which is not helpful in the
Sphinx generated documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
4ed0d3c3ea efi_loader: always rebuild efi_crt0.o
When changing the architecture without calling 'make clean' a subsequent
make fails with
lib/efi_loader/efi_crt0.o: file not recognized: File format not recognized

Force efi_crt0.o to be always rebuild.

Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Heinrich Schuchardt
6f3badb67d efi_loader: re-enable GRUB workaround on 32bit ARM
GRUB on ARM 32bit prior to version 2.04 lacks proper handling of caches.
In U-Boot v2019.04 a workaround for this was inadvertently removed.

The workaround is currently also needed for booting on systems with caches
that cannot be managed via CP15 (e.g. with an i.MX6 CPU).

Re-enable the workaround and make it customizable.

Fixes: f69d63fae2 ("efi_loader: use efi_start_image() for bootefi")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30 21:36:22 +02:00
Michal Simek
cd228cc04a arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabled
xilinx_zynqmp_mini configuration is throwing build error:
readlink: missing operand
Try 'readlink --help' for more information.

because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and
Makefile pass ifneq condition. Add SPL_BUILD dependency which is also
reflected in Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 17:09:58 +02:00
Heiko Schocher
42a7ce27d9 mxc_ipuv3_fb.c: enable a backlight on a panel
check if we get a panel device, if so, enable
the backlight on it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30 12:58:33 +02:00
Heiko Schocher
f4ec1ae08e mxc_ipuv3_fb.c: call display_enable
call display_enable, so a display gets enabled.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30 12:57:47 +02:00
Heiko Schocher
5a760f61c5 bdinfo: show fb base with DM_VIDEO
show Framebuffer base with CONFIG_DM_VIDEO
enabled.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30 12:57:01 +02:00
Heiko Schocher
f03e56adad mxc_ipuv3_fb.c: set gd->fb_base
set gd->fb_base so it can be shown with bdinfo command.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30 12:55:06 +02:00
Heiko Schocher
98a8279806 global_data: enable fb_base for DM_VIDEO
with CONFIG_VIDEO we store fb base address
in global data fb_base variable. Do this
also in DM_VIDEO case.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30 12:54:37 +02:00
Alexander Dahl
5a4675a917 cmd: fpga: Change return value to avoid printing usage text
In cmd/fpga.c the commands should return enum command_ret_t, e.g.
CMD_RET_USAGE, CMD_RET_SUCCESS, or CMD_RET_FAILURE. What they actually
do is passing a return value from different 'fpga_' functions.

Passing on a return value of -1 from a called function leads to printing
out usage text. In case of actually correct usage with correctly
specified parameters but some fail at runtime printing out that usage
text is distracting.

The reason is most 'fpga_' functions return either FPGA_SUCCESS or
FPGA_FAIL, the latter was equal to -1 which is the same value as
CMD_RET_USAGE. So just passing on FPGA_FAIL lead to printing out usage.

We should only return CMD_RET_USAGE in cases, where the user sent wrong
input. Every other case should return CMD_RET_SUCCESS or
CMD_RET_FAILURE, and not simply pass an error code.

Simply changing FPGA_FAIL from -1 to 1 gets the job done.

Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30 10:21:16 +02:00
Alexander Dahl
b283d6ba67 fpga: altera: cyclon2: Check function pointer before calling
As already done for the 'pre' function, a check is added to not follow a
NULL pointer, if somebody has not assigned a 'post' function.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30 10:21:15 +02:00
Alexander Dahl
3911b19cac fpga: altera: cyclon2: Fix indentation
Some code parts stood too far left …

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30 10:21:14 +02:00
Alexander Dahl
bb2c0fa03e fpga: altera: cyclon2: Fix most checkpatch warnings
Nothing special, but done before further cleanup.

* spacing
* braces
* __FUNCTION__ → __func__

Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30 10:21:13 +02:00
Alexander Dahl
3b2a595fc6 fpga: altera: Add some more device sizes
There seems to be only one place, where this is checked against:
`altera_validate()`. It should be non zero. Otherwise it is only used to
display it, so it probably does not really matter at the moment. But we
had the datasheet open anyway …

Sizes in datasheet are bit counts, display here is in bytes.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30 10:21:11 +02:00
Luca Ceresoli
216dad7507 arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EV
The board was added without adding a MAINTAINERS entry.

Fixes:

  $ ./tools/genboardscfg.py -f
  WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
  WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
  $

Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Robert Hancock
175dccd710 fpga: virtex2: Add slave serial programming support
This adds support for slave serial programming, in addition to the
previously supported slave SelectMAP mode. There are two ways that this
can be used:

-Using the clk and wdata callbacks in order to write image data one bit
at a time using pure bit-banging. This works, but is rather painfully
slow with typical image sizes.

-By specifying the wbulkdata callback instead, the image loading process
can be offloaded to SPI hardware. In this mode the clk and wdata
callbacks do not need to be specified. This allows the image to be
loaded much faster, taking only a few seconds with even relatively large
images.

Slave serial programming has been tested on the Kintex-7 series of
FPGAs.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Robert Hancock
a0549f7390 fpga: virtex2: Add additional clock cycles after DONE assertion
Some Xilinx FPGA configuration options can result in the startup
sequence extending past the end of the FPGA bitstream. Continue applying
CCLK clock cycles for 8 cycles after DONE is asserted in order to ensure
the startup sequence is complete, as recommended by Xilinx.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Robert Hancock
3372081cfd fpga: virtex2: Split out image writing from pre/post operations
This is in preparation for adding slave serial programming support,
which uses the same pre/post operations as slave SelectMAP, to avoid
duplicating code.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00