Commit graph

4 commits

Author SHA1 Message Date
Peng Fan
28fff3fa1c imx: imx8mp_evk: fix boot issue
The u-boot-spl.bin pad with ddr firmware conflicts with the
CONFIG_MALLOC_F_ADDR area, the ddr firmware will be overwritten
by malloc in SPL stage and cause ddr initialization not able
to finish. So update the related addresses to fix the issue.

Reported-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-08 10:42:45 +02:00
Simon Glass
1af3c7f422 common: Drop linux/stringify.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Ashok Reddy Soma
702de89cc6 treewide: mem: Move mtest related defines to Kconfig
Move below defines which are used by mtest utility to Kconfig.
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEMTEST_END

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Fix kmcoge5ne board, re-run migration as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-08 12:02:56 -04:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00