Commit graph

89379 commits

Author SHA1 Message Date
Laurentiu Tudor
1dd7b56634 drivers: net: fsl-mc: add support for MC reserved memory
Add support for declaring in device tree the reserved memory ranges
required for MC. Since the MC firmware acts as any DMA master present
in the SoC, the reserved memory ranges need also be identity mapped
in the SMMU, so create the required 'iommu-addresses' property in
the reserved memory nodes.
For now this support is used only on LX2160A SoCs.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:33 +08:00
Laurentiu Tudor
b9112cdfb5 armv8: fsl-layerscape: make some functions static
Some functions are not used outside this file, so make them static.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Laurentiu Tudor
487fa1aa97 fsl-layerscape: drop obsolete PPA secure firmware support
PPA was a secure firmware developed in-house which is no longer
supported and replaced by TF-A quite some years ago. Drop support
for it.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Laurentiu Tudor
b60274e690 configs: layerscape: delete defconfigs using legacy PPA secure FW
PPA was a secure firmware developed in-house which is no longer
supported and replaced by TF-A quite some years ago. This makes
the defconfigs that make use of PPA obsolete, so remove them.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
 [Merged part 1 and part 2]
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Sean Anderson
3f876cb7c5 test: Fix SPL tests not being run
SPL doesn't have OF_LIVE enabled, so we can only run tests with a flat
tree. Don't skip them even if they don't use the devicetree.

Fixes: 6ec5178c0e ("test: Skip flat-tree tests if devicetree is not used")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Francois Berder
e483a7c8ff board/km/cent2: Fix buffer overflow when fixing MAC address
String "/soc/fman/ethernet@e8000" is 25 bytes long
and not 24 due to extra byte for null character at
the end.

Signed-off-by: Francois Berder <fberder@outlook.fr>
2023-10-09 15:24:31 -04:00
Heinrich Schuchardt
6da11cc81e stdio: fix stdio_deregister_dev()
When copying the name of a stdio device we must ensure that it is NUL
terminated before passing it to strcmp() to avoid a buffer overrun.

Truncating the name field leads to failure to deregister a stdio device.
When copying we must ensure that the name field sizes match.

Addresses-Coverity-ID: 350462 String not null terminated
Fixes: 5294e97832 ("stdio: extend "name" to 32 symbols")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Heinrich Schuchardt
6a1e0ae43e dm: serial: fix serial_post_probe()
The size of the name of a udevice is not limited.

When setting the fixed sized name field of a stdio device we must ensure
that the target string is NUL terminated to avoid buffer overflows.

Fixes: 57d92753d4 ("dm: Add a uclass for serial devices")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Jonas Karlman
6826c432e3 spl: Jump to image at end of board_init_r
spl_board_prepare_for_boot() is not called before jumping/invoking atf,
optee, opensbi or linux images.

Jump to image at the end of board_init_r() to fix this.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Chanho Park
a60d9686f2 spl: add __noreturn attribute to spl_invoke_atf function
spl_invoke_atf function will not be returned to SPL. Thus, we need to
set __noreturn function attribute to the function.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
2023-10-09 15:24:31 -04:00
Jan Kiszka
47e7f128c4 tools: iot2050-sign-fw.sh: Make localization of tools dir more robust
When building in-tree, there is no source link.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-10-09 15:24:31 -04:00
Matthias Schiffer
17deab0edd arm: mach-k3: common: fix compile warnings with PHYS_64BIT on 32bit
Use uintptr_t instead of phys_addr_t where appropriate, so passing the
addresses to writel() doesn't result in compile warnings when PHYS_64BIT
is set for 32bit builds (which is actually a useful configuration, as
the K3 SoC family boots from an R5 SPL, which may pass bank information
based on gd->bd->bi_dram to fdt_fixup_memory_banks() etc., so PHYS_64BIT
is needed for fixing up the upper bank).

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2023-10-09 15:24:31 -04:00
Love Kumar
34124ad9a4 test/py: sleep: Add a test for the time command
Execute "time <sleep cmd>", and validate that it gives the approximately
the correct amount of command execution time.

Signed-off-by: Love Kumar <love.kumar@amd.com>
2023-10-09 15:24:31 -04:00
Matthias Schiffer
fb730a2c5a mailbox: k3-sec-proxy: fix error handling for missing scfg in FDT
The wrong field was checked.

Fixes: f9aa41023b ("mailbox: Introduce K3 Secure Proxy Driver")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-09 15:24:31 -04:00
Udit Kumar
4a6105e783 test: lmb: Add test for coalescing and overlap range
Add test case for an address range which is coalescing with one of
range and overlapping with next range

Cc: Simon Glass <sjg@google.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Udit Kumar
edb5824be1 lmb: remove overlapping region with next range
In case of new memory range to be added is coalesced
with any already added non last lmb region.

And there is possibility that, then region in which new memory
range added is not adjacent to next region. But have some
sections are overlapping.

So along with adjacency check with next lmb region,
check for overlap should be done.

In case overlap  is found, adjust and merge these two lmb
region into one.

Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2023-10-09 15:24:31 -04:00
Tom Rini
4f9c7a9f54 exynos: Cleanup exynos_init
- None of the callers perform error checking and based on the non-empty
  versions of this function, there's no checking to be done, so make
  this a void.
- Add a default weak version of the function.
- Remove the empty versions of exynos_init now that we have a weak
  version.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-09 15:24:31 -04:00
Tom Rini
db7516b635 board: Remove essentially empty board files and Makefiles
As part of reviewing a new platform, Daniel Schwierzeck noted that we
can have an empty Makefile in the board directory and don't need an
empty board.c file as well.  Further with further cleanup in the
Makefile we can now omit the Makefile entirely. Remove a number of now
unnecessary board.c and Makefiles.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-09 15:24:31 -04:00
Tom Rini
521ca0fa78 Makefile: Allow for board directories to not have a Makefile
It is entirely possible at this point to have platforms in U-Boot that
do not have board-specific C code (just Kconfig or environment) and so
make it optional to have to descend in to and then build in the board
directory.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-09 15:24:31 -04:00
Patryk Biel
3d0fa4a438 ARM: vexpress_ca9x4: Add missing flash width config option
Allow for a proper configuration of CFI flash banks avaialble on the vexpress_ca9x4
board. Without this option, the CFI flash incorrectly detects that the board has two
banks of 32MB flash devices, while in reality, the board provides
two flash banks, each with 64MB size. As a result, it becomes impossible to e.g. to
save u-boot env in flash. According to device tree for this board and
its implementation in QEMU, the CFI width should be set to 32 bits.

After applying this fix, CFI flash will correctly detect both flash
banks each with a size of 64MB. As as result the functionality of e.g. saving u-boot
env will work correctly.

Tested on QEMU 6.2.0.

Cc: Kristian Amlie <kristian.amlie@northern.tech>
Signed-off-by: Patryk Biel <pbiel7@gmail.com>
Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
2023-10-09 15:24:31 -04:00
Tony Dinh
deb746e0f6 bootstd: use ARCH_DMA_MINALIGN in memalign() when allocating memory
Use ARCH_DMA_MINALIGN in memalign() when allocating memory to read the script from the media.

Ref: https://lore.kernel.org/u-boot/CAJaLiFy05F3Cr4X4G2mVkppXnBEFZrHQ+5CngYN8eJPg8ENWkg@mail.gmail.com/T/#m26daadc2463fe653b814a94e6309e5e6bb6be1d1

Note: this patch depends on the previous patch
https://patchwork.ozlabs.org/project/uboot/patch/20230917230649.30357-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Andrew Davis
ce743f168a Makefile: Force regeneration of env.txt
If the source .env file changes to one that is also older than the
generated env.txt file then the .env file is not regenerated. This
means when switching board configs we do not regenerate the env.

This can be tested with:

$ make j721e_evm_a72_defconfig
$ make # this may fail to complete but that is okay for this test
$ make am64x_evm_a53_defconfig
$ make
$ vim include/generated/env.txt

Note this is still the J721e env not the AM64 config as expected.

As ENV_FILE is set based on configuration, regenerate anytime
autoconf.h changes.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Polak, Leszek
facfa5659b arm64: versal: Add SelectMAP boot mode identification
The SelectMAP configuration interface provides an 8-bit,
16-bit or 32-bit bidirectional data bus interface to the Versal FPGA
configuration logic that can be used for both configuration and readback.

A connected microcontoller to the SelectMAP interface can load boot
image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot.

This commit adds the missing identification of the SelectMAP mode.

Signed-off-by: Polak, Leszek <LPolak@arri.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/DU0PR07MB8419F7765892CDBCE7D559C5C8CFA@DU0PR07MB8419.eurprd07.prod.outlook.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 13:03:23 +02:00
Michal Simek
82bb62dfa9 arm64: xilinx: Do not use '_' in si5335 DT node names
Character '_' not recommended in node name. Use '-' instead.
Pretty much run sed below for node names.
s/si5335_/si5335-/

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ac752b1e27f02efb32608188992bb7ae50e4b1b0.1695809130.git.michal.simek@amd.com
2023-10-09 12:14:41 +02:00
Michal Simek
1e1c23714f Revert "clk: versal: Enable clock driver for Versal NET"
This partially reverts commit ff33227819.

Versal NET clock node should use "xlnx,versal-net-clk", "xlnx,versal-clk"
compatible string that's why it is not necessary to define Versal NET
specific compatible string if there is no any other change needed. It can
be get back if there is a need to differentiate clock support between
Versal and Versal NET.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c09276022db5f1b150679cc7a9f9583363ace2fb.1695808971.git.michal.simek@amd.com
2023-10-09 12:14:05 +02:00
Michal Simek
b311c9c40a arm64: zynqmp: Do not use '_' in DT node names
Using '_' is not recommended for node names. Use '-' instead.
Pretty much run seds below for node names.
s/heartbeat_led/heartbeat-led/
s/gtr_sel/gtr-sel/
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dd33d6cb0595ffedab117d477f4a3c9d9eb11715.1695808665.git.michal.simek@amd.com
2023-10-09 12:13:36 +02:00
Michal Simek
c5cd2d2aba arm: dts: xilinx: Remove undocumented is-dual property
Xilinx was using in past is-dual property for QSPIs to reflect their
configurations. But handling for them never reached upstream code that's
why better to remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15980560b98672959a889ff9970cbe9540b4ed69.1695808563.git.michal.simek@amd.com
2023-10-09 12:13:04 +02:00
Michal Simek
b51371e8c9 arm64: zynqmp: Add support for zcu670-revB
RevB has different SD level shifter compare to revA. There are couple of
changes between revisions but none of them requires SW alignment.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0f2bb29f88615ce75f887c006060543b4aeafd48.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
1ddf10d178 arm64: zynqmp: Add support for zcu670-revA
The board is sharing a lot of components with zcu208 but it contains
differet silicon and also several components are done differently.
The board has 4GB memory connected to PS and additional 4GB connected to
PL. Compare to zcu208 sata support has been dropped and only USB3.0 is
using GTR (lane2). Others GTRs are routed to connectors.

MIO configuration is also shared with zcu111.

The board is using si5381 chip compare to si5341 which is normally used.
And as of now there is no Linux driver for this chip. PS reference clock is
generated out of si570 chip which is also new approach compare to zcu208.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3b296ef0f52bd94e32bdeb6d1beee29ac85f00a2.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
eb357b75b7 arm64: zynqmp: Add support for VPXA2785
VPXA2785(vp-x-a2785-00) is evaluation board which contains two PCIe-Edge
fingers, one for PCIe-B(gen5x8) and one for CPM(dual gen5x8, gen5x16).
Each of the ports can operate in endpoint or root port mode. This allows
the single card to be used for both root port, endpoint, and switch modes.

The board is designed in the similar manner as others Versal boards. It
means board also have ZynqMP Zu4 System Controller which is described in a
separate file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/59d3b1f7e785bc65518b465e5122fd2787616a93.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
7f3639918f arm64: zynqmp: Describe i2c structures for SCs
Generic system controller (SC) covers connection defined by specification
but different boards have different i2c devices. That's why describe i2c
devices available on multiple boards.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ca1826b8b58981111229a94527818cc5a191ca9a.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
fa822ad19e arm64: zynqmp: Add support for SC revC
System controller revC is using ADI ethernet phy instead of TI because of
supply chain issues.
Describe reset assert and de-assert times to 10us and 5ms respectively
according to the datasheet. Also setup RGMII RX and TX delay values to
2400ps as per board bring up observations.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2790f6cede7485556d581ab8270dda477fa21522.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
64f5e3b492 arm64: zynqmp: Create description for generic SC (vpk120-revB)
System controllers are pretty much the same on the all boards that's why
use autodetection based on i2c eeprom. This should end up with having only
one BSP for all SCs with only DT overlays to cover different i2c
structures.

All MIOs are fixed by the spec that's why not a problem to description
pinctrl setting.

Apart from eth phy reset, it also set proper phy delays.
The TI DP83867 PHY datasheet says:
T1: Post RESET stabilization time == 195us
T3: Hardware configuration pins transition to output drivers == 64us
T4: RESET pulse width == 1us
So with a little overhead set 'reset-assert-us' to 100us (T4) and
'reset-deassert-us' to 280us (T1+T3).

NOTE: The tuning of TI DP83867 phy reset delay is derived from linux
upstream commit: 5dbadc848259(arm64: dts: fsl: add support for Kontron
pitx-imx8m board).

i2c structure on Xilinx Versal evaluation platforms contain a lot of
devices but also connection to connectors like SFP. Because of this
complicated structure with also all level shifters, i2c muxes, etc. not all
devices are able to reliably work on 400kHz even if they are compatible
with this speed. That's why set i2c frequency to 100KHz to increase
reliability of the i2c bus.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8092340f92144f0cc9096194198f227015bc013.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
fe90ce2368 arm64: zynqmp: Add support for vpk120-revA
Board contains two systems. The primary is Versal VP1202 ACAP device and
the secondary is ZynqMP zu4 which acts as system controller. The patch is
describing only ZynqMP system controller part.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bd8b79d7c6693e90e12bce422f8ed00f2f43c9ae.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
96e98b0264 arm64: zynqmp: Add x-prc-01/02/03/04/05 revA support from SC
Add i2c accessible devices with description.
There is versal specific eeprom and i2c-gpio controller.

SE3 has also clock chip present.

Also remove x-prc description from SC dts.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4f71ec6a63240fd4aaa3453824138281c50d71c3.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
46f0408771 arm64: zynqmp: Add support for vck190 revB system controller
There are some changes between revA and revB boards. u39 8T49N240 was
removed and also three ina226 at 42/43/44 addresses (u178/u180/u182).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/461cfe5b2b882365413f90d19efd8abcd6be56ed.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Michal Simek
44a56c2679 arm64: zynqmp: Remove xlnx,fclk nodes
xlnx,fclk nodes are not described in dtschema that's why remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b25dedd066f587321751d7d20c1f65bb96c53b89.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Michal Simek
7771873ab4 arm64: zynqmp: Add support for KD240 Kria SOM CC
Add support for KD240 Kria SOM CC. It is pretty much subset of KR260 board
from PS perspective.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/835f1d1b8982d46b902db69daad64e8445c051e9.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Michal Simek
5d80889783 arm64: zynqmp: Aligned QSPI configuration with latest spec
Official DT binding description for dual stacked/paralllel configurations
have been merged that's why switch to it.

Link: https://lore.kernel.org/r/20220126112608.955728-3-miquel.raynal@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2912091c231f5e945ee44601c285fe16263448da.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
d095631d8d ARM: zynq: Describe nand device in DT
Linux requires to describe nand structure under nand controller.
If it is not described nand device is not detected by Linux.

Error shown by Linux kernel:
pl35x-nand-controller e1000000.nand-controller: Incorrect number of NAND chips (0)
pl35x-nand-controller: probe of e1000000.nand-controller failed with error -22

When wired:
nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
nand: Micron MT29F2G08ABAEAWP
nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3fcd68ccdfed5e6c079681e3b29e06583ec8a375.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
8daa786211 arm64: zynqmp: Sync licenses with Linux kernel
There is difference between licenses in the Linux kernel and there
shouldn't be any diff because all changes are coming from the same source
at the same time. The difference is really in a time when they were
upstreamed. That's why sync it up.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/813b29378083153b67c60772f28cd2613519f338.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
c5eb6c2d4a arm64: zynqmp: Convert kv260-revA overlay to ASCII text
File was in UTF-8 format but there is no reason for it. Convert it to
ASCII/plain text.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e4d52b898b461b86bb82009f37635f351279c753.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Laurent Pinchart
32b8d6a7e5 arm64: dts: zynqmp: Add ports for the DisplayPort subsystem
The DPSUB DT bindings now specify ports to model the connections with
the programmable logic and the DisplayPort output. Add them to the
device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1c91420e90bc823d7529834c33438216857c7161.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Laurent Pinchart
b0c000b661 arm64: dts: zynqmp: zcu106a: Describe DisplayPort connector
Add a device tree node to describe the DisplayPort connector, and
connect it to the DPSUB output.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe037c93ed41bc5ca97887964037520d449ca98c.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
7469befcd5 arm64: xilinx: Remove address/size-cells from gem nodes
Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cases
where address/size-cells are unnecessary which is also reported by make W=1
dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle
it based on used description.

Error log:
/axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/02f308c774d4f2a798a9a8c066824114a19841a7.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
5c214bac46 arm64: xilinx: Put ethernet phys to mdio node
All zynqmp boards have been already described via mdio node that's why also
convert the rest of the boards. With using mdio node there is an option to
add reset property for the whole mdio bus which is reflected by
's/phy-reset-gpios/reset-gpios/g' for some boards.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff165281a70a38e2b76fee91e6255ce95ce8021b.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
2036621a61 arm64: zynqmp: Fix Siva's email address format
Some patches didn't have his full name and also there was one more ">" at
the end of email address. That's why correct both of these issues.

Fixes: 174d728471 ("arm64: zynqmp: Switch to amd.com emails")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
1b273a960a arm64: zynqmp: Describe bus-width for SD card on KV260
SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/065cb9f1c6706eb4d70066e25cfc30d17b9f875d.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
1aa867094b arm64: xilinx: Use lower case for partition address
Lower case should be used for register address.
Issue is reported as:
flash@0: partitions: Unevaluated properties are not allowed
('partition@22A0000' was unexpected)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/66b3361df883ecab4f36ce3b4196fb606c802598.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
0ece85e452 arm64: xilinx: Remove address/size-cells from flash node
Partitions are described via fixed-partitions that's why there is no need
to have address/size-cells in flash node.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c704be9d9f3d09c1cc55b092efeb9c73fcda6451.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00